14 Commits

Author SHA1 Message Date
zhangpeng
65ec98e142 修改端点 2025-11-07 16:58:05 +08:00
zhangpeng
13f99ce0e8 修改rkcif 2025-11-07 16:55:39 +08:00
zhangpeng
440be3e956 更改dcphy控制器 2025-11-06 14:52:07 +08:00
zhangpeng
8b1e982942 更改dcphy控制器 2025-11-04 21:41:07 +08:00
zhangpeng
7a15762f4c 暂存 2025-11-01 14:21:48 +08:00
zhangpeng
c6977360c3 增加MIPI相机控制 2025-10-28 19:08:22 +08:00
zhangpeng
aa4a8c801a 注释pcie 2025-10-14 20:05:47 +08:00
zhangpeng
b8465f59f4 交换GMAC复位引脚 2025-10-13 10:02:14 +08:00
zhangpeng
0e3abc6330 注释hdmi 2025-10-12 17:29:51 +08:00
zhangpeng
5bdca9e967 配置uart、i2c、pwm 2025-10-11 20:18:57 +08:00
zhangpeng
d2ec2b532e 调试PWM成功 2025-05-26 18:51:51 +08:00
zhangpeng
3bbdf81bc5 串口、网口、USB3.0、HDMI调试成功 2025-05-26 18:18:57 +08:00
zhangpeng
92bc223ace 禁用CAN2m1对NPU I2C的占用 2025-04-29 11:39:13 +08:00
zhangpeng
f716b853db 增加SPI3 2025-04-28 11:56:22 +08:00
32 changed files with 945 additions and 31244 deletions

View File

@@ -227,25 +227,6 @@
};
/* RK3568J cpu OPPs */
opp-j-408000000 {
opp-supported-hw = <0xfb 0xffff>;
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <850000 850000 1150000>;
clock-latency-ns = <40000>;
};
opp-j-600000000 {
opp-supported-hw = <0xfb 0xffff>;
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <850000 850000 1150000>;
clock-latency-ns = <40000>;
};
opp-j-816000000 {
opp-supported-hw = <0xfb 0xffff>;
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <850000 850000 1150000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-j-1008000000 {
opp-supported-hw = <0x04 0xffff>;
opp-hz = /bits/ 64 <1008000000>;

View File

@@ -1,41 +0,0 @@
cmd_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb := gcc -E -Wp,-MMD,arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.d.pre.tmp -nostdinc -I./scripts/dtc/include-prefixes -undef -D__DTS__ -x assembler-with-cpp -o arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.dts.tmp arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dts ; ./scripts/dtc/dtc -O dtb -o arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb -b 0 -iarch/arm64/boot/dts/rockchip/rk356x/ -i./scripts/dtc/include-prefixes -Wno-interrupt_provider -@ -Wno-unit_address_vs_reg -Wno-unit_address_format -Wno-avoid_unnecessary_addr_size -Wno-alias_paths -Wno-graph_child_address -Wno-simple_bus_reg -Wno-unique_unit_address -Wno-pci_device_reg -d arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.d.dtc.tmp arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.dts.tmp ; cat arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.d.pre.tmp arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.d.dtc.tmp > arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.d
source_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb := arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dts
deps_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb := \
arch/arm64/boot/dts/rockchip/rk356x/rk3566-evb-rpdzkj-rk809-syr837.dtsi \
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rk3568-cru.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
scripts/dtc/include-prefixes/dt-bindings/power/rk3568-power.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3568.h \
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-dram-default-timing.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rockchip-ddr.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rk3568-dram.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rockchip-dram.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-mipi-camera-gc2093-rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-adc-key.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac1-m0-pro-rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rk3568-pcie2x1.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/lcd-gpio-dr4-rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-mipi0-7-720-1280.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-hdmi.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb)
$(deps_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb):

View File

@@ -1 +0,0 @@
arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dtb: arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3566.dtb.dts.tmp

View File

@@ -1,33 +0,0 @@
dr4-rk3566.o: arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3566.dts \
arch/arm64/boot/dts/rockchip/rk356x/rk3566-evb-rpdzkj-rk809-syr837.dtsi \
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rk3568-cru.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
scripts/dtc/include-prefixes/dt-bindings/power/rk3568-power.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3568.h \
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-dram-default-timing.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rockchip-ddr.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rk3568-dram.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rockchip-dram.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-mipi-camera-gc2093-rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-adc-key.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac1-m0-pro-rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rk3568-pcie2x1.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/lcd-gpio-dr4-rk3566.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-mipi0-7-720-1280.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-hdmi.dtsi

File diff suppressed because it is too large Load Diff

View File

@@ -1,36 +0,0 @@
cmd_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb := gcc -E -Wp,-MMD,arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.d.pre.tmp -nostdinc -I./scripts/dtc/include-prefixes -undef -D__DTS__ -x assembler-with-cpp -o arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.dts.tmp arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts ; ./scripts/dtc/dtc -O dtb -o arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb -b 0 -iarch/arm64/boot/dts/rockchip/rk356x/ -i./scripts/dtc/include-prefixes -Wno-interrupt_provider -@ -Wno-unit_address_vs_reg -Wno-unit_address_format -Wno-avoid_unnecessary_addr_size -Wno-alias_paths -Wno-graph_child_address -Wno-simple_bus_reg -Wno-unique_unit_address -Wno-pci_device_reg -d arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.d.dtc.tmp arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.dts.tmp ; cat arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.d.pre.tmp arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.d.dtc.tmp > arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.d
source_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb := arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts
deps_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb := \
arch/arm64/boot/dts/rockchip/rk356x/rk3566-evb-rpdzkj-rk809-tcs4525.dtsi \
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rk3568-cru.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
scripts/dtc/include-prefixes/dt-bindings/power/rk3568-power.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3568.h \
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-dram-default-timing.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rockchip-ddr.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rk3568-dram.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rockchip-dram.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/zkzg-pcie-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac0-pro-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/zkzg-can-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb)
$(deps_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb):

View File

@@ -1 +0,0 @@
arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb: arch/arm64/boot/dts/rockchip/rk356x/.dr4-rk3568.dtb.dts.tmp

View File

@@ -1,28 +0,0 @@
dr4-rk3568.o: arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts \
arch/arm64/boot/dts/rockchip/rk356x/rk3566-evb-rpdzkj-rk809-tcs4525.dtsi \
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rk3568-cru.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
scripts/dtc/include-prefixes/dt-bindings/power/rk3568-power.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3568.h \
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-dram-default-timing.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rockchip-ddr.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rk3568-dram.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rockchip-dram.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/zkzg-pcie-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac0-pro-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/zkzg-can-rk3568.dtsi

File diff suppressed because it is too large Load Diff

View File

@@ -1,43 +0,0 @@
cmd_arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb := gcc -E -Wp,-MMD,arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.d.pre.tmp -nostdinc -I./scripts/dtc/include-prefixes -undef -D__DTS__ -x assembler-with-cpp -o arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.dts.tmp arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dts ; ./scripts/dtc/dtc -O dtb -o arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb -b 0 -iarch/arm64/boot/dts/rockchip/rk356x/ -i./scripts/dtc/include-prefixes -Wno-interrupt_provider -@ -Wno-unit_address_vs_reg -Wno-unit_address_format -Wno-avoid_unnecessary_addr_size -Wno-alias_paths -Wno-graph_child_address -Wno-simple_bus_reg -Wno-unique_unit_address -Wno-pci_device_reg -d arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.d.dtc.tmp arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.dts.tmp ; cat arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.d.pre.tmp arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.d.dtc.tmp > arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.d
source_arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb := arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dts
deps_arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb := \
arch/arm64/boot/dts/rockchip/rk356x/rk3568-evb-rpdzkj-rk809-pwm.dtsi \
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rk3568-cru.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
scripts/dtc/include-prefixes/dt-bindings/power/rk3568-power.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3568.h \
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-dram-default-timing.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rockchip-ddr.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rk3568-dram.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rockchip-dram.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-mipi-camera-gc2093x2-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-adc-key.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac0-pro-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac1-m1-pro-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-can1-m1-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-can2-m0-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rk3568-sata2.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568-single-lcd-gpio.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-mipi1-10-1920-1200.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-hdmi.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb)
$(deps_arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb):

View File

@@ -1 +0,0 @@
arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dtb: arch/arm64/boot/dts/rockchip/rk356x/.pro-rk3568.dtb.dts.tmp

View File

@@ -1,35 +0,0 @@
pro-rk3568.o: arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568.dts \
arch/arm64/boot/dts/rockchip/rk356x/rk3568-evb-rpdzkj-rk809-pwm.dtsi \
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rk3568-cru.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
scripts/dtc/include-prefixes/dt-bindings/power/rk3568-power.h \
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3568.h \
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-dram-default-timing.dtsi \
scripts/dtc/include-prefixes/dt-bindings/clock/rockchip-ddr.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rk3568-dram.h \
scripts/dtc/include-prefixes/dt-bindings/memory/rockchip-dram.h \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-mipi-camera-gc2093x2-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-adc-key.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac0-pro-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-gmac1-m1-pro-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-can1-m1-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-can2-m0-rk3568.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rk3568-sata2.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/pro-rk3568-single-lcd-gpio.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-mipi1-10-1920-1200.dtsi \
arch/arm64/boot/dts/rockchip/rk356x/rp-lcd-hdmi.dtsi

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@@ -8,45 +8,41 @@
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"
#include "../rk3568-linux.dtsi"
/**************************pcie***********************/
#include "zkzg-pcie-rk3568.dtsi"
/*************************camera***********************/
// #include "rp-camera-mipi-gc2093-single-2lane.dtsi"
#include "rp-camera-mipi-gc2093-single-2lane.dtsi"
/***************************************************/
/*************************adc key***********************/
// #include "rp-adc-key.dtsi"
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
// #include "rp-gmac1-m1-pro-rk3568.dtsi"
#include "rp-gmac0-pro-rk3568.dtsi"
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
// #include "rp-can0-m0-rk3568.dtsi"
// #include "rp-can1-m1-rk3568.dtsi"
// #include "rp-can2-m0-rk3568.dtsi"
#include "zkzg-can-rk3568.dtsi"
#include "rp-can0-m0-rk3568.dtsi"
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/*********************PCIE**************************/
// #include "rk3568-pcie2x1.dtsi"
// #include "rk3568-pcie3x2.dtsi"
#include "rk3568-pcie2x1.dtsi"
#include "rk3568-pcie3x2.dtsi"
/***************************************************/
/*************************SATA***********************/
// #include "rk3568-sata1.dtsi"
#include "rk3568-sata1.dtsi"
/***************************************************/
// #include "lcd-gpio-dr4-rk3568.dtsi" //gpio config for lcd
#include "lcd-gpio-dr4-rk3568.dtsi" //gpio config for lcd
/****** LCD config reference **/
/** single HDMI */
@@ -66,7 +62,7 @@
/** LVDS + HDMI */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
// #include "rp-lcd-lvds-10-1280-800-v2.dtsi"
#include "rp-lcd-lvds-10-1280-800-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/** EDP + HDMI */
@@ -89,7 +85,7 @@
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "disabled";
status = "okay";
};
rp_power{
@@ -113,10 +109,10 @@
* };
*/
// led { //system led
// gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
// gpio_function = <3>;
// };
led { //system led
gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
//fan { //fan
// gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
@@ -131,49 +127,49 @@
gpio_function = <4>;
};
// hub_rst { //usb hub
// gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
// usb_pwr0 { //host0 power en
// gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
// usb_pwr1 { //host1 power en
// gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
// usb_pwr2 { //host2 power en
// gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
// usb_pwr3 { //host3 power en
// gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
// usb_pwr4 { //host4 power en
// gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
hub_rst { //usb hub
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr0 { //host0 power en
gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr1 { //host1 power en
gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr2 { //host2 power en
gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr3 { //host3 power en
gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr4 { //host4 power en
gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
// spk_en { //spk enable
// gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
// spk_mute { //spk mute
// gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
// gpio_function = <4>;
// };
spk_en { //spk enable
gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
// vdd_3g { //4G module power en
// gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
vdd_3g { //4G module power en
gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "disabled";
status = "okay";
compatible = "rp_gpio";
/**
@@ -268,17 +264,17 @@
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};
&i2c3 {
status = "disabled";
status = "okay";
};
&i2c5 {
status = "disabled";
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
@@ -286,6 +282,10 @@
};
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
@@ -295,37 +295,35 @@
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m0_xfer>;
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m1_xfer>;
pinctrl-0 = <&uart5m1_xfer>;
};
&uart7 {
status = "disabled";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "disabled";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
pinctrl-0 = <&uart8m1_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "disabled";
status = "okay";
/** redefine pins for cs1 used to be pwm5 */
pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
pinctrl-1 = <&spi0m0_cs0 &spi0m0_pins_hs>;
@@ -339,7 +337,7 @@
};
&video_phy1 {
status = "disabled";
status = "okay";
};
/******** must be close,if not system no run ******/
@@ -367,54 +365,48 @@
* and if mutiple lcd used, we just use the backlight5, backlight10.
*/
/** LCD configuration */
// #if defined(RP_SINGLE_LCD)
#if defined(RP_SINGLE_LCD)
// #if defined(RP_MIPI02LVDS)
// &dsi0_panel {
// enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
// };
// #if defined(RP_DUALLVDS)
// // dual lvds donot need invert
// &backlight4 {
// pwms = <&pwm5 0 25000 0>;
// };
// #else
// //pwm and enable pin may be inverted if use mipi to single lvds
// &backlight4 {
// pwms = <&pwm5 0 25000 1>;
// };
// #endif
#if defined(RP_MIPI02LVDS)
&dsi0_panel {
enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
};
#if defined(RP_DUALLVDS)
// dual lvds donot need invert
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#else
//pwm and enable pin may be inverted if use mipi to single lvds
&backlight4 {
pwms = <&pwm5 0 25000 1>;
};
#endif
// #elif defined(RP_EDP_USED)
// &backlight4 {
// pwms = <&pwm10 0 25000 0>;
// };
// #endif
#elif defined(RP_EDP_USED)
&backlight4 {
pwms = <&pwm10 0 25000 0>;
};
#endif
// #else
// &edp_panel {
// backlight = <&backlight10>;
// };
// #ifdef RP_MIPI02LVDS
// &dsi0_panel {
// backlight = <&backlight5>;
// };
// #endif
// #endif
#else
&edp_panel {
backlight = <&backlight10>;
};
#ifdef RP_MIPI02LVDS
&dsi0_panel {
backlight = <&backlight5>;
};
#endif
#endif
/** Ethernet config*/
// &gmac1 {
// tx_delay = <0x49>;
// rx_delay = <0x29>;
// status = "okay";
// };
// &gmac0 {
// tx_delay = <0x49>;
// rx_delay = <0x29>;
// status = "okay";
// };
&gmac1 {
tx_delay = <0x49>;
rx_delay = <0x29>;
status = "okay";
};
/** headphone detect pin */
@@ -435,7 +427,7 @@
};
&sdmmc1 {
status = "disabled";
status = "okay";
max-frequency = <150000000>;
supports-sdio;
@@ -464,56 +456,60 @@
BT,reset_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "disabled";
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
};
/** pcie2x1 */
&vcc3v3_pcie {
/**
* delete for gpio used to be bt_wake_host
* and the vcc3v3_pcie need not control on our board.
*/
/delete-property/ gpio;
};
&pcie2x1 {
status = "okay";
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
};
/** pcie2x1 */
// &vcc3v3_pcie {
// /**
// * delete for gpio used to be bt_wake_host
// * and the vcc3v3_pcie need not control on our board.
// */
// /delete-property/ gpio;
// };
// &pcie2x1 {
// status = "disabled";
// reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
// };
/** pcie3x2 */
// &pcie3x2 {
// status = "disabled";
// reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
// vpcie3v3-supply = <&vcc3v3_pcie3>;
// };
&pcie3x2 {
status = "okay";
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie3>;
};
// &vcc3v3_pcie3 {
// pinctrl-names = "default";
// pinctrl-0 = <&pcie3_3v3>;
// gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
&vcc3v3_pcie3 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3_3v3>;
gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
// startup-delay-us = <8000>; //5000 is faild
// };
startup-delay-us = <8000>; //5000 is faild
};
/** mipi camera config */
// &vcc_camera {
// gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
// pinctrl-names = "default";
// pinctrl-0 = <&camera_en>;
// };
// &gc2093 {
// pinctrl-names = "default";
// pinctrl-0 = <&cif_clk>;
// pinctrl-1 = <&camera_ctl>;
// pwdn-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
// reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
// };
&vcc_camera {
gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&camera_en>;
};
&gc2093 {
pinctrl-names = "default";
pinctrl-0 = <&cif_clk>;
pinctrl-1 = <&camera_ctl>;
pwdn-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
&pinctrl {
@@ -556,20 +552,20 @@
};
};
// camera-pins {
// camera_en: camera-en {
// rockchip,pins =
// /** gc2093 camera en */
// <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
// };
// camera_ctl: camera-ctl {
// rockchip,pins =
// /** gc2093 camera power down */
// <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
// /** gc2093 camera reset */
// <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
// };
// };
camera-pins {
camera_en: camera-en {
rockchip,pins =
/** gc2093 camera en */
<2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
camera_ctl: camera-ctl {
rockchip,pins =
/** gc2093 camera power down */
<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
/** gc2093 camera reset */
<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
@@ -580,6 +576,5 @@
BT,reset_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "disabled";
status = "okay";
};

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@@ -14,7 +14,7 @@
#include <dt-bindings/pinctrl/rockchip.h>
#include "../rk3568.dtsi"
#include "../rk3566.dtsi"
/ {
@@ -131,7 +131,7 @@
};
rk809_sound: rk809-sound {
status = "disabled";
status = "okay";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk809";
//hp-det-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
@@ -188,7 +188,6 @@
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
/*
vcc5v0_usb: vcc5v0-usb {
compatible = "regulator-fixed";
@@ -367,7 +366,7 @@
&i2c0 {
status = "disabled";
status = "okay";
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
@@ -768,12 +767,12 @@
*/
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc_3v3>;
vccio1-supply = <&vcc_3v3>;
vccio3-supply = <&vcc_3v3>;
vccio4-supply = <&vcc_1v8>;
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};

View File

@@ -2,27 +2,27 @@
&gmac0 {
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
assigned-clock-rates = <0>, <125000000>;
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>, <&cru CLK_MAC0_OUT>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>, <&cru CLK_MAC0_2TOP>;
assigned-clock-rates = <0>, <125000000>, <25000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk_level2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&eth0_pins
&gmac0_clkinout>;
tx_delay = <0x3c>;
rx_delay = <0x2f>;
tx_delay = <0x2d>;
rx_delay = <0x2c>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
@@ -32,5 +32,6 @@
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
clocks = <&cru CLK_MAC0_OUT>;
};
};

View File

@@ -3,7 +3,7 @@
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;

View File

@@ -1,17 +0,0 @@
&can0 {
compatible = "rockchip,rk3568-can-2.0";
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can0m1_pins>;
status = "okay";
};
&can1 {
compatible = "rockchip,rk3568-can-2.0";
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};

View File

@@ -1,20 +0,0 @@
/ {
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
pcie_dma: pcie-dma@40000000 {
reg = <0x0 0x40000000 0x0 0x10000000>;
no-map;
};
};
};
&pcie3x2 {
compatible = "rockchip,rk3568-pcie-ep";
reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_sys>;
status = "okay";
memory-region = <&pcie_dma>;
};

View File

@@ -32,27 +32,10 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-mipi.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

View File

@@ -28,24 +28,7 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi
arch/arm64/boot/dts/rockchip/rk3588/zkzg-mipi.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi

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@@ -2,40 +2,44 @@
//#include "../rk3588-evb4-lp4-v10-linux.dts"
#include "rp-rk3588-board.dtsi"
#include "rp-tp-i2c6-gt911.dtsi"
#include "rd-rk3588-lcd-gpio.dtsi"
// #include "rp-tp-i2c6-gt911.dtsi"
// #include "rd-rk3588-lcd-gpio.dtsi"
#include "rpdzkj_config.dtsi"
/* usb */
#include "rp-usb-typec-rk3588.dtsi"
#include "rp-usb-host.dtsi"
// #include "rp-usb-typec-rk3588.dtsi"
// #include "rp-usb-host.dtsi"
/* mipi */
#include "zkzg_mipi.dtsi"
/* ethernet */
#include "rp-eth-pcie2gmac-rk3588.dtsi"
// #include "rp-eth-pcie2gmac-rk3588.dtsi"
#include "rp-eth-gmac0.dtsi"
#include "rp-eth-gmac1.dtsi"
/* pcie */
#include "rp-pcie-power-rk3588.dtsi"
#include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
#include "rp-pcie-5g.dtsi"
// #include "rp-pcie-power-rk3588.dtsi"
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
// #include "rp-pcie-5g.dtsi"
/* audio */
#include "rp-audio-rt5640.dtsi"
// #include "rp-audio-rt5640.dtsi"
/* wifi/bt */
#include "rp-wifi-bt-ap6275p-rk3588.dtsi"
// #include "rp-wifi-bt-ap6275p-rk3588.dtsi"
/* hdmi rx */
#include "rp-hdmirx.dtsi"
// #include "rp-hdmirx.dtsi"
/* camera */
/***********all camera config********/
//#include "rp-camera-dcphy0.dtsi"
#include "rp-camera-dcphy1.dtsi"
#include "rp-camera-dphy0.dtsi"
#include "rp-camera-dphy1.dtsi"
// #include "rp-camera-dcphy1.dtsi"
// #include "rp-camera-dphy0.dtsi"
// #include "rp-camera-dphy1.dtsi"
//#include "rp-camera-dcphy0-ov13855.dtsi"
//#include "rp-camera-dcphy1-ov13855.dtsi"
@@ -59,13 +63,13 @@
//#include "rp-camera-dphy0-imx415.dtsi"
/******************************************/
//#include "rp-lcd-hdmi0.dtsi" //batch ignore
//#include "rp-lcd-hdmi1.dtsi" //batch ignore
// #include "rp-lcd-hdmi0.dtsi" //batch ignore
// #include "rp-lcd-hdmi1.dtsi" //batch ignore
//#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore
#include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
// #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
/* lcd */
#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
// #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
@@ -114,7 +118,7 @@
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
status = "disabled";
};
rp_power{
@@ -133,24 +137,24 @@
// gpio_function = <4>;
//};
led {
gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
// led {
// gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
// gpio_function = <3>;
// };
usb-host-power {
gpio_num = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb-hub-reset {
gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
// usb-hub-reset {
// gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
};
rp_gpio{
status = "okay";
status = "disabled";
compatible = "rp_gpio";
gpio3c7 {
@@ -160,49 +164,101 @@
};
};
&uart1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart0 {
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
pinctrl-0 = <&uart6m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
pinctrl-0 = <&uart7m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart8 {
status = "okay";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
};
&can0 {
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
status = "okay";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
&spi3 {
status = "disabled";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "okay";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
@@ -221,9 +277,8 @@
};
&sdmmc {
status = "okay";
status = "disabled";
};
&fiq_debugger {
@@ -231,14 +286,58 @@
};
&display_subsystem {
clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
};
&hdptxphy_hdmi_clk0 {
status = "okay";
status = "disabled";
};
&hdptxphy_hdmi_clk1 {
status = "okay";
status = "disabled";
};
&pwm14 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm14m1_pins>; // 选择 PWM1 的引脚复用
#pwm-cells = <3>;
};
&pwm15 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm15m1_pins>; // 选择 PWM1 的引脚复用
#pwm-cells = <3>;
};
&pwm11 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm11m1_pins>;
#pwm-cells = <3>;
};
&pwm13 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm13m1_pins>;
#pwm-cells = <3>;
};
&i2c1 {
status = "okay"; // 启用 I2C1 总线
pinctrl-names = "default"; // 引脚控制状态名称
pinctrl-0 = <&i2c1m2_xfer>; // 使用 i2c1m2_xfer 引脚配置
};
&i2c2 {
status = "okay"; // 启用 I2C2 总线
pinctrl-names = "default"; // 引脚控制状态名称
pinctrl-0 = <&i2c2m3_xfer>; // 使用 i2c2m3_xfer 引脚配置
};

View File

@@ -9,9 +9,9 @@
&gmac0 {
// Use rgmii-rxid mode to disable rx delay inside Soc
phy-mode = "rgmii-rxid";
clock_in_out = "output";
clock_in_out = "input";
snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
// Reset time is 20ms, 100ms for rtl8211f
snps,reset-delays-us = <0 20000 100000>;
@@ -21,7 +21,9 @@
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
&gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
tx_delay = <0x44>;
// rx_delay = <0x4f>;

View File

@@ -12,7 +12,7 @@
phy-mode = "rgmii-rxid";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
snps,reset-gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
// Reset time is 20ms, 100ms for rtl8211f
snps,reset-delays-us = <0 20000 100000>;
@@ -23,8 +23,8 @@
&gmac1_rx_bus2
&gmac1_rgmii_clk
&gmac1_rgmii_bus
&gmac1_clkinout
&eth1_pins>;
&gmac1_clkinout>;
// &eth1_pins>;
tx_delay = <0x44>;
// rx_delay = <0x4f>;

View File

@@ -39,10 +39,27 @@
&usbhost3_0 {
status = "disabled";
status = "okay";
};
&usbhost_dwc3_0 {
status = "disabled";
status = "okay";
};
&usbdrd_dwc3_0 {
extcon=<&u2phy0>;
status="okay";
};
&u2phy0 {
status = "okay";
};
&usbdrd_dwc3_1 {
extcon=<&u2phy1>;
status="okay";
};
&u2phy1 {
status = "okay";
};

133
rk3588/zkzg-mipi.dtsi Normal file
View File

@@ -0,0 +1,133 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&mipi_dcphy0 {
status = "okay";
};
&csi2_dcphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidcphy0_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mvcam_out4>;
// 修改为 4 lane
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidcphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&i2c7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c7m0_xfer>;
mvcam_4: mvcam@3b{
status = "okay";
compatible = "veye,mvcam";
reg = <0x3b>;
// 电源控制引脚
pwdn-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
// 新增复位引脚
reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
mvcam_out4: endpoint {
remote-endpoint = <&mipidcphy0_in_ucam0>;
// 修改为 4 lane
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidcphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in0>;
};
};
};
};
&rkcif_mipi_lvds {
status = "okay";
port {
cif_mipi_in0: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "disabled";
port {
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp1_in1>;
};
};
};
&rkisp1_vir0 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp1_in1: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};

129
rk3588/zkzg_mipi.dtsi Normal file
View File

@@ -0,0 +1,129 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&csi2_dcphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidcphy0_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mvcam_out4>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidcphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&i2c7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c7m0_xfer>;
mvcam_4: mvcam@3b{
status = "okay";
compatible = "veye,mvcam";
reg = <0x3b>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M2>;
clock-names = "xvclk";
power-domains = <&power RK3588_PD_VI>;
pinctrl-names = "default";
pinctrl-0 = <&mipim0_camera2_clk>;
rockchip,grf = <&sys_grf>;
reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
mvcam_out4: endpoint {
remote-endpoint = <&mipidcphy0_in_ucam0>;
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi_dcphy0 {
status = "okay";
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
// 修正这里endpoint@0 和 reg = <0>
mipi0_csi2_input: endpoint@0 {
reg = <0>;
remote-endpoint = <&csidcphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in0>;
};
};
};
};
&rkcif {
status = "okay";
};
&rkcif_mmu {
status = "okay";
};
&rkcif_mipi_lvds {
status = "okay";
port {
cif_mipi_in0: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
};
};
};
// 以下ISP相关配置可以保持disabled先确保基础链路通
&rkcif_mipi_lvds_sditf {
status = "disabled";
};
&rkisp1_vir0 {
status = "disabled";
};