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zhangpeng
2025-04-28 11:36:59 +08:00
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426
rk356x/dr4-rk3566.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3566-evb1-ddr4-v10
//#include "rk3566-evb1-ddr4-v10.dtsi"
#include "rk3566-evb-rpdzkj-rk809-syr837.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3566.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m0-pro-rk3566.dtsi"
/***************************************************/
/*************************pcie***********************/
#include "rk3568-pcie2x1.dtsi"
/***************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "lcd-gpio-dr4-rk3566.dtsi"
/* HDMI only */
//#include "rp-lcd-hdmi.dtsi"
/** MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** mipi0 to LVDS */
//#include "rp-lcd-mipi0tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi0tolvds-gm8775c-1920-1080.dtsi"
/** LVDS + HDMI */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
/** EDP */
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/ {
model = "dr4-rk3566";
compatible = "rpdzkj,dr4-rk3566", "rockchip,rk3566";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
/**
* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio, refer to above define.
* };
*/
/******* sytem power en pin, donnot change it only if you know what you are doing */
pwr_en { //vdd 12v/5v/3.3v enable
gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
vdd_3g { //vdd_3G 3.3v enable
gpio_num = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //SPK ENABLE
gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //SPK MUTE, high active, nomal low
gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
hub_rst { //usb hub reset pin
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
host1_5v { //host1 usb2.0 power en
gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
host2_5v { //host2 usb2.0 power en
gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
host3_5v { //host2 usb2.0 power en
gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb20_5v { //usb2.0 power en
gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb30_5v { //usb3.0 power en
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_5v { //OTG host power en
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_mode { //OTG SWITCH, high is mean otg_id to 0, foece host mode
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
led { //system led
gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
//fan { //fan en
// gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
//};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/***** gpio, add you want to control as blow */
gpio0c5 {
gpio_num = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio0c7 {
gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1a4 {
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
/** 24M osc clock to mcp2515 */
osc_24m: osc24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&pwm7 {
/** disable for used to be led control */
status = "disabled";
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
irq_gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
};
};
&i2c5 {
status = "disabled";
};
&gmac1 {
tx_delay = <0x49>;
rx_delay = <0x2d>;
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m1_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer>;
};
&spi1 {
status = "okay";
/* rewrite pinctrl, for cs1 used to be gpio */
pinctrl-0 = <&spi1m0_cs0 &spi1m0_pins>;
pinctrl-1 = <&spi1m0_cs0 &spi1m0_pins_hs>;
spi2can: mcp2515@0 {
compatible = "microchip,mcp2515";
reg = <0>;
clocks = <&osc_24m>;
interrupt-parent = <&gpio2>;
interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
// vdd-supply = <&reg5v0>;
// xceiver-supply = <&reg5v0>;
spi-max-frequency = <10000000>;
};
};
&spi2 {
status = "okay";
/* rewrite pinctrl, for cs1 used to be gpio */
pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>;
pinctrl-1 = <&spi2m0_cs0 &spi2m0_pins_hs>;
spi2_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi3 {
status = "okay";
/* rewrite pinctrl for cs1 used to be camera clk */
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
/*************************wifi bt***********************/
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
};
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
/** camera config */
&vcc_camera {
pinctrl-names = "default";
pinctrl-0 = <&camera_pwr>;
gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&gc2093 {
pwdn-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
};
/** pinctrl of camera power en */
&camera_pwr {
rockchip,pins =
/* camera power en */
<4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
/***************************************************/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/** LCD configuration */
#ifdef RP_MIPI02LVDS
//pwm and enable pin may be inverted if use mipi2lvds
#if !defined(RP_DUALLVDS)
//but dual lvds donot need invert
&backlight4 {
pwms = <&pwm4 0 25000 1>;
};
#else
&backlight4 {
pwms = <&pwm4 0 25000 0>;
};
#endif
&vcc3v3_lcd0_n {
/delete-property/ enable-active-high;
enable-active-low;
};
#endif
/** pcie2x1 configuration */
&vcc3v3_pcie {
gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
};
&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
};
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&i2c1 {
status = "okay";
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

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rk356x/dr4-rk3568.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-camera-mipi-gc2093-single-2lane.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
#include "rp-can0-m0-rk3568.dtsi"
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/*********************PCIE**************************/
#include "rk3568-pcie2x1.dtsi"
#include "rk3568-pcie3x2.dtsi"
/***************************************************/
/*************************SATA***********************/
#include "rk3568-sata1.dtsi"
/***************************************************/
#include "lcd-gpio-dr4-rk3568.dtsi" //gpio config for lcd
/****** LCD config reference **/
/** single HDMI */
//#include "rp-lcd-hdmi.dtsi"
/** mipi0 +hdmi */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** MIPI2LVDS + HDMI */
//#include "rp-lcd-mipi0tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi0tolvds-gm8775c-1920-1080.dtsi"
/** LVDS + HDMI */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
#include "rp-lcd-lvds-10-1280-800-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/** EDP + HDMI */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/** LVDS + eDP + HDMI */
//#include "rp-lcd-triple-lvds-7-1024-600-edp-13-1920-1080-hdmi.dtsi"
/{
model = "dr4-rk3568";
compatible = "rpdzkj,dr4-rk3568", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-name = "default";
pinctrl-0 = <&rp_power>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
/**
* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio, refer to above define.
* };
*/
led { //system led
gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
//fan { //fan
// gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
//};
otg_mode { //OTG SWITCH, high is mean otg_id to 0, force host mode
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr0 { //host0 power en
gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr1 { //host1 power en
gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr2 { //host2 power en
gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr3 { //host3 power en
gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr4 { //host4 power en
gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
vdd_3g { //4G module power en
gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/**
* gpioxxx { // the node name will display on /proc/rp_gpio, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio： 0 output, 1 input, 3 blink
* gpio_event = <KEY_F14>; // optional property used to define gpio report event such as KEY_F14, only works incase of gpio_function = <1>;
* };
*/
gpio0a0 {
gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio3c1 {
gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio4c4 {
gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio0c2 {
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio2d2 {
gpio_num = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio2b2 {
gpio_num = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio3d0 {
gpio_num = <&gpio3 RK_PD0 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio3d1 {
gpio_num = <&gpio0 RK_PD1 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio3d2 {
gpio_num = <&gpio3 RK_PD2 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio3d3 {
gpio_num = <&gpio3 RK_PD3 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio3d4 {
gpio_num = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
gpio3d5 {
gpio_num = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m1_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
/** redefine pins for cs1 used to be pwm5 */
pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
pinctrl-1 = <&spi0m0_cs0 &spi0m0_pins_hs>;
spi_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&video_phy1 {
status = "okay";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm7 {
/****** disable for gpio used to be spi0_cs0 */
status = "disabled";
};
/** LCD backlight
* By default, we all use backlight4 node whether it is mipi, lvds or edp,
* but when mipi1(2lvds) ports used, pwm need the pwm5,
* when edp port used, pwm need the pwm10, so fix backlight node.
* and if mutiple lcd used, we just use the backlight5, backlight10.
*/
/** LCD configuration */
#if defined(RP_SINGLE_LCD)
#if defined(RP_MIPI02LVDS)
&dsi0_panel {
enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
};
#if defined(RP_DUALLVDS)
// dual lvds donot need invert
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#else
//pwm and enable pin may be inverted if use mipi to single lvds
&backlight4 {
pwms = <&pwm5 0 25000 1>;
};
#endif
#elif defined(RP_EDP_USED)
&backlight4 {
pwms = <&pwm10 0 25000 0>;
};
#endif
#else
&edp_panel {
backlight = <&backlight10>;
};
#ifdef RP_MIPI02LVDS
&dsi0_panel {
backlight = <&backlight5>;
};
#endif
#endif
/** Ethernet config*/
&gmac1 {
tx_delay = <0x49>;
rx_delay = <0x29>;
status = "okay";
};
/** headphone detect pin */
&rk_headset {
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_HIGH>;
};
/** wifi/bt config */
&sdio_pwrseq {
pinctrl-0 = <&wifi_enable_h>;
reset-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_LOW>;
};
&sdmmc2 {
status = "disabled";
};
&sdmmc1 {
status = "okay";
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
sd-uhs-sdr104;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
};
&wireless_wlan {
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&uart1m0_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
};
/** pcie2x1 */
&vcc3v3_pcie {
/**
* delete for gpio used to be bt_wake_host
* and the vcc3v3_pcie need not control on our board.
*/
/delete-property/ gpio;
};
&pcie2x1 {
status = "okay";
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
};
/** pcie3x2 */
&pcie3x2 {
status = "okay";
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie3>;
};
&vcc3v3_pcie3 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3_3v3>;
gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
startup-delay-us = <8000>; //5000 is faild
};
/** mipi camera config */
&vcc_camera {
gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&camera_en>;
};
&gc2093 {
pinctrl-names = "default";
pinctrl-0 = <&cif_clk>;
pinctrl-1 = <&camera_ctl>;
pwdn-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
&pinctrl {
rp_pins {
rp_power: rp-power {
rockchip,pins =
/* host4 power en */
<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
headphone { //redefine hp detect pin
hp_det: hp-det {
rockchip,pins =
<2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio-pwrseq { //redefine sdio power pin
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan { //redefine wlan wake host pin
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <2 RK_PC6 0 &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 0 &pcfg_pull_none>;
};
};
vcc3v3-pcie3 {
pcie3_3v3: pcie3-3v3 {
rockchip,pins =
/** power supply enable pin */
<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
camera-pins {
camera_en: camera-en {
rockchip,pins =
/** gc2093 camera en */
<2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
camera_ctl: camera-ctl {
rockchip,pins =
/** gc2093 camera power down */
<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
/** gc2093 camera reset */
<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&wireless_bluetooth {
pinctrl-0 = <&uart1m0_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};

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rk356x/lcd-gpio-dr4-rk3566.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
/************** LCD GPIO ********************/
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
//enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; //use on vcc3v3_lcd
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

228
rk356x/lcd-gpio-dr4-rk3568.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 1>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight10: backlight10 {
compatible = "pwm-backlight";
pwms = <&pwm10 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
&pwm10 {
status = "okay";
};
// MIPI DSI0 or MIPI0toLVDS
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mipi0_pins>;
backlight = <&backlight4>;
};
// MIPI DSI1
&dsi1_panel {
status = "disabled";
};
// LVDS
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //raw interface is inverse, so set to low
// reset-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mipi0_pins>;
backlight = <&backlight4>;
};
// EDP
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
pinctrl-names = "default";
pinctrl-0 = <&edp_pins>;
enable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
backlight = <&backlight4>;
};
// POWER GPIO
&vcc3v3_lcd0_n {
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
/delete-property/ gpio;
enable-active-high;
};
// TP
&i2c3 {
gt9xx: goodix_ts@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix_rst_gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA4 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
gt1x: goodix_gt1x@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix,rst-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA4 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
};
&pinctrl {
lcd_pins {
mipi0_pins: mipi1-pins {
rockchip,pins =
/** mipi0 enable */
<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
/** mipi0 reset */
<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
edp_pins: edp-pins {
rockchip,pins =
/** edp enable */
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_pins: goodix-pins {
rockchip,pins =
/** rst pin */
<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>,
/** irq pin */
<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

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rk356x/lcd-gpio-lga-rk3566.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
/************** LCD GPIO ********************/
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
//enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>; //use on vcc3v3_lcd
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

141
rk356x/lcd-gpio-nano-box-rk3568.dtsi Executable file
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/**
*
* for compatible with different board type, this file is used to
* predefine lcd configuration cause of those pins may different on
* different board.
*
*/
/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
/** predefine for edp panel, will enable in edp lcd dtsi */
edp_panel:panel {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
/** predefine for lvds panel, will enable in lvds lcd dtsi */
lvds_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
/** predefine for dsi panel, will enable in mipi lcd dtsi */
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
};
};
/** enable backlight pwm channel */
&pwm4 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
/** tp configuration, will enable in lcd dtsi */
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

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rk356x/lcd-gpio-nano-rk3566.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
/************** LCD GPIO ********************/
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
//MIPI0
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// MIPI1 to LVDS
&dsi1_panel {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
reset-gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mipi1_pins>;
backlight = <&backlight4>;
};
//LVDS
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
//enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
//EDP
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
//TP
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PA3 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PA3 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd_pins {
lcd_rst_gpio: lcd_rst_gpio {
rockchip,pins = <3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipi1_pins: mipi0_pins {
rockchip,pins =
<3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
<3 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

198
rk356x/lcd-gpio-nano-rk3568.dtsi Executable file
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/ {
backlight5: backlight {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight8: backlight8 {
compatible = "pwm-backlight";
pwms = <&pwm8 0 25000 1>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm5 {
status = "okay";
};
&pwm8 {
status = "okay";
};
// MIPI DSI0
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mipi0_pins>;
backlight = <&backlight5>;
};
// MIPI1toLVDS
&dsi1_panel {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
reset-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mipi1_pins>;
backlight = <&backlight5>;
};
// LVDS
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
// reset-gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mipi0_pins>;
backlight = <&backlight5>;
};
// EDP
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
pinctrl-names = "default";
pinctrl-0 = <&edp_pins>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
backlight = <&backlight5>;
};
// POWER GPIO
&vcc3v3_lcd0_n {
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
/delete-property/ gpio;
enable-active-high;
};
// TP
&i2c1 {
gt9xx: goodix_ts@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
gt1x: goodix_gt1x@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
};
&pinctrl {
lcd_pins {
mipi0_pins: mipi0-pins {
rockchip,pins =
/** mipi0 enable */
<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
/** mipi0 reset */
<3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipi1_pins: mipi1-pins {
rockchip,pins =
/** mipi1 enable */
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
/** mipi1 reset */
<4 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
edp_pins: edp-pins {
rockchip,pins =
/** edp enable */
<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_pins: goodix-pins {
rockchip,pins =
/** rst pin */
<0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>,
/** irq pin */
<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

148
rk356x/lcd-gpio-pro-rk3566.dtsi Executable file
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/**
*
* for compatible with different board type, this file is used to
* predefine lcd configuration cause of those pins may different on
* different board.
*
*/
/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
/** predefine for edp panel, will enable in edp lcd dtsi */
edp_panel:panel {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
/** predefine for lvds panel, will enable in lvds lcd dtsi */
lvds_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
/** predefine for dsi panel, will enable in mipi lcd dtsi */
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
/** enable backlight pwm channel */
&pwm4 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
/** tp configuration, will enable in lcd dtsi */
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

197
rk356x/lcd-gpio-pro-rk3568.dtsi Executable file
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@@ -0,0 +1,197 @@
/**
*
* for compatible with different board type, this file is used to
* predefine lcd configuration cause of those pins may different on
* different board.
*
*/
/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
/** predefine for edp panel, will enable in edp lcd dtsi */
edp_panel:panel {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight5>;
};
/** predefine for lvds panel, will enable in lvds lcd dtsi */
lvds_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
/** predefine for dsi panel, will enable in mipi lcd dtsi */
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight5>;
};
};
// EDP
&edp {
hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
};
/** enable backlight pwm channel */
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
/** tp configuration, will enable in lcd dtsi */
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

237
rk356x/lcd-gpio-pro3568-ahd.dtsi Executable file
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@@ -0,0 +1,237 @@
/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 1>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 1>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight10: backlight10 {
compatible = "pwm-backlight";
pwms = <&pwm10 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
&pwm10 {
status = "okay";
};
// MIPI DSI0
&dsi0_panel {
power-supply = <&vcc3v3_lcd_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lvds_pins>;
backlight = <&backlight4>;
};
// MIPI DSI1 or mipi2lvds
&dsi1_panel {
power-supply = <&vcc3v3_lcd_n>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; //raw lvds is inverse
reset-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&mipi1_pins>;
backlight = <&backlight4>;
};
// LVDS
&lvds_panel {
power-supply = <&vcc3v3_lcd_n>;
enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
// reset-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lvds_pins>;
backlight = <&backlight4>;
};
// EDP
&edp_panel {
power-supply = <&vcc3v3_lcd_n>;
pinctrl-names = "default";
pinctrl-0 = <&edp_pins>;
enable-gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
backlight = <&backlight4>;
};
// POWER GPIO
&vcc3v3_lcd_n {
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
/delete-property/ gpio;
enable-active-high;
};
// TP
&i2c3 {
gt9xx: goodix_ts@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix_rst_gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA3 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
gt1x: goodix_gt1x@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix,rst-gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA3 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
};
&pinctrl {
lcd_pins {
mipi1_pins: mipi1-pins {
rockchip,pins =
/** mipi1 enable */
<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
/** mipi1 reset */
<3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
lvds_pins: lvds-pins {
rockchip,pins =
/** lvds enable */
<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
edp_pins: edp-pins {
rockchip,pins =
/** edp enable */
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_pins: goodix-pins {
rockchip,pins =
/** rst pin */
<3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
/** irq pin */
<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

143
rk356x/lcd-gpio-rp-box-rk3566.dtsi Executable file
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/**
*
* for compatible with different board type, this file is used to
* predefine lcd configuration cause of those pins may different on
* different board.
*
*/
/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
/** predefine for edp panel, will enable in edp lcd dtsi */
edp_panel:panel {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
/** predefine for lvds panel, will enable in lvds lcd dtsi */
lvds_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
/** predefine for dsi panel, will enable in mipi lcd dtsi */
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
&dsi1 {
dsi1_panel: panel@0 {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
/** enable backlight pwm channel */
&pwm4 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
/** tp configuration, will enable in lcd dtsi */
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

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rk356x/lcd-gpio-rp-box-rk3568.dtsi Executable file
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/**
*
* for compatible with different board type, this file is used to
* predefine lcd configuration cause of those pins may different on
* different board.
*
*/
/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
/** predefine for edp panel, will enable in edp lcd dtsi */
edp_panel:panel {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
/** predefine for lvds panel, will enable in lvds lcd dtsi */
lvds_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
/** predefine for dsi panel, will enable in mipi lcd dtsi */
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
};
};
/** enable backlight pwm channel */
&pwm4 {
status = "okay";
};
&vcc3v3_lcd0_n {
gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
/** tp configuration, will enable in lcd dtsi */
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

468
rk356x/lga-rk3566.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3566-evb1-ddr4-v10
//#include "rk3566-evb1-ddr4-v10.dtsi"
#include "rk3566-evb-rpdzkj-rk809-syr837.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3566.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m0-pro-rk3566.dtsi"
/***************************************************/
/*************************pcie***********************/
#include "rk3568-pcie2x1.dtsi"
/***************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "lcd-gpio-lga-rk3566.dtsi"
/* HDMI only */
//#include "rp-lcd-hdmi.dtsi"
/** MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** mipi0 to LVDS */
//#include "rp-lcd-mipi0tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi0tolvds-gm8775c-1920-1080.dtsi"
/** LVDS + HDMI */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
/** EDP */
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
//null
/ {
model = "lga-rk3566";
compatible = "rpdzkj,lga-rk3566", "rockchip,rk3566";
vcc3v3_pcie3: gpio-regulator-pcie3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; //In the uboot phase fixed.c resolves gpio
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie30>;
};
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
/**
* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio, refer to above define.
* };
*/
/******* sytem power en pin, donnot change it only if you know what you are doing */
pwr_en { //vdd 12v/5v/3.3v enable
gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
vdd_3g { //vdd_3G 3.3v enable
gpio_num = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //SPK ENABLE
gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //SPK MUTE, high active, nomal low
gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
hub_rst { //usb hub reset pin
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
host1_5v { //host1 usb2.0 power en
gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
host2_5v { //host2 usb2.0 power en
gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
host3_5v { //host2 usb2.0 power en
gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb20_5v { //usb2.0 power en
gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb30_5v { //usb3.0 power en
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_5v { //OTG host power en
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_mode { //OTG SWITCH, high is mean otg_id to 0, foece host mode
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
led { //system led
gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
//fan { //fan en
// gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
//};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/***** gpio, add you want to control as blow */
gpio0c5 {
gpio_num = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio0c7 {
gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1a4 {
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio2b4 {
gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio2b3 {
gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio0d4 {
gpio_num = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio0d3 {
gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
/** 24M osc clock to mcp2515 */
osc_24m: osc24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&pwm7 {
/** disable for used to be led control */
status = "disabled";
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
irq_gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
};
};
&i2c5 {
status = "disabled";
};
&gmac1 {
tx_delay = <0x49>;
rx_delay = <0x2d>;
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m1_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer>;
};
&spi1 {
status = "okay";
/* rewrite pinctrl, for cs1 used to be gpio */
pinctrl-0 = <&spi1m0_cs0 &spi1m0_pins>;
pinctrl-1 = <&spi1m0_cs0 &spi1m0_pins_hs>;
spi2can: mcp2515@0 {
compatible = "microchip,mcp2515";
reg = <0>;
clocks = <&osc_24m>;
interrupt-parent = <&gpio2>;
interrupts = <RK_PC6 IRQ_TYPE_LEVEL_LOW>;
// vdd-supply = <&reg5v0>;
// xceiver-supply = <&reg5v0>;
spi-max-frequency = <10000000>;
};
};
&spi2 {
status = "okay";
/* rewrite pinctrl, for cs1 used to be gpio */
pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>;
pinctrl-1 = <&spi2m0_cs0 &spi2m0_pins_hs>;
spi2_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi3 {
status = "okay";
/* rewrite pinctrl for cs1 used to be camera clk */
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
/*************************wifi bt***********************/
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
};
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
/** camera config */
&vcc_camera {
pinctrl-names = "default";
pinctrl-0 = <&camera_pwr>;
gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&gc2093 {
pwdn-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
};
/** pinctrl of camera power en */
&camera_pwr {
rockchip,pins =
/* camera power en */
<4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
/***************************************************/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/** LCD configuration */
#ifdef RP_MIPI02LVDS
//pwm and enable pin may be inverted if use mipi2lvds
#if !defined(RP_DUALLVDS)
//but dual lvds donot need invert
&backlight4 {
pwms = <&pwm4 0 25000 1>;
};
#else
&backlight4 {
pwms = <&pwm4 0 25000 0>;
};
#endif
&vcc3v3_lcd0_n {
/delete-property/ enable-active-high;
enable-active-low;
};
#endif
/** pcie2x1 configuration */
&vcc3v3_pcie {
gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
};
&pcie2x1 {
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
};
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&i2c1 {
status = "okay";
};
&pinctrl {
vcc3v3-pcie3 {
vcc3v3_pcie30: vcc3v3-pcie3 {
rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};

169
rk356x/lga-rk3568-single-lcd-gpio.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
// MIPI DSI0
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// MIPI DSI1
&dsi1_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// LVDS
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// EDP
//&edp {
// hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
//};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
// POWER GPIO
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
// TP
&i2c1 {
gt9xx: goodix_ts@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

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rk356x/lga-rk3568.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-syr837.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
//#include "rp-mipi-camera-gc2093-rk3568.dtsi"
#include "rp-mipi-camera-gc2093-imx334-imx415-rk3568.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/*********************PCIE**************************/
#include "rk3568-pcie3x1x1.dtsi"
/*************************SATA***********************/
#include "rk3568-sata2.dtsi"
/***************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "lga-rk3568-single-lcd-gpio.dtsi" // gpio config of lcd
/* HDMI */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
//#include "rp-lcd-mipi0-8-800-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
/* MIPI DSI1 */
//#include "rp-lcd-mipi1-7-1024-600.dtsi"
//#include "rp-lcd-mipi1-7-1200-1920.dtsi"
/* LVDS */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1024-600.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/{
model = "lga-rk3568";
compatible = "rpdzkj,lga-rk3568-v10", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
vcc3v3_pi6c: vcc3v3_pi6c { //pcie3 clk enable for m.2
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pi6c";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clk_control>;
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
pinctrl-1 = <&vcc5v0_otg_en>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
led { //system led
gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
/*
fan { //fan
gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
*/
usb_pwr { //usb power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
otg_mode { //OTG SWITCH
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
vdd_4g { //4g power
gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
gpio0b0 {
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio0b7 {
gpio_num = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&i2c1 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "okay";
};
&video_phy1 {
status = "okay";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm7 {
/****** disable for gpio used to be spi0_cs0 */
status = "disabled";
};
/**
* when single mipi1 or edp ports used, pwm need the pwm5,
* and if mutiple lcd used, we just reference the backlight5.
*/
#if (defined(RP_MIPI1_USED) || defined(RP_EDP_USED)) && defined(RP_SINGLE_LCD)
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#endif
/**********************pcie***************************/
&vcc3v3_pcie3 {
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
};
/******* pcie3x1x1 -m..2*****/
&pcie3x1 {
status = "okay";
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
};
/*************************wifi bt***********************/
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/******************************************************/
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie3_control{
pcie_clk_control: pcie-clk-control {
rockchip,pins =
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&rk809_codec {
mic-in-differential;
};

361
rk356x/mini-pc-rk3566.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3566-evb1-ddr4-v10
//#include "rk3566-evb1-ddr4-v10.dtsi"
#include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3566.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m0-pro-rk3566.dtsi"
/***************************************************/
/****************** SINGLE LCD ***************/
#include "pro-rk3566-single-lcd-gpio.dtsi"
/* HDMI */
#include "rp-lcd-hdmi.dtsi"
/* MIPI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
//#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
//#include "rp-lcd-mipi0-8-800-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
/* MIPI1 */
//#include "rp-lcd-mipi1-7-1024-600.dtsi"
/* LVDS */
//#include "rp-lcd-lvds-10-1024-600.dtsi"
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
/ {
model = "mini-pc-rk3566";
compatible = "rpdzkj,mini-pc-rk3566", "rockchip,rk3566";
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
led { //system led
gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb_pwr { //usb host power and otg power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_otg_pwr { //
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
io4_c4 { //
gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
test-power {
/** disable for use rk809-battery */
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&cpu0_opp_table {
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <825000 825000 1150000>;
opp-microvolt-L0 = <825000 825000 1150000>;
opp-microvolt-L1 = <800000 800000 1150000>;
opp-microvolt-L2 = <800000 800000 1150000>;
clock-latency-ns = <40000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <850000 850000 1150000>;
opp-microvolt-L0 = <850000 850000 1150000>;
opp-microvolt-L1 = <825000 825000 1150000>;
opp-microvolt-L2 = <825000 825000 1150000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <900000 900000 1150000>;
opp-microvolt-L0 = <900000 900000 1150000>;
opp-microvolt-L1 = <875000 875000 1150000>;
opp-microvolt-L2 = <850000 850000 1150000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-1104000000 {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt = <950000 950000 1150000>;
opp-microvolt-L0 = <950000 950000 1150000>;
opp-microvolt-L1 = <925000 925000 1150000>;
opp-microvolt-L2 = <900000 900000 1150000>;
clock-latency-ns = <40000>;
};
opp-1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1000000 1000000 1150000>;
opp-microvolt-L0 = <1000000 1000000 1150000>;
opp-microvolt-L1 = <975000 975000 1150000>;
opp-microvolt-L2 = <950000 950000 1150000>;
clock-latency-ns = <40000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1050000 1050000 1150000>;
opp-microvolt-L0 = <1050000 1050000 1150000>;
opp-microvolt-L1 = <1025000 1025000 1150000>;
opp-microvolt-L2 = <1025000 1025000 1150000>;
clock-latency-ns = <40000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1100000 1100000 1150000>;
opp-microvolt-L0 = <1100000 1100000 1150000>;
opp-microvolt-L1 = <1075000 1075000 1150000>;
opp-microvolt-L2 = <1075000 1075000 1150000>;
clock-latency-ns = <40000>;
};
};
&i2c1 {
status = "okay";
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer>;
};
&spi1 {
status = "okay";
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi2 {
status = "okay";
spi2_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi3 {
status = "okay";
pinctrl-names = "default", "high_speed";
pinctrl-0 = <&spi3m1_cs0 /*&spi3m1_cs1*/ &spi3m1_pins>;
pinctrl-1 = <&spi3m1_cs0 /*&spi3m1_cs1*/ &spi3m1_pins_hs>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&edp {
/** delete hdp gpio that pro3566 donot use */
/delete-property/ hpd-gpios;
};
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
&sdmmc2 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
};
&wireless_bluetooth {
uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1m1_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&rk_headset {
status = "okay";
headset_force_flag = <1>;
};
&pinctrl {
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
/************** LCD GPIO ********************/
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
/*
&dsi1_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
*/
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

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rk356x/nano-box-rk3566.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3566-evb1-ddr4-v10
//#include "rk3566-evb1-ddr4-v10.dtsi"
#include "rk3566-evb-rpdzkj-rk809-syr837.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3566.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m0-pro-rk3566.dtsi"
/***************************************************/
/****************** SINGLE LCD ***************/
#include "nano-box-rk3566-single-lcd-gpio.dtsi"
/* HDMI */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** LVDS */
//#include"rp-lcd-lvds-10-1280-800.dtsi"
//#include"rp-lcd-lvds-7-1024-600-v2.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/ {
model = "nano-box-rk3566";
compatible = "rpdzkj,nano-box-rk3566", "rockchip,rk3566";
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
pwr_5v_3v3 { //3.3v 5v enable
gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
led { //system led
gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr { //usb host power and otg power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_rst { //usb hub reset
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //SPK ENABLE
gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //SPK MUTE
gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
usb_mode { //OTG SWITCH
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
otg_pwr {
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/***** SPI_FLASH ********/
gpio1d0 {
gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d1 {
gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d2 {
gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d3 {
gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d4 {
gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
/***** PDM ********/
gpio4a0 {
gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a1 {
gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a2 {
gpio_num = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a3 {
gpio_num = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
stm706 {
status = "okay";
compatible = "stm706";
reset_gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
wdt_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&gmac1 {
tx_delay = <0x42>;
rx_delay = <0x2d>;
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&i2c5 {
status = "disabled";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer>;
};
&spi1 {
status = "okay";
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi2 {
status = "okay";
spi2_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};

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rk356x/nano-box-rk3568-lcd-gpio.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
/************** LCD GPIO ********************/
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3568.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "nano-box-rk3568-lcd-gpio.dtsi" // if use lcd, must enable it
/* HDMI only */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** LVDS */
//#include"rp-lcd-lvds-10-1280-800.dtsi"
//#include"rp-lcd-lvds-7-1024-600-v2.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/************************ MULTILPLE LCD *********************/
/* EDP + MIPI0/LVDS */
//#include "rp-lcd-triple-lvds-7-1024-600-edp-13-1920-1080-hdmi.dtsi"
/{
model = "nano-box-rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
led { //system led
gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
// fan { //fan
// gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
usb_pwr1 { //usb host power1
gpio_num = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr2 { //usb host power2
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_mode { //OTG SWITCH
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
spk_enable { //spk enable
gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
gpio3b5 { //gpio
gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3a7 { //gpio
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
stm706 {
status = "okay";
compatible = "stm706";
reset_gpio = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
wdt_gpio = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&i2c1 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "okay";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
&pwm7 {
/****** disable for gpio used to be spi0_cs0 */
status = "disabled";
};
/*************************wifi bt***********************/
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/******************************************************/
&rk_headset {
status = "disabled";
};
&edp {
/** delete hdp gpio that nano-box-rk3568 donot use */
/delete-property/ hpd-gpios;
};
&pinctrl {
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3566-evb1-ddr4-v10
//#include "rk3566-evb1-ddr4-v10.dtsi"
//#include "rk3566-base-no-rk809.dtsi"
#include "rk3566-evb-rpdzkj-pwm-pwm.dtsi"
#include "../rk3568-linux.dtsi"
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m0-pro-rk3566.dtsi"
/***************************************************/
/*************************pcie***********************/
#include "rk3568-pcie2x1.dtsi"
/***************************************************/
#include "rp-audio-es8311.dtsi"
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "lcd-gpio-nano-rk3566.dtsi"
/* HDMI only */
//#include "rp-lcd-hdmi.dtsi"
/** MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** MIPI1toLVDS + HDMI */
//#include "rp-lcd-mipi1tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi1tolvds-gm8775c-1920-1080.dtsi"
/** LVDS + HDMI */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/** EDP */
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/ {
model = "nano-rk3566";
compatible = "rpdzkj,nano-rk3566", "rockchip,rk3566";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-names = "default";
pinctrl-0 = <&led_pin &fan_pin &usb_pins>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
/**
* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio, refer to above define.
* };
*/
/******* sytem power en pin, donnot change it only if you know what you are doing */
led { //system led
gpio_num = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
//fan { //fan en
// gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
//};
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb3_pwr { //usb3 power en
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb2_vdd0 { //usb2.0_vdd0 power en
gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb2_vdd1 { //usb2.0_vdd1 power en
gpio_num = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
vdd_4g { //4g enable
gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
gpio3d3 {
gpio_num = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3d4 {
gpio_num = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
/***** gpio, add you want to control as blow */
};
rp-keys {
compatible = "rp-keys";
status = "disabled";
name = "rp-keys";
gpio3d3 {
gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
};
gpio3d4 {
label = "gpiokey3d4";
gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
debounce_interval = <10>;
wakeup;
press_type = <0>;
code = <KEY_ENTER>;
};
};
stm706 {
status = "okay";
compatible = "stm706";
reset_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
wdt_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
/** 24M osc clock to mcp2515 */
osc_24m: osc24m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
/** stm706 watchdog pinctrl clash **/
&rk_headset {
status = "disabled";
};
&vcc3v3_sd {
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_sd_pin>;
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
};
&vcc5v0_sys {
enable-active-high;
gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
pinctrl-0 = <&vcc5v0_pin>;
};
&pwm7 {
/** disable for used to be led control */
status = "disabled";
};
/*
* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
* must be consistent with the software configuration correspondingly
* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
* should also be configured to 1.8V accordingly;
* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
* should also be configured to 3.3V accordingly;
* 3/ VCCIO2 voltage control selection (0xFDC20140)
* BIT[0]: 0x0: from GPIO_0A7 (default)
* BIT[0]: 0x1: from GRF
* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
* L:VCCIO2 must supply 3.3V
* H:VCCIO2 must supply 1.8V
*/
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vcc_3v3>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vccio_wl>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&i2c0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c0_xfer>;
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
// irq_gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
};
};
&i2c1 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c5m0_xfer>;
};
&gmac1 {
status = "okay";
snps,reset-gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus
&gmac1m1_clkinout
&eth1m1_pins>;
tx_delay = <0x49>;
rx_delay = <0x2d>;
};
&uart0 {
status = "disbled";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&spi0 {
status = "okay";
/* rewrite pinctrl, for cs1 used to be gpio */
pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
pinctrl-1 = <&spi0m0_cs0 &spi0m0_pins_hs>;
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi3 {
status = "okay";
/* rewrite pinctrl for cs1 used to be camera clk */
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>;
spi3can: mcp2515@0 {
status = "okay";
compatible = "microchip,mcp2515";
reg = <0>;
clocks = <&osc_24m>;
interrupt-parent = <&gpio4>;
interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
// vdd-supply = <&reg5v0>;
// xceiver-supply = <&reg5v0>;
spi-max-frequency = <10000000>;
};
};
/***************************************************/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/** LCD backlight
* By default, we all use backlight4 node whether it is mipi, lvds or edp,
*/
/** LCD configuration */
#if defined(RP_SINGLE_LCD)
#if defined(RP_MIPI12LVDS)
&backlight4 {
pwms = <&pwm5 0 25000 1>;
};
#if defined(RP_DUALLVDS)
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#endif
#endif
#endif
/** wifi/bt config */
&sdio_pwrseq {
pinctrl-0 = <&wifi_enable_h>;
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
};
&sdmmc2 {
status = "disabled";
};
&sdmmc1 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
sd-uhs-sdr104;
status = "okay";
};
&wireless_wlan {
assigned-clocks = <&pmucru CLK_WIFI>;
assigned-clock-rates = <24000000>;
clocks = <&pmucru CLK_WIFI>;
clock-names = "soc_24M";
pinctrl-0 = <&wifi_host_wake_irq &clk32k_out1>;
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&uart1m0_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
};
/** pcie2x1 configuration */
&pcie2x1 {
status = "okay";
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
power_pins {
vcc3v3_sd_pin: vcc3v3_sd_pin {
rockchip,pins =
<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
vcc5v0_pin: vcc5v0-pin {
rockchip,pins =
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
};
led_pin: led-pin {
rockchip,pins =
<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
fan_pin: fan-pin {
rockchip,pins =
<0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb_pins: usb-pins {
rockchip,pins =
/* otg power en */
<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
/* hub reset pin */
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
/* usb3.0 power en */
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
/* usb2.0 vdd0 en */
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
/* usb2.0 vdd1 en */
<0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdio-pwrseq { //redefine sdio power pin
wifi_enable_h: wifi-enable-h {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan { //redefine wlaD4wake host pin
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <2 RK_PB2 0 &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <2 RK_PB5 0 &pcfg_pull_none>;
};
};
};

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rk356x/nano-rk3568.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
// #include "rk3568-evb1-ddr4-v10.dtsi"
//#include "rk3568-base-no-rk809.dtsi"
#include "rk3568-evb-rpdzkj-pwm-pwm-syr837.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-camera-mipi-gc2093-single-2lane.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************CAN**********************/
#include "rp-can1-m1-rk3568.dtsi"
/**************************************************/
/*********************PCIE**************************/
#include "rk3568-pcie2x1.dtsi"
#include "rk3568-pcie3x1x1.dtsi"
#include "rk3568-pcie3x2.dtsi"
/***************************************************/
/*************************SATA***********************/
//#include "rk3568-sata2.dtsi"
/***************************************************/
/* audio */
#include "rp-audio-es8311.dtsi"
#include "lcd-gpio-nano-rk3568.dtsi" //gpio config for lcd
/****** LCD config reference **/
/** single HDMI */
//#include "rp-lcd-hdmi.dtsi"
/** mipi0 +hdmi */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** MIPI1toLVDS + HDMI */
//#include "rp-lcd-mipi1tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi1tolvds-gm8775c-1920-1080.dtsi"
/** LVDS + HDMI */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/** EDP + HDMI */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/{
model = "nano-rk3568";
compatible = "rpdzkj,nano-rk3568", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-names = "default";
pinctrl-0 = <&led_pin &fan_pin &usb_pins>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
/**
* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio, refer to above define.
* };
*/
led { //system led
gpio_num = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
//fan { //fan
// gpio_num = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
//};
otg_power { //usb otg power
gpio_num = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb3_pwr { //usb3 power en
gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb2_vdd0 { //usb2.0_vdd0 power en
gpio_num = <&gpio4 RK_PB7 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb2_vdd1 { //usb2.0_vdd1 power en
gpio_num = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/**
* gpioxxx { // the node name will display on /proc/rp_gpio, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio： 0 output, 1 input, 3 blink
* gpio_event = <KEY_F14>; // optional property used to define gpio report event such as KEY_F14, only works incase of gpio_function = <1>;
* };
*/
/*
gpio3_a7 {
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3_b0 {
gpio_num = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
*/
gpio4_a0 {
gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4_a1 {
gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
stm706 {
status = "okay";
compatible = "stm706";
reset_gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
wdt_gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
};
vcc3v3_pi6c: vcc3v3_pi6c { //pcie3 clk enable for m.2
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pi6c";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clk_control>;
};
vdd3v3_m2: vdd3v3_m2 { //m.2 power enable
compatible = "regulator-fixed";
regulator-name = "vdd3v3_m2";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vdd_m2_control>;
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&vcc5v0_sys {
enable-active-high;
gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_pin>;
};
&vdd_3v3 {
enable-active-high;
pinctrl-names = "default";
pinctrl-0 = <&vdd3v3_pin>;
gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
};
&vcc3v3_sd {
// enable-active-high; //active low
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_sd_pin>;
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
};
&vdd_cpu {
pinctrl-names = "default";
pinctrl-0 = <&vsel1_gpio>;
vsel-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vcc_3v3>;
vccio3-supply = <&vcc_3v3>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&i2c1 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
// irq_gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
};
};
&i2c2
{
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
};
&i2c4
{
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m0_xfer>;
};
&i2c5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c5m0_xfer>;
};
&uart0 {
status = "disabled";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m0_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&spi2 {
status = "okay";
pinctrl-0 = <&spi2m1_cs0 &spi2m1_pins>;
pinctrl-1 = <&spi2m1_cs0 &spi2m1_pins_hs>;
spi_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm1 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm1m0_pins>;
};
&pwm2 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm2m0_pins>;
};
&pwm12{
status = "disabled";
pinctrl-0 = <&pwm12m1_pins>;
pinctrl-names = "active";
};
&pwm13{
status = "disabled";
pinctrl-0 = <&pwm13m1_pins>;
pinctrl-names = "active";
};
/** LCD backlight
* By default, we all use backlight5 node whether it is mipi, lvds or edp,
*/
/** LCD configuration */
#if defined(RP_SINGLE_LCD)
#if defined(RP_MIPI12LVDS)
&backlight5 {
pwms = <&pwm8 0 25000 1>;
};
#if defined(RP_DUALLVDS)
&backlight5 {
pwms = <&pwm8 0 25000 0>;
};
#endif
#endif
#endif
/** headphone detect pin */
&rk_headset {
status = "disabled";
pinctrl-0 = <&hp_det>;
};
/** wifi/bt config */
&sdio_pwrseq {
pinctrl-0 = <&wifi_enable_h>;
reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
};
&sdmmc2 {
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
status = "okay";
};
&sdmmc1 {
status = "disabled";
};
&wireless_wlan {
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-0 = <&uart1m1_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
};
&uart8 {
status = "disabled";
};
/** pcie2x1 */
&vcc3v3_pcie {
/**
* delete for gpio used to be bt_wake_host
* and the vcc3v3_pcie need not control on our board.
*/
/delete-property/ gpio;
};
/******* pcie2x1x1 -rtl8111hs*****/
&pcie2x1 {
status = "okay";
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
};
/******* pcie3x1x1 -rtl8111hs*****/
&pcie3x1 {
status = "okay";
reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
/******* pcie3x2x1 -m.2*****/
&pcie3x2 {
status = "okay";
reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
pmic {
vsel1_gpio: vsel1-gpio {
rockchip,pins =
<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
power_pins {
vdd3v3_pin: vdd3v3-pin {
rockchip,pins =
<4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
};
vcc5v0_pin: vcc5v0-pin {
rockchip,pins =
<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
};
vcc3v3_sd_pin: vcc3v3-sd-pin {
rockchip,pins =
<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>;
};
led_pin: led-pin {
rockchip,pins =
<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
fan_pin: fan-pin {
rockchip,pins =
<4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
};
usb_pins: usb-pins {
rockchip,pins =
/* otg power en */
<4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
/* hub reset pin */
<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>,
/* usb3.0 power en */
<4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
/* usb2.0 vdd0 en */
<4 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
/* usb2.0 vdd1 en */
<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone { //redefine hp detect pin
hp_det: hp-det {
rockchip,pins =
<2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
sdio-pwrseq { //redefine sdio power pin
wifi_enable_h: wifi-enable-h {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan { //redefine wlaD4wake host pin
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 0 &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <4 RK_PB6 0 &pcfg_pull_none>;
};
};
pcie3_control{
pcie_clk_control: pcie_clk_control {
rockchip,pins =
<4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
vdd_m2_control: vdd_m2_control {
rockchip,pins =
<4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

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rk356x/pro-rk3566-single-lcd-gpio.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
/************** LCD GPIO ********************/
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&dsi1_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

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rk356x/pro-rk3566.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3566-evb1-ddr4-v10
//#include "rk3566-evb1-ddr4-v10.dtsi"
#include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3566.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m0-pro-rk3566.dtsi"
/***************************************************/
/*************************SATA***********************/
#include "rk3568-sata2.dtsi"
/***************************************************/
/****************** SINGLE LCD ***************/
#include "pro-rk3566-single-lcd-gpio.dtsi"
/* HDMI */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
//#include "rp-lcd-mipi0-8-800-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
/* MIPI1 */
//#include "rp-lcd-mipi1-7-1024-600.dtsi"
/* LVDS */
//#include "rp-lcd-lvds-10-1024-600.dtsi"
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
/ {
model = "pro-rk3566";
compatible = "rpdzkj,pro-rk3566", "rockchip,rk3566";
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
pwr_5v_3v3 { //3.3v 5v enable
gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
led { //system led
gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb_pwr { // usb host power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_pwr {
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_rst { //usb hub reset
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //SPK ENABLE
gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //SPK MUTE
gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
usb_mode { //OTG SWITCH
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/***** SPI_FLASH ********/
gpio1d0 {
gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d1 {
gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d2 {
gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d3 {
gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1d4 {
gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
/***** PDM ********/
gpio4a0 {
gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a1 {
gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a2 {
gpio_num = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a3 {
gpio_num = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1a4 {
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3c1 {
gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
test-power {
/** disable for use rk809-battery */
status = "disabled";
};
charge-animation {
compatible = "rockchip,uboot-charge";
rockchip,uboot-charge-on = <0>;
rockchip,android-charge-on = <0>;
rockchip,uboot-low-power-voltage = <7000>;
rockchip,screen-on-voltage = <7000>;
status = "okay";
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&cpu0_opp_table {
opp-408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <825000 825000 1150000>;
opp-microvolt-L0 = <825000 825000 1150000>;
opp-microvolt-L1 = <800000 800000 1150000>;
opp-microvolt-L2 = <800000 800000 1150000>;
clock-latency-ns = <40000>;
};
opp-600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <850000 850000 1150000>;
opp-microvolt-L0 = <850000 850000 1150000>;
opp-microvolt-L1 = <825000 825000 1150000>;
opp-microvolt-L2 = <825000 825000 1150000>;
clock-latency-ns = <40000>;
};
opp-816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <900000 900000 1150000>;
opp-microvolt-L0 = <900000 900000 1150000>;
opp-microvolt-L1 = <875000 875000 1150000>;
opp-microvolt-L2 = <875000 875000 1150000>;
clock-latency-ns = <40000>;
opp-suspend;
};
opp-1104000000 {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt = <950000 950000 1150000>;
opp-microvolt-L0 = <950000 950000 1150000>;
opp-microvolt-L1 = <925000 925000 1150000>;
opp-microvolt-L2 = <925000 925000 1150000>;
clock-latency-ns = <40000>;
};
opp-1416000000 {
opp-hz = /bits/ 64 <1416000000>;
opp-microvolt = <1000000 1000000 1150000>;
opp-microvolt-L0 = <1000000 1000000 1150000>;
opp-microvolt-L1 = <975000 975000 1150000>;
opp-microvolt-L2 = <975000 975000 1150000>;
clock-latency-ns = <40000>;
};
opp-1608000000 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <1050000 1050000 1150000>;
opp-microvolt-L0 = <1050000 1050000 1150000>;
opp-microvolt-L1 = <1025000 1025000 1150000>;
opp-microvolt-L2 = <1025000 1025000 1150000>;
clock-latency-ns = <40000>;
};
opp-1800000000 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <1100000 1100000 1150000>;
opp-microvolt-L0 = <1100000 1100000 1150000>;
opp-microvolt-L1 = <1075000 1075000 1150000>;
opp-microvolt-L2 = <1075000 1075000 1150000>;
clock-latency-ns = <40000>;
};
};
&i2c1 {
status = "okay";
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer>;
};
&spi1 {
status = "okay";
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi2 {
status = "okay";
spi2_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi3 {
status = "okay";
num-cs = <1>;
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&edp {
/** delete hdp gpio that pro3566 donot use */
/delete-property/ hpd-gpios;
};
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
&rk809 {
battery {
compatible = "rk817,battery";
pinctrl-names = "default";
pinctrl-0 = <&rp_bat_pins>;
ocv_table = < 7024 7072 7080 7096 7104 7112 7120
7136 7152 7168 7184 7224 7264 7320
7392 7512 7612 7724 7828 7928 8100>;
design_capacity = <5000>;
design_qmax = <5100>;
bat_res = <100>;
sleep_enter_current = <300>;
sleep_exit_current = <300>;
sleep_filter_current = <100>;
power_off_thresd = <7024>;
zero_algorithm_vol = <7400>;
max_soc_offset = <60>;
monitor_sec = <5>;
sample_res = <20>;
bat_res_up = <140>;
bat_res_down = <20>;
virtual_power = <0>; //test mode, 1 to force report 66%
energy_mode = <0>;
register_chg_psy = <1>; //rk817 report charge state
plug-det-gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>; //rpdzkj add for detect charge state, need register_chg_psy = 1, active state is plugin.
full-det-gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; //rpdzkj add for detect charge status whether is full.
};
};
&sdmmc2 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
};
&wireless_bluetooth {
uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1m1_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&rk_headset {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
rp-pins {
rp_bat_pins: rp-bat-pins {
rockchip,pins =
<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&rk809_codec {
mic-in-differential;
};

170
rk356x/pro-rk3568-ahd-single-lcd-gpio.dtsi Executable file
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@@ -0,0 +1,170 @@
/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
// MIPI DSI0
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// MIPI DSI1 TO LVDS
&dsi1_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// EDP
&edp {
/** delete hdp gpio that pro-rk3568-ahd donot use */
/delete-property/ hpd-gpios;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
// POWER GPIO
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
// TP
&i2c1 {
gt9xx: goodix_ts@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

432
rk356x/pro-rk3568-ahd.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-xs9922b-ahd.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
//#include "rp-can1-m1-rk3568.dtsi"
//#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/*************************PCIE***********************/
#include "rk3568-pcie2x1.dtsi"
#include "rk3568-pcie3x2.dtsi"
/***************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "pro-rk3568-ahd-single-lcd-gpio.dtsi" // gpio config of lcd
/* HDMI */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
//#include "rp-lcd-mipi0-8-800-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
/* MIPI DSI1 to LVDS*/
//#include "rp-lcd-mipi1tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi1tolvds-gm8775c-1920-1080.dtsi"
/* EDP */
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/{
model = "pro-rk3568-ahd";
compatible = "rpdzkj,pro-rk3568-v10", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
vdd_5v_3v3: vdd_5v_3v3 {
compatible = "regulator-fixed";
regulator-name = "vdd_5v_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //注意驱动解析的是gpio还是gpios
gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vdd_5v_3v3_control>;
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
pinctrl-1 = <&vcc5v0_otg_en>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
led { //system led
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
// fan { //fan
// gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
usb_pwr { //usb power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
/*
vdd_5v_3v3 {
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
*/
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
xs9922b_31_pwr { //ahd power
gpio_num = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
xs9922b_30_pwr { //v10:need enable ahd_30 power ;Otherwise, this i2c cannot read other devices
gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
vdd_4G{
gpio_num = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
gps_power{
gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&i2c1 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
/*open gps power*/
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
pinctrl-1 = <&spi0m0_cs0 &spi0m0_pins_hs>;
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "okay";
};
&video_phy1 {
status = "okay";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm7 {
/****** disable for gpio used to be spi0_cs0 */
status = "disabled";
};
/**
* when single [mipi1 to lvds] ports used, pwm need the pwm5,
* and if mutiple lcd used, we just reference the backlight5.
*/
#if defined(RP_MIPI12LVDS) && defined(RP_SINGLE_LCD)
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#endif
/** pcie2x1 */
&vcc3v3_pcie {
gpio = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
};
/** pcie3x2 */
&pcie3x2 {
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie3>;
};
&vcc3v3_pcie3 {
pinctrl-names = "default";
pinctrl-0 = <&pcie3_3v3>;
gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
startup-delay-us = <8000>; //5000 is faild
};
/*************************wifi bt***********************/
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/******************************************************/
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
vcc3v3-pcie3 {
pcie3_3v3: pcie3-3v3 {
rockchip,pins =
/** power supply enable pin */
<0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
vdd-5v-3v3 {
vdd_5v_3v3_control: vdd-5v-3v3-control {
rockchip,pins =
/** power supply enable pin */
<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

43
rk356x/pro-rk3568-dual-lcd-gpio.dtsi Executable file
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/**
* multiple lcd config compatible
*/
// MIPI DSI0
&dsi0_panel {
/** delete property that conflict with other panel, they are common */
/delete-property/ power-supply;
/delete-property/ reset-gpios;
/delete-property/ pinctrl-names;
/delete-property/ pinctrl-0;
backlight = <&backlight4>;
};
// MIPI DSI1
&dsi1_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight5>;
};
// LVDS
&lvds_panel {
backlight = <&backlight4>;
/** delete property that conflict with other panel, they are common */
/delete-property/ power-supply;
/delete-property/ reset-gpios;
/delete-property/ pinctrl-names;
/delete-property/ pinctrl-0;
};
// EDP
&edp_panel {
backlight = <&backlight5>;
/** delete property that conflict with other panel, it is common */
/delete-property/ power-supply;
};

180
rk356x/pro-rk3568-h-single-lcd-gpio.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
// MIPI DSI0
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi0_pins>;
backlight = <&backlight4>;
};
// LVDS
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
// reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi0_pins>;
backlight = <&backlight4>;
};
// EDP
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
pinctrl-names = "default";
pinctrl-0 = <&edp_pins>;
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
backlight = <&backlight4>;
};
// POWER GPIO
&vcc3v3_lcd0_n {
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
/delete-property/ gpio;
enable-active-high;
};
// TP
&i2c1 {
gt9xx: goodix_ts@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
gt1x: goodix_gt1x@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_pins>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
};
&pinctrl {
lcd_pins {
mipi0_pins: mipi0-pins {
rockchip,pins =
/** mipi0 enable */
<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
/** mipi0 reset */
<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
edp_pins: edp-pins {
rockchip,pins =
/** edp enable */
<0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_pins: goodix-pins {
rockchip,pins =
/** rst pin */
<3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,
/** irq pin */
<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

473
rk356x/pro-rk3568-h.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm-pcie-wifi.dtsi"
#include "../rk3568-linux.dtsi"
/*************************HDMI IN***********************/
#include "rp-mipi-camera-rk628d-csi2hdmi.dtsi"
/***************************************************/
/*************************PCIE***********************/
#include "rk3568-pcie2x1.dtsi"
#include "rp-pcie-5g.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/*************************wifi***********************/
#include "rp-wifi-bt-ap6275p-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "pro-rk3568-h-single-lcd-gpio.dtsi"
/* HDMI */
//#include "rp-lcd-mipi2hdmi-lt8912.dtsi" //dsi1-lt8912-hdmi + HDMI
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
//#include "rp-lcd-mipi0-8-800-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
/* LVDS */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1024-600.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/*MIPI TO LVDS */
//#include "rp-lcd-mipi0tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi0tolvds-gm8775c-1920-1080.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
//null
//null
//null
#ifdef RP_TRIPLE_LCD
#include "pro-rk3568-triple-lcd-gpio.dtsi" // if use triple lcd, must enable it
#endif
#ifdef RP_DUAL_LCD
#include "pro-rk3568-dual-lcd-gpio.dtsi" // if use dual lcd, must enable it
#endif
/{
model = "pro-rk3568-h";
compatible = "rpdzkj,pro-rk3568-h", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
vcc3v3_pcie3: gpio-regulator-pcie3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //In the uboot phase fixed.c resolves gpio
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie30>;
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
pinctrl-1 = <&vcc5v0_otg_en>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
led { //system led
gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb_pwr { //usb power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
uart_en {
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
4g_power { //4g power
gpio_num = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
HDMI_5V {
gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
gpio3b5 { //pcie power
gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3a7 { //pcie clock
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&i2c1 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&sdmmc2 {
status = "disabled";
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "okay";
};
&video_phy1 {
status = "okay";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm7 {
/****** disable for gpio used to be spi0_cs0 */
status = "disabled";
};
/**
* when single mipi1 or edp ports used, pwm need the pwm5,
* and if mutiple lcd used, we just reference the backlight5.
*/
//#if (defined(RP_MIPI1_USED) || defined(RP_EDP_USED)) && defined(RP_SINGLE_LCD)
#if defined(RP_EDP_USED) && defined(RP_SINGLE_LCD)
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#endif
#if defined(RP_SINGLE_LCD) && defined(RP_MIPI02LVDS)
&backlight4{
pwms = <&pwm4 0 25000 0>;
};
&dsi0_panel {
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
};
#endif
/*************************wifi bt***********************/
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>,<&wifi_poweren_gpio>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
WIFI,poweren_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/******************************************************/
&pcie2x1 {
/**
* gpio please refer to main dts:
* reset-gpios = <&gpio* ** ***>;
*/
reset-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
};
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
spi1 {
spi1m1_pins: spi1m1-pins {
rockchip,pins =
/* spi1_clkm1 */
<3 RK_PC3 3 &pcfg_pull_none>,
/* spi1_misom1 */
<3 RK_PC2 3 &pcfg_pull_down>,
/* spi1_mosim1 */
<3 RK_PC1 3 &pcfg_pull_down>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
vcc3v3-pcie3 {
vcc3v3_pcie30: vcc3v3-pcie3 {
rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_poweren_gpio: wifi-poweren-gpio {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

169
rk356x/pro-rk3568-single-lcd-gpio.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
backlight5: backlight5 {
compatible = "pwm-backlight";
pwms = <&pwm5 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
&pwm5 {
status = "okay";
};
// MIPI DSI0
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// MIPI DSI1
&dsi1_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// LVDS
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
// EDP
&edp {
hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
// POWER GPIO
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
// TP
&i2c1 {
gt9xx: goodix_ts@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};

36
rk356x/pro-rk3568-triple-lcd-gpio.dtsi Executable file
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/*
* multiple lcd config compatible
*/
// MIPI DSI0
&dsi0_panel {
status = "disabled";
};
// MIPI DSI1
&dsi1_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight5>;
};
// LVDS
&lvds_panel {
backlight = <&backlight4>;
/** delete property that conflict with other panel, they are common */
/delete-property/ power-supply;
/delete-property/ reset-gpios;
/delete-property/ pinctrl-names;
/delete-property/ pinctrl-0;
};
// EDP
&edp_panel {
/** delete property that conflict with other panel, they are common */
/delete-property/ power-supply;
/delete-property/ backlight;
};

405
rk356x/pro-rk3568.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
//#include "rp-mipi-camera-gc2093-rk3568.dtsi"
//#include "rp-mipi-camera-gc2093-imx334-imx415-rk3568.dtsi"
#include "rp-mipi-camera-gc2093x2-rk3568.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/*************************SATA***********************/
#include "rk3568-sata2.dtsi"
/***************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "pro-rk3568-single-lcd-gpio.dtsi" // gpio config of lcd
/* HDMI */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
//#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
//#include "rp-lcd-mipi0-8-800-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
#include "rp-lcd-mipi1-10-1920-1200.dtsi"
/* MIPI DSI1 */
//#include "rp-lcd-mipi1-7-1024-600.dtsi"
//#include "rp-lcd-mipi1-7-1200-1920.dtsi"
/* LVDS */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1024-600.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/************************ DUAL LCD *********************/
/* LVDS + MIPI1 */
//#include "rp-lcd-dual-lvds-7-1024-600-mipi1-5-720-1280-v2.dtsi"
//#include "rp-lcd-dual-lvds-10-1024-600-mipi1-7-1200-1920.dtsi"
/* MIPI0 + MIPI1 */
//#include "rp-lcd-dual-mipi0-7-1024-600-mipi1-5-720-1280-v2.dtsi"
/********************** TRIPLE LCD ********************/
/* LVDS + MIPI1 + EDP */
//#include "rp-lcd-triple-lvds-10-1024-600-mipi1-7-1024-600-edp-13-1920-1080.dtsi"
#ifdef RP_TRIPLE_LCD
#include "pro-rk3568-triple-lcd-gpio.dtsi" // if use triple lcd, must enable it
#endif
#ifdef RP_DUAL_LCD
#include "pro-rk3568-dual-lcd-gpio.dtsi" // if use dual lcd, must enable it
#endif
/{
model = "pro-rk3568";
compatible = "rpdzkj,pro-rk3568-v10", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
pinctrl-1 = <&vcc5v0_otg_en>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
led { //system led
gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb_pwr { //usb power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_mode { //OTG SWITCH
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
gpio3b5 { //pcie power
gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3a7 { //pcie clock
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&i2c1 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "okay";
};
&video_phy1 {
status = "okay";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm7 {
/****** disable for gpio used to be spi0_cs0 */
status = "disabled";
};
/**
* when single mipi1 or edp ports used, pwm need the pwm5,
* and if mutiple lcd used, we just reference the backlight5.
*/
#if (defined(RP_MIPI1_USED) || defined(RP_EDP_USED)) && defined(RP_SINGLE_LCD)
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#endif
/*************************wifi bt***********************/
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/******************************************************/
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/sensor-dev.h>
#include "../rk3568.dtsi"
/ {
rpdzkj:rpdzkj_config {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "160";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
home_apk = "null";
status = "okay";
};
edp_panel:panel {
status = "disabled";
};
lvds_panel: panel@0 {
status = "disabled";
};
audiopwmout_diff: audiopwmout-diff {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,audiopwmout-diff";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,bitclock-master = <&master>;
simple-audio-card,frame-master = <&master>;
simple-audio-card,cpu {
sound-dai = <&i2s3_2ch>;
};
master: simple-audio-card,codec {
sound-dai = <&dig_acodec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
// headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
hdmi_sound: hdmi-sound {
status = "disabled";
compatible = "rockchip,hdmi";
rockchip,mclk-fs = <128>;
rockchip,card-name = "rockchip,hdmi";
rockchip,cpu = <&i2s0_8ch>;
rockchip,codec = <&hdmi>;
};
/*
leds: leds {
compatible = "gpio-leds";
work_led: work {
gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
*/
pdmics: dummy-codec {
status = "disabled";
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
pdm_mic_array: pdm-mic-array {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "rockchip,pdm-mic-array";
simple-audio-card,cpu {
sound-dai = <&pdm>;
};
simple-audio-card,codec {
sound-dai = <&pdmics>;
};
};
spdif-sound {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "ROCKCHIP,SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif_8ch>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
status = "disabled";
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vcc3v3_lcd0_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_lcd1_n: vcc3v3-lcd1-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd1_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc2v5_sys: vcc2v5-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc2v5-sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vin-supply = <&vcc3v3_sys>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
//clocks = <&rk809 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6398s";
status = "okay";
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
//clocks = <&rk809 1>;
//clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart8m0_rtsn>;
pinctrl-1 = <&uart8_gpios>;
BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
test-power {
status = "okay";
};
/**
* configuration of regulator that no rk809
*/
vcc3v3_pmu: vcc3v3-pmu {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pmu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdda_0v9: vdda-0v9 {
compatible = "regulator-fixed";
regulator-name = "vdda_0v9";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: vcc-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: vccio-sd {
compatible = "regulator-fixed";
regulator-name = "vccio_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: vcc3v3-sd {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_3v3>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca_1v8: vcca-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcca_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_logic: vdd-logic {
compatible = "pwm-regulator";
regulator-always-on;
regulator-boot-on;
rockchip,pwm_id = <1>;
pwms = <&pwm1 0 25000 1>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1000000>;
regulator-init-microvolt = <950000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
pwm-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu_npu: vdd-gpu-npu {
compatible = "pwm-regulator";
rockchip,pwm_id = <2>;
pwms = <&pwm2 0 25000 1>;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1125000>;
regulator-init-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd_gpu_npu";
pwm-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_3v3: vdd-3v3 {
compatible = "regulator-fixed";
regulator-name = "vdd_3v3";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc3v3_sys>;
};
vdd_fixed: vdd-fixed {
compatible = "regulator-fixed";
regulator-name = "vdd_fixed";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc3v3_sys>;
};
};
&bus_npu {
bus-supply = <&vdd_logic>;
pvtm-supply = <&vdd_cpu>;
status = "okay";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&dfi {
status = "disabled";
};
&dmc {
center-supply = <&vdd_logic>;
status = "disabled";
};
&gpu {
mali-supply = <&vdd_fixed>;
status = "okay";
};
&i2s1_8ch {
status = "okay";
rockchip,clk-trcm = <1>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
&i2s1m0_sdi0
&i2s1m0_sdo0>;
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&jpegd {
status = "okay";
};
&jpegd_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};
&nandc0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
nand@0 {
reg = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <16>;
nand-ecc-step-size = <1024>;
};
};
&rk_rga {
status = "okay";
};
&rkvdec {
status = "okay";
};
&rkvdec_mmu {
status = "okay";
};
&rkvenc {
venc-supply = <&vdd_logic>;
status = "okay";
};
&rkvenc_mmu {
status = "okay";
};
&rknpu {
rknpu-supply = <&vdd_fixed>;
status = "okay";
};
&rknpu_mmu {
status = "okay";
};
&route_hdmi {
status = "okay";
connect = <&vp0_out_hdmi>;
};
&saradc {
status = "okay";
vref-supply = <&vcca_1v8>;
};
&sdhci {
bus-width = <8>;
supports-emmc;
non-removable;
max-frequency = <200000000>;
status = "okay";
};
&sdmmc0 {
max-frequency = <150000000>;
supports-sd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
status = "okay";
};
&sdmmc2 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sfc {
status = "okay";
};
&spdif_8ch {
status = "disabled";
};
&tsadc {
status = "okay";
};
&u2phy0_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy0_otg {
// vbus-supply = <&vcc5v0_otg>;
status = "okay";
};
&u2phy1_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy1_otg {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usbdrd_dwc3 {
dr_mode = "otg";
extcon = <&usb2phy0>;
status = "okay";
};
&usbdrd30 {
status = "okay";
};
&usbhost_dwc3 {
status = "okay";
};
&usbhost30 {
status = "okay";
};
&vad {
rockchip,audio-src = <&i2s1_8ch>;
rockchip,buffer-time-ms = <128>;
rockchip,det-channel = <0>;
rockchip,mode = <0>;
};
&vdpu {
status = "okay";
};
&vdpu_mmu {
status = "okay";
};
&vepu {
status = "okay";
};
&vepu_mmu {
status = "okay";
};
&vop {
status = "okay";
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
};
&vop_mmu {
status = "okay";
};
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
};
};
// sata usb30 pcie phys
&combphy0_us {
status = "okay";
};
&combphy1_usq {
status = "okay";
};
&combphy2_psq {
status = "okay";
};
//gpio0_b0 for hub reset pin
/delete-node/ &xin32k;
&spdif_8ch {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&spdifm1_tx>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
compatible = "bluetooth-platdata";
//clocks = <&rk809 1>;
//clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart8m0_rtsn>;
pinctrl-1 = <&uart8_gpios>;
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&pwm1 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm1m0_pins>;
};
&pwm2 {
status = "okay";
pinctrl-names = "active";
pinctrl-0 = <&pwm2m0_pins>;
};
&i2c0 {
status = "okay";
vdd_cpu: syr837@40 {
compatible = "silergy,syr827";
reg = <0x40>;
vin-supply = <&vcc3v3_sys>;
regulator-compatible = "fan53555-reg";
// pinctrl-names = "default";
// pinctrl-0 = <&vsel1_gpio>;
// vsel-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1390000>;
regulator-ramp-delay = <2300>;
fcs,suspend-voltage-selector = <1>;
regulator-always-on;
regulator-boot-on;
regulator-initial-state = <3>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};

930
rk356x/rk3568-evb-rpdzkj-rk809-pwm-pcie-wifi.dtsi Executable file
View File

@@ -0,0 +1,930 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "../rk3568.dtsi"
/ {
rpdzkj:rpdzkj_config {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "160";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
extend_rotate_2 = "0";//0 0//1 90 //2 180 //3 270
rotation_efull_2 = "true";
extend_rotate_3 = "0";//0 0//1 90 //2 180 //3 270
rotation_efull_3 = "true";
home_apk = "null";
status = "okay";
};
vdd_cpu: vdd-cpu {
compatible = "pwm-regulator";
pwms = <&pwm0 0 5000 1>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <1250000>;
regulator-init-microvolt = <1000000>;
regulator-ramp-delay = <6001>;
regulator-always-on;
regulator-boot-on;
regulator-settling-time-up-us = <250>;
pwm-supply = <&vcc5v0_sys>;
status = "okay";
};
edp_panel:panel {
status = "disabled";
};
lvds_panel: panel@0 {
status = "disabled";
};
audiopwmout_diff: audiopwmout-diff {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,audiopwmout-diff";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,bitclock-master = <&master>;
simple-audio-card,frame-master = <&master>;
simple-audio-card,cpu {
sound-dai = <&i2s3_2ch>;
};
master: simple-audio-card,codec {
sound-dai = <&dig_acodec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
// headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
hdmi_sound: hdmi-sound {
status = "disabled";
compatible = "rockchip,hdmi";
rockchip,mclk-fs = <128>;
rockchip,card-name = "rockchip,hdmi";
rockchip,cpu = <&i2s0_8ch>;
rockchip,codec = <&hdmi>;
};
/*
leds: leds {
compatible = "gpio-leds";
work_led: work {
gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
*/
pdmics: dummy-codec {
status = "disabled";
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
pdm_mic_array: pdm-mic-array {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "rockchip,pdm-mic-array";
simple-audio-card,cpu {
sound-dai = <&pdm>;
};
simple-audio-card,codec {
sound-dai = <&pdmics>;
};
};
rk809_sound: rk809-sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,rk809-codec";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&rk809_codec>;
};
};
spdif-sound {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "ROCKCHIP,SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif_8ch>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
status = "disabled";
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
};
vad_sound: vad-sound {
status = "disabled";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip,rk3568-vad";
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk809_codec>, <&vad>;
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vcc3v3_lcd0_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_lcd1_n: vcc3v3-lcd1-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd1_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc2v5_sys: vcc2v5-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc2v5-sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vin-supply = <&vcc3v3_sys>;
};
/*
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk809 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
//
// * On the module itself this is one of these (depending
// * on the actual card populated):
// * - SDIO_RESET_L_WL_REG_ON
// * - PDN (power down when low)
//
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6398s";
status = "okay";
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart8m0_rtsn>;
pinctrl-1 = <&uart8_gpios>;
BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
*/
test-power {
status = "okay";
};
};
&bus_npu {
bus-supply = <&vdd_logic>;
pvtm-supply = <&vdd_cpu>;
status = "okay";
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&dfi {
status = "disabled";
};
&dmc {
center-supply = <&vdd_logic>;
status = "disabled";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&i2c0 {
status = "okay";
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "pmic-sleep",
"pmic-power-off", "pmic-reset";
pinctrl-0 = <&pmic_int>;
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
//fb-inner-reg-idxs = <2>;
/* 1: rst regs (default in codes), 0: rst the pmic */
pmic-reset-func = <0>;
/* not save the PMIC_POWER_EN register in uboot */
not-save-power-en = <1>;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
pwrkey {
status = "okay";
};
pinctrl_rk8xx: pinctrl_rk8xx {
gpio-controller;
#gpio-cells = <2>;
rk817_slppin_null: rk817_slppin_null {
pins = "gpio_slp";
function = "pin_fun0";
};
rk817_slppin_slp: rk817_slppin_slp {
pins = "gpio_slp";
function = "pin_fun1";
};
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
pins = "gpio_slp";
function = "pin_fun2";
};
rk817_slppin_rst: rk817_slppin_rst {
pins = "gpio_slp";
function = "pin_fun3";
};
};
regulators {
vdd_logic: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <950000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_gpu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_npu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda_0v9";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vccio_acodec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_3v3";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
rk809_codec: codec {
#sound-dai-cells = <0>;
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
clocks = <&cru I2S1_MCLKOUT>;
clock-names = "mclk";
assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
assigned-clock-rates = <12288000>;
assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_mclk>;
hp-volume = <3>; //3(max)-255(min)
spk-volume = <30>; //3(max)-255(min)
capture_volume = <255>;
//mic-in-differential;
status = "okay";
};
};
};
&i2s0_8ch {
status = "okay";
};
&i2s1_8ch {
status = "okay";
rockchip,clk-trcm = <1>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
&i2s1m0_sdi0
&i2s1m0_sdo0>;
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&jpegd {
status = "okay";
};
&jpegd_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};
&nandc0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
nand@0 {
reg = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <16>;
nand-ecc-step-size = <1024>;
};
};
&pinctrl {
pmic {
pmic_int: pmic_int {
rockchip,pins =
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
soc_slppin_gpio: soc_slppin_gpio {
rockchip,pins =
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
};
soc_slppin_slp: soc_slppin_slp {
rockchip,pins =
<0 RK_PA2 1 &pcfg_pull_up>;
};
soc_slppin_rst: soc_slppin_rst {
rockchip,pins =
<0 RK_PA2 2 &pcfg_pull_none>;
};
};
/*
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
*/
};
/*
* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
* must be consistent with the software configuration correspondingly
* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
* should also be configured to 1.8V accordingly;
* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
* should also be configured to 3.3V accordingly;
* 3/ VCCIO2 voltage control selection (0xFDC20140)
* BIT[0]: 0x0: from GPIO_0A7 (default)
* BIT[0]: 0x1: from GRF
* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
* L:VCCIO2 must supply 3.3V
* H:VCCIO2 must supply 1.8V
*/
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};
&rk_rga {
status = "okay";
};
&rkvdec {
status = "okay";
};
&rkvdec_mmu {
status = "okay";
};
&rkvenc {
venc-supply = <&vdd_logic>;
status = "okay";
};
&rkvenc_mmu {
status = "okay";
};
&rknpu {
rknpu-supply = <&vdd_npu>;
status = "okay";
};
&rknpu_mmu {
status = "okay";
};
&route_hdmi {
status = "okay";
connect = <&vp0_out_hdmi>;
};
&saradc {
status = "okay";
vref-supply = <&vcca_1v8>;
};
&sdhci {
bus-width = <8>;
supports-emmc;
non-removable;
max-frequency = <200000000>;
status = "okay";
};
&sdmmc0 {
max-frequency = <150000000>;
supports-sd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
status = "okay";
};
/*
&sdmmc2 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
sd-uhs-sdr104;
status = "okay";
};
*/
&sfc {
status = "okay";
};
&spdif_8ch {
status = "disabled";
};
&tsadc {
status = "okay";
};
&u2phy0_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy0_otg {
// vbus-supply = <&vcc5v0_otg>;
status = "okay";
};
&u2phy1_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy1_otg {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usbdrd_dwc3 {
dr_mode = "otg";
extcon = <&usb2phy0>;
status = "okay";
};
&usbdrd30 {
status = "okay";
};
&usbhost_dwc3 {
status = "okay";
};
&usbhost30 {
status = "okay";
};
&vad {
rockchip,audio-src = <&i2s1_8ch>;
rockchip,buffer-time-ms = <128>;
rockchip,det-channel = <0>;
rockchip,mode = <0>;
};
&vdpu {
status = "okay";
};
&vdpu_mmu {
status = "okay";
};
&vepu {
status = "okay";
};
&vepu_mmu {
status = "okay";
};
&vop {
status = "okay";
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
};
&vop_mmu {
status = "okay";
};
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
};
};
// sata usb30 pcie phys
&combphy0_us {
status = "okay";
};
&combphy1_usq {
status = "okay";
};
&combphy2_psq {
status = "okay";
};
//gpio0_b0 for hub reset pin
/delete-node/ &xin32k;

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rk356x/rk3568-evb-rpdzkj-rk809-pwm.dtsi Executable file
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@@ -0,0 +1,929 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "../rk3568.dtsi"
/ {
rpdzkj:rpdzkj_config {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "160";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
extend_rotate_2 = "0";//0 0//1 90 //2 180 //3 270
rotation_efull_2 = "true";
extend_rotate_3 = "0";//0 0//1 90 //2 180 //3 270
rotation_efull_3 = "true";
home_apk = "null";
status = "okay";
};
vdd_cpu: vdd-cpu {
compatible = "pwm-regulator";
pwms = <&pwm0 0 5000 1>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <675000>;
regulator-max-microvolt = <1250000>;
regulator-init-microvolt = <1000000>;
regulator-ramp-delay = <6001>;
regulator-always-on;
regulator-boot-on;
regulator-settling-time-up-us = <250>;
pwm-supply = <&vcc5v0_sys>;
status = "okay";
};
edp_panel:panel {
status = "disabled";
};
lvds_panel: panel@0 {
status = "disabled";
};
audiopwmout_diff: audiopwmout-diff {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,audiopwmout-diff";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,bitclock-master = <&master>;
simple-audio-card,frame-master = <&master>;
simple-audio-card,cpu {
sound-dai = <&i2s3_2ch>;
};
master: simple-audio-card,codec {
sound-dai = <&dig_acodec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
// headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
hdmi_sound: hdmi-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <128>;
simple-audio-card,name = "rockchip,hdmi";
status = "disabled";
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&hdmi>;
};
};
pdmics: dummy-codec {
status = "disabled";
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
pdm_mic_array: pdm-mic-array {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "rockchip,pdm-mic-array";
simple-audio-card,cpu {
sound-dai = <&pdm>;
};
simple-audio-card,codec {
sound-dai = <&pdmics>;
};
};
rk809_sound: rk809-sound {
status = "okay";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk809";
//hp-det-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk809_codec>;
//pinctrl-names = "default";
//pinctrl-0 = <&hp_det>;
};
spdif-sound {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "ROCKCHIP,SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif_8ch>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
status = "disabled";
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
};
vad_sound: vad-sound {
status = "disabled";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip,rk3568-vad";
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk809_codec>, <&vad>;
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vcc3v3_lcd0_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_lcd1_n: vcc3v3-lcd1-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd1_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc2v5_sys: vcc2v5-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc2v5-sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vin-supply = <&vcc3v3_sys>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk809 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6398s";
status = "okay";
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart8m0_rtsn>;
pinctrl-1 = <&uart8_gpios>;
BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
test-power {
status = "okay";
};
};
&bus_npu {
bus-supply = <&vdd_logic>;
pvtm-supply = <&vdd_cpu>;
status = "okay";
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&dfi {
status = "disabled";
};
&dmc {
center-supply = <&vdd_logic>;
status = "disabled";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&i2c0 {
status = "okay";
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "pmic-sleep",
"pmic-power-off", "pmic-reset";
pinctrl-0 = <&pmic_int>;
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
//fb-inner-reg-idxs = <2>;
/* 1: rst regs (default in codes), 0: rst the pmic */
pmic-reset-func = <0>;
/* not save the PMIC_POWER_EN register in uboot */
not-save-power-en = <1>;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
pwrkey {
status = "okay";
};
pinctrl_rk8xx: pinctrl_rk8xx {
gpio-controller;
#gpio-cells = <2>;
rk817_slppin_null: rk817_slppin_null {
pins = "gpio_slp";
function = "pin_fun0";
};
rk817_slppin_slp: rk817_slppin_slp {
pins = "gpio_slp";
function = "pin_fun1";
};
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
pins = "gpio_slp";
function = "pin_fun2";
};
rk817_slppin_rst: rk817_slppin_rst {
pins = "gpio_slp";
function = "pin_fun3";
};
};
regulators {
vdd_logic: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <950000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_gpu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_npu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda_0v9";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vccio_acodec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_3v3";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
rk809_codec: codec {
#sound-dai-cells = <0>;
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
clocks = <&cru I2S1_MCLKOUT>;
clock-names = "mclk";
assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
assigned-clock-rates = <12288000>;
assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_mclk>;
hp-volume = <3>; //3(max)-255(min)
spk-volume = <30>; //3(max)-255(min)
capture_volume = <255>;
//mic-in-differential;
adc-for-loopback;
status = "okay";
};
};
};
&i2s0_8ch {
status = "okay";
};
&i2s1_8ch {
status = "okay";
rockchip,clk-trcm = <1>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
&i2s1m0_sdi0
&i2s1m0_sdo0>;
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&jpegd {
status = "okay";
};
&jpegd_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};
&nandc0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
nand@0 {
reg = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <16>;
nand-ecc-step-size = <1024>;
};
};
&pinctrl {
pmic {
pmic_int: pmic_int {
rockchip,pins =
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
soc_slppin_gpio: soc_slppin_gpio {
rockchip,pins =
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
};
soc_slppin_slp: soc_slppin_slp {
rockchip,pins =
<0 RK_PA2 1 &pcfg_pull_none>;
};
soc_slppin_rst: soc_slppin_rst {
rockchip,pins =
<0 RK_PA2 2 &pcfg_pull_none>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
/*
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
*/
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
/*
* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
* must be consistent with the software configuration correspondingly
* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
* should also be configured to 1.8V accordingly;
* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
* should also be configured to 3.3V accordingly;
* 3/ VCCIO2 voltage control selection (0xFDC20140)
* BIT[0]: 0x0: from GPIO_0A7 (default)
* BIT[0]: 0x1: from GRF
* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
* L:VCCIO2 must supply 3.3V
* H:VCCIO2 must supply 1.8V
*/
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};
&rk_rga {
status = "okay";
};
&rkvdec {
status = "okay";
};
&rkvdec_mmu {
status = "okay";
};
&rkvenc {
venc-supply = <&vdd_logic>;
status = "okay";
};
&rkvenc_mmu {
status = "okay";
};
&rknpu {
rknpu-supply = <&vdd_npu>;
status = "okay";
};
&rknpu_mmu {
status = "okay";
};
&route_hdmi {
status = "okay";
connect = <&vp0_out_hdmi>;
};
&saradc {
status = "okay";
vref-supply = <&vcca_1v8>;
};
&sdhci {
bus-width = <8>;
supports-emmc;
non-removable;
max-frequency = <200000000>;
status = "okay";
};
&sdmmc0 {
max-frequency = <150000000>;
supports-sd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
status = "okay";
};
&sdmmc2 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sfc {
status = "okay";
};
&spdif_8ch {
status = "disabled";
};
&tsadc {
status = "okay";
};
&u2phy0_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy0_otg {
// vbus-supply = <&vcc5v0_otg>;
status = "okay";
};
&u2phy1_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy1_otg {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usbdrd_dwc3 {
dr_mode = "otg";
extcon = <&usb2phy0>;
status = "okay";
};
&usbdrd30 {
status = "okay";
};
&usbhost_dwc3 {
status = "okay";
};
&usbhost30 {
status = "okay";
};
&vad {
rockchip,audio-src = <&i2s1_8ch>;
rockchip,buffer-time-ms = <128>;
rockchip,det-channel = <0>;
rockchip,mode = <0>;
};
&vdpu {
status = "okay";
};
&vdpu_mmu {
status = "okay";
};
&vepu {
status = "okay";
};
&vepu_mmu {
status = "okay";
};
&vop {
status = "okay";
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
};
&vop_mmu {
status = "okay";
};
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
};
};
// sata usb30 pcie phys
&combphy0_us {
status = "okay";
};
&combphy1_usq {
status = "okay";
};
&combphy2_psq {
status = "okay";
};
//gpio0_b0 for hub reset pin
/delete-node/ &xin32k;

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rk356x/rk3568-evb-rpdzkj-rk809-syr837.dtsi Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/input/rk-input.h>
#include <dt-bindings/display/drm_mipi_dsi.h>
#include <dt-bindings/sensor-dev.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "../rk3568.dtsi"
/ {
rpdzkj:rpdzkj_config {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "160";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
extend_rotate_2 = "0";//0 0//1 90 //2 180 //3 270
rotation_efull_2 = "true";
extend_rotate_3 = "0";//0 0//1 90 //2 180 //3 270
rotation_efull_3 = "true";
home_apk = "null";
status = "okay";
};
edp_panel:panel {
status = "disabled";
};
lvds_panel: panel@0 {
status = "disabled";
};
audiopwmout_diff: audiopwmout-diff {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,audiopwmout-diff";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,bitclock-master = <&master>;
simple-audio-card,frame-master = <&master>;
simple-audio-card,cpu {
sound-dai = <&i2s3_2ch>;
};
master: simple-audio-card,codec {
sound-dai = <&dig_acodec>;
};
};
rk_headset: rk-headset {
compatible = "rockchip_headset";
// headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
hdmi_sound: hdmi-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <128>;
simple-audio-card,name = "rockchip,hdmi";
status = "disabled";
simple-audio-card,cpu {
sound-dai = <&i2s0_8ch>;
};
simple-audio-card,codec {
sound-dai = <&hdmi>;
};
};
pdmics: dummy-codec {
status = "disabled";
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
pdm_mic_array: pdm-mic-array {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "rockchip,pdm-mic-array";
simple-audio-card,cpu {
sound-dai = <&pdm>;
};
simple-audio-card,codec {
sound-dai = <&pdmics>;
};
};
rk809_sound: rk809-sound {
status = "okay";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip-rk809";
//hp-det-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk809_codec>;
//pinctrl-names = "default";
//pinctrl-0 = <&hp_det>;
};
spdif-sound {
status = "disabled";
compatible = "simple-audio-card";
simple-audio-card,name = "ROCKCHIP,SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif_8ch>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
status = "disabled";
compatible = "linux,spdif-dit";
#sound-dai-cells = <0>;
};
vad_sound: vad-sound {
status = "disabled";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip,rk3568-vad";
rockchip,cpu = <&i2s1_8ch>;
rockchip,codec = <&rk809_codec>, <&vad>;
};
vcc3v3_sys: vcc3v3-sys {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
vcc5v0_sys: vcc5v0-sys {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vcc3v3_lcd0_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_lcd1_n: vcc3v3-lcd1-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd1_n";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
// gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc3v3_sys>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc2v5_sys: vcc2v5-ddr {
compatible = "regulator-fixed";
regulator-name = "vcc2v5-sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
vin-supply = <&vcc3v3_sys>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk809 1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
post-power-on-delay-ms = <200>;
reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
rockchip,grf = <&grf>;
wifi_chip_type = "ap6398s";
status = "okay";
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&rk809 1>;
clock-names = "ext_clock";
//wifi-bt-power-toggle;
uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart8m0_rtsn>;
pinctrl-1 = <&uart8_gpios>;
BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
test-power {
status = "okay";
};
};
&i2c0 {
status = "okay";
vdd_cpu: syr837@40 {
compatible = "silergy,syr827";
reg = <0x40>;
vin-supply = <&vcc3v3_sys>;
regulator-compatible = "fan53555-reg";
// pinctrl-names = "default";
// pinctrl-0 = <&vsel1_gpio>;
// vsel-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1390000>;
regulator-ramp-delay = <2300>;
fcs,suspend-voltage-selector = <1>;
regulator-always-on;
regulator-boot-on;
regulator-initial-state = <3>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
&bus_npu {
bus-supply = <&vdd_logic>;
pvtm-supply = <&vdd_cpu>;
status = "okay";
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&cpu0 {
cpu-supply = <&vdd_cpu>;
};
&dfi {
status = "disabled";
};
&dmc {
center-supply = <&vdd_logic>;
status = "disabled";
};
&gpu {
mali-supply = <&vdd_gpu>;
status = "okay";
};
&i2c0 {
status = "okay";
rk809: pmic@20 {
compatible = "rockchip,rk809";
reg = <0x20>;
interrupt-parent = <&gpio0>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default", "pmic-sleep",
"pmic-power-off", "pmic-reset";
pinctrl-0 = <&pmic_int>;
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
clock-output-names = "rk808-clkout1", "rk808-clkout2";
//fb-inner-reg-idxs = <2>;
/* 1: rst regs (default in codes), 0: rst the pmic */
pmic-reset-func = <0>;
/* not save the PMIC_POWER_EN register in uboot */
not-save-power-en = <1>;
vcc1-supply = <&vcc3v3_sys>;
vcc2-supply = <&vcc3v3_sys>;
vcc3-supply = <&vcc3v3_sys>;
vcc4-supply = <&vcc3v3_sys>;
vcc5-supply = <&vcc3v3_sys>;
vcc6-supply = <&vcc3v3_sys>;
vcc7-supply = <&vcc3v3_sys>;
vcc8-supply = <&vcc3v3_sys>;
vcc9-supply = <&vcc3v3_sys>;
pwrkey {
status = "okay";
};
pinctrl_rk8xx: pinctrl_rk8xx {
gpio-controller;
#gpio-cells = <2>;
rk817_slppin_null: rk817_slppin_null {
pins = "gpio_slp";
function = "pin_fun0";
};
rk817_slppin_slp: rk817_slppin_slp {
pins = "gpio_slp";
function = "pin_fun1";
};
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
pins = "gpio_slp";
function = "pin_fun2";
};
rk817_slppin_rst: rk817_slppin_rst {
pins = "gpio_slp";
function = "pin_fun3";
};
};
regulators {
vdd_logic: DCDC_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <950000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <950000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_logic";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_gpu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_ddr: DCDC_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-initial-mode = <0x2>;
regulator-name = "vcc_ddr";
regulator-state-mem {
regulator-on-in-suspend;
};
};
vdd_npu: DCDC_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1350000>;
regulator-init-microvolt = <900000>;
regulator-ramp-delay = <6001>;
regulator-initial-mode = <0x2>;
regulator-name = "vdd_npu";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_image: LDO_REG1 {
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda_0v9: LDO_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda_0v9";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdda0v9_pmu: LDO_REG3 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <900000>;
regulator-name = "vdda0v9_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <900000>;
};
};
vccio_acodec: LDO_REG4 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vccio_acodec";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vccio_sd: LDO_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vccio_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_pmu: LDO_REG6 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-name = "vcc3v3_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcca_1v8: LDO_REG7 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcca1v8_pmu: LDO_REG8 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_pmu";
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcca1v8_image: LDO_REG9 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcca1v8_image";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_1v8: DCDC_REG5 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-name = "vcc_1v8";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc_3v3: SWITCH_REG1 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc_3v3";
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc3v3_sd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc3v3_sd";
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
rk809_codec: codec {
#sound-dai-cells = <0>;
compatible = "rockchip,rk809-codec", "rockchip,rk817-codec";
clocks = <&cru I2S1_MCLKOUT>;
clock-names = "mclk";
assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
assigned-clock-rates = <12288000>;
assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_mclk>;
hp-volume = <100>; //3(max)-255(min)
spk-volume = <100>; //3(max)-255(min)
capture_volume = <255>;
//mic-in-differential;
status = "okay";
};
};
};
&i2s0_8ch {
status = "okay";
};
&i2s1_8ch {
status = "okay";
rockchip,clk-trcm = <1>;
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
&i2s1m0_sdi0
&i2s1m0_sdo0>;
};
&iep {
status = "okay";
};
&iep_mmu {
status = "okay";
};
&jpegd {
status = "okay";
};
&jpegd_mmu {
status = "okay";
};
&mpp_srv {
status = "okay";
};
&nandc0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
nand@0 {
reg = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <16>;
nand-ecc-step-size = <1024>;
};
};
&pinctrl {
pmic {
pmic_int: pmic_int {
rockchip,pins =
<0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
};
soc_slppin_gpio: soc_slppin_gpio {
rockchip,pins =
<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
};
soc_slppin_slp: soc_slppin_slp {
rockchip,pins =
<0 RK_PA2 1 &pcfg_pull_none>;
};
soc_slppin_rst: soc_slppin_rst {
rockchip,pins =
<0 RK_PA2 2 &pcfg_pull_none>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
/*
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
*/
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
/*
* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
* must be consistent with the software configuration correspondingly
* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
* should also be configured to 1.8V accordingly;
* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
* should also be configured to 3.3V accordingly;
* 3/ VCCIO2 voltage control selection (0xFDC20140)
* BIT[0]: 0x0: from GPIO_0A7 (default)
* BIT[0]: 0x1: from GRF
* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
* L:VCCIO2 must supply 3.3V
* H:VCCIO2 must supply 1.8V
*/
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_3v3>;
vccio7-supply = <&vcc_3v3>;
};
&rk_rga {
status = "okay";
};
&rkvdec {
status = "okay";
};
&rkvdec_mmu {
status = "okay";
};
&rkvenc {
venc-supply = <&vdd_logic>;
status = "okay";
};
&rkvenc_mmu {
status = "okay";
};
&rknpu {
rknpu-supply = <&vdd_npu>;
status = "okay";
};
&rknpu_mmu {
status = "okay";
};
&route_hdmi {
status = "okay";
connect = <&vp0_out_hdmi>;
};
&saradc {
status = "okay";
vref-supply = <&vcca_1v8>;
};
&sdhci {
bus-width = <8>;
supports-emmc;
non-removable;
max-frequency = <200000000>;
status = "okay";
};
&sdmmc0 {
max-frequency = <150000000>;
supports-sd;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
status = "okay";
};
&sdmmc2 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sfc {
status = "okay";
};
&spdif_8ch {
status = "disabled";
};
&tsadc {
status = "okay";
};
&u2phy0_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy0_otg {
// vbus-supply = <&vcc5v0_otg>;
status = "okay";
};
&u2phy1_host {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&u2phy1_otg {
// phy-supply = <&vcc5v0_host>;
status = "okay";
};
&usb2phy0 {
status = "okay";
};
&usb2phy1 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};
&usbdrd_dwc3 {
dr_mode = "otg";
extcon = <&usb2phy0>;
status = "okay";
};
&usbdrd30 {
status = "okay";
};
&usbhost_dwc3 {
status = "okay";
};
&usbhost30 {
status = "okay";
};
&vad {
rockchip,audio-src = <&i2s1_8ch>;
rockchip,buffer-time-ms = <128>;
rockchip,det-channel = <0>;
rockchip,mode = <0>;
};
&vdpu {
status = "okay";
};
&vdpu_mmu {
status = "okay";
};
&vepu {
status = "okay";
};
&vepu_mmu {
status = "okay";
};
&vop {
status = "okay";
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
};
&vop_mmu {
status = "okay";
};
&dsi0 {
dsi0_panel: panel@0 {
status = "disabled";
};
};
&dsi1 {
dsi1_panel: panel@0 {
status = "disabled";
};
};
// sata usb30 pcie phys
&combphy0_us {
status = "okay";
};
&combphy1_usq {
status = "okay";
};
&combphy2_psq {
status = "okay";
};
//gpio0_b0 for hub reset pin
/delete-node/ &xin32k;

38
rk356x/rk3568-pcie2x1.dtsi Executable file
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/**
* enable pcie2x1 relavent config for rk3568
*/
/ {
vcc3v3_pcie: gpio-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
/**
* gpio config please refer to main dts if have
* gpio = <&gpio* ** ***>;
*/
startup-delay-us = <5000>;
vin-supply = <&dc_12v>;
};
};
&combphy2_psq {
status = "okay";
};
&sata2 {
status = "disabled";
};
&pcie2x1 {
/**
* gpio please refer to main dts:
* reset-gpios = <&gpio* ** ***>;
*/
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};

41
rk356x/rk3568-pcie3x1x1.dtsi Executable file
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/**
* enable pcie3x2 relavent config for rk3568
*/
/ {
vcc3v3_pcie3: gpio-regulator-pcie3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
/**
* gpio config please refer to main dts if have
* gpio = <&gpio* ** ***>;
*/
startup-delay-us = <5000>;
vin-supply = <&dc_12v>;
};
};
&pcie30phy {
status = "okay";
};
/** pcie3x1 and pcie3x2*/
&pcie3x1 {
rockchip,bifurcation;
status = "okay";
vpcie3v3-supply = <&vcc3v3_pcie3>;
};
&pcie3x2 {
/**
* gpio please refer to main dts:
* reset-gpios = <&gpio* ** ***>;
*/
rockchip,bifurcation;
status = "okay";
vpcie3v3-supply = <&vcc3v3_pcie3>;
};

32
rk356x/rk3568-pcie3x2.dtsi Executable file
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/**
* enable pcie3x2 relavent config for rk3568
*/
/ {
vcc3v3_pcie3: gpio-regulator-pcie3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
/**
* gpio config please refer to main dts if have
* gpio = <&gpio* ** ***>;
*/
startup-delay-us = <5000>;
vin-supply = <&dc_12v>;
};
};
&pcie30phy {
status = "okay";
};
&pcie3x2 {
/**
* gpio please refer to main dts:
* reset-gpios = <&gpio* ** ***>;
*/
status = "okay";
vpcie3v3-supply = <&vcc3v3_pcie3>;
};

3117
rk356x/rk3568-pinctrl.dtsi Executable file
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18
rk356x/rk3568-sata1.dtsi Executable file
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/**
* enable sata1 relavent config for rk3568
*/
&usbhost_dwc3 {
/** redefine for combphy used to be sata */
phys = <&u2phy0_host>;
};
&combphy1_usq {
status = "okay";
};
&sata1 {
status = "okay";
};

13
rk356x/rk3568-sata2.dtsi Executable file
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/**
* enable sata2 relavent config for rk3568
*/
&combphy2_psq {
status = "okay";
};
&sata2 {
status = "okay";
};

34
rk356x/rp-adc-key.dtsi Executable file
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/ {
adc_keys: adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
vol-up-key {
label = "volume up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <1750>;
};
vol-down-key {
label = "volume down";
linux,code = <KEY_VOLUMEDOWN>;
press-threshold-microvolt = <297500>;
};
menu-key {
label = "menu";
linux,code = <KEY_MENU>;
press-threshold-microvolt = <980000>;
};
back-key {
label = "back";
linux,code = <KEY_BACK>;
press-threshold-microvolt = <1305500>;
};
};
};

49
rk356x/rp-audio-es8311.dtsi Executable file
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/ {
i2s1_sound: i2s1-sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "rockchip,es8311";
simple-audio-card,cpu {
sound-dai = <&i2s1_8ch>;
};
simple-audio-card,codec {
sound-dai = <&es8311>;
};
};
};
&i2s1_8ch {
status = "okay";
pinctrl-0 = <&i2s1m0_sclktx
&i2s1m0_lrcktx
&i2s1m0_sdi0
&i2s1m0_sdo0>;
};
&i2c3 {
status = "okay";
clock-frequency = <400000>;
es8311: es8311@18 {
status = "okay";
compatible = "everest,es8311";
reg = <0x18>;
clocks = <&cru I2S1_MCLKOUT>;
clock-names = "mclk";
adc-pga-gain = <6>; /* 18dB */
adc-volume = <0xbf>; /* 0dB */
dac-volume = <0xbf>; /* 0dB */
aec-mode = "dac left, adc right";
pinctrl-names = "default";
pinctrl-0 = <&i2s1m0_mclk>;
assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>;
assigned-clock-rates = <12288000>;
assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>;
//spk-ctl-gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
};

110
rk356x/rp-box-rk3566-lcd-gpio.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
/************** LCD GPIO ********************/
&vcc3v3_lcd0_n {
gpio = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

393
rk356x/rp-box-rk3566.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3566-evb1-ddr4-v10
//#include "rk3566-evb1-ddr4-v10.dtsi"
#include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3566.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac1-m0-pro-rk3566.dtsi"
/***************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "rp-box-rk3566-lcd-gpio.dtsi"
/* HDMI only */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
/** LVDS */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/ {
model = "rp-box-rk3566";
compatible = "rpdzkj,rp-box-rk3566", "rockchip,rk3566";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
/**
* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio, refer to above define.
* };
*/
/******* sytem power en pin, donnot change it only if you know what you are doing */
pwr_5v_3v3 { //vdd 3.3v enable
gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
pwr_4g { //vdd_3G 3.3v enable
gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
led { //system led
gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb_host_pwr { //usb 2.0 3.0 power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb_pwr { //usb and otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub reset
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //SPK ENABLE
gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //SPK MUTE, hish active, nomal low
gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
otg_mode { //OTG SWITCH, high is mean otg_id to 0, foece host mode
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>;
gpio_function = <0>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/***** gpio, add you want to control as blow */
gpio4a0 {
gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a1 {
gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a2 {
gpio_num = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio4a3 {
gpio_num = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1b2 {
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3c1 {
gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1b0 {
gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio0c4 {
gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio1a4 {
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio2b4 {
gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_3v3>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&i2c1 {
status = "okay";
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&i2c5 {
status = "disabled";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m0_xfer>;
};
&spi1 {
status = "okay";
/* rewrite pinctrl, for cs1 used to be gpio */
pinctrl-0 = <&spi1m0_cs0 &spi1m0_pins>;
pinctrl-1 = <&spi1m0_cs0 &spi1m0_pins_hs>;
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi2 {
status = "okay";
/* rewrite pinctrl, for cs1 used to be gpio */
pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>;
pinctrl-1 = <&spi2m0_cs0 &spi2m0_pins_hs>;
spi2_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
&gmac1 {
tx_delay = <0x42>;
rx_delay = <0x2d>;
};
&sdmmc2 {
max-frequency = <150000000>;
supports-sdio;
bus-width = <4>;
disable-wp;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
};
&wireless_bluetooth {
uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart1m1_rtsn>;
pinctrl-1 = <&uart1_gpios>;
BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&rk_headset {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart1_gpios: uart1-gpios {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

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rk356x/rp-box-rk3568-lcd-gpio.dtsi Executable file
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/ {
backlight4: backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 25000 0>;
brightness-levels = <
0 20 20 21 21 22 22 23
23 24 24 25 25 26 26 27
27 28 28 29 29 30 30 31
31 32 32 33 33 34 34 35
35 36 36 37 37 38 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255
>;
default-brightness-level = <200>;
};
};
&pwm4 {
status = "okay";
};
/************** LCD GPIO ********************/
&dsi0_panel {
power-supply = <&vcc3v3_lcd0_n>;
reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&lvds_panel {
power-supply = <&vcc3v3_lcd0_n>;
enable-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
backlight = <&backlight4>;
};
&edp_panel {
power-supply = <&vcc3v3_lcd0_n>;
backlight = <&backlight4>;
};
&vcc3v3_lcd0_n {
gpio = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
&i2c1 {
gt9xx: goodix_ts@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix_rst_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix_irq_gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
gt1x: goodix_gt1x@5d {
status = "disabled";
/***** tp pin ******/
pinctrl-names = "default";
pinctrl-0 = <&goodix_irq>;
goodix,rst-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio3 RK_PA2 IRQ_TYPE_EDGE_FALLING>;
};
};
&pinctrl {
lcd1 {
lcd_rst_gpio: lcd1-rst-gpio {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
/********************************************/

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rk356x/rp-box-rk3568.dts Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"
#include "../rk3568-linux.dtsi"
/*************************camera***********************/
#include "rp-mipi-camera-gc2093-rk3568.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "rp-box-rk3568-lcd-gpio.dtsi" // if use lcd, must enable it
/* HDMI only */
//#include "rp-lcd-hdmi.dtsi"
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
#include "rp-lcd-mipi1-10-1920-1200.dtsi"
/** LVDS */
//#include "rp-lcd-lvds-10-1024-600-raw.dtsi"
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/* EDP */
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
/************************ MULTILPLE LCD *********************/
/* EDP + MIPI0/lvds */
//#include "rp-lcd-triple-lvds-10-1024-600-edp-13-1920-1080-hdmi.dtsi"
/{
model = "rp-box-rk3568";
compatible = "rpdzkj,rp-box-rk3568", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
/**
* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio, refer to above define.
* };
*/
pwr_5v_3v3 { //vdd5v vdd3v3 en
gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
pwr_4g { //vdd_3G 3.3v enable
gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
led { //system led
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb_pwr { //usb power
gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //hub reset
gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_mode { //OTG SWITCH, high is mean otg_id to 0, force host mode
gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
otg_power { //usb otg power
gpio_num = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
/**
* gpioxxx { // the node name will display on /proc/rp_gpio, you can define any character string
* gpio_num = <>; // gpio you want ot control
* gpio_function = <>; // function of current gpio<69><6F> 0 output, 1 input, 3 blink
* gpio_event = <KEY_F14>; // optional property used to define gpio report event such as KEY_F14, only works in case of gpio_function = <1>;
* };
*/
/****** GPIO, place you want to control as below
* gpio_name {
* gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
* gpio_function = <4>;
* };
*/
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&gmac0 {
status = "okay";
tx_delay = <0x3a>;
rx_delay = <0x2e>;
snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
//max-speed = <100>; /* set eth maximal speed, default automatically adapt */
};
&gmac1 {
status = "okay";
tx_delay = <0x42>;
rx_delay = <0x27>;
snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
};
&i2c1 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi1 {
status = "disabled";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm7 {
status = "disabled";
};
/*************************wifi bt***********************/
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/******************************************************/
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;
};
/****** rp3568 camera configuration adjustment ******/
&vcc_camera {
pinctrl-0 = <&camera_pwr>;
gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
};
&gc2093 {
pwdn-gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>;
};
&edp {
/** delete hdp gpio that rp-box-rk3568 donot use */
/delete-property/ hpd-gpios;
};
&pinctrl {
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
cam {
camera_pwr: camera-pwr {
rockchip,pins =
/* camera power en */
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rp_pin {
otg_5ven: otg-5ven {
rockchip,pins =
/* otg port host power en */
<2 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
host_5ven: host-5ven {
rockchip,pins =
/* usb host power en */
<2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
vdd3g_en: vdd3g-en {
rockchip,pins =
/* 4G module power en */
<0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&rk809_sound {
/delete-property/ simple-audio-card,hp-det-gpio;
/delete-property/ simple-audio-card,widgets;
};

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rk356x/rp-camera-mipi-gc2093-single-2lane.dtsi Executable file
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/ {
vcc_camera: vcc-camera-regulator {
compatible = "regulator-fixed";
/**
* gpio config please refer to main dts if have
* gpio = <&gpio* *** GPIO_ACTIVE_HIGH>;
* pinctrl-names = "default";
* pinctrl-0 = <&***>;
*/
regulator-name = "vcc_camera";
enable-active-high;
regulator-always-on;
regulator-boot-on;
};
};
&i2c4 {
status = "okay";
gc2093: gc2093@37 {
compatible = "galaxycore,gc2093";
status = "okay";
reg = <0x37>;
clocks = <&cru CLK_CIF_OUT>;
clock-names = "xvclk";
power-domains = <&power RK3568_PD_VI>;
/**
* gpio config please refer to main dts if have
* pinctrl-names = "default";
* pinctrl-0 = <&cif_clk>;
* pwdn-gpios = <&gpio* *** GPIO_ACTIVE_HIGH>;
* reset-gpios = <&gpio* *** GPIO_ACTIVE_LOW>;
*/
//avdd-supply = <&vcc_avdd>;
//dovdd-supply = <&vcc_dovdd>;
//dvdd-supply = <&vcc_dvdd>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "SIDB205300385-VA";
rockchip,camera-module-lens-name = "default";
port {
ucam_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2>;
};
};
};
};
&rkisp {
status = "okay";
};
&rkisp_mmu {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&csidphy_out>;
};
};
};
&csi2_dphy_hw {
status = "okay";
};
&csi2_dphy1 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out0>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0_in>;
};
};
};
};

15
rk356x/rp-can0-m0-rk3568.dtsi Executable file
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@@ -0,0 +1,15 @@
&can0 {
compatible = "rockchip,rk3568-can-2.0";
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
status = "okay";
};
&i2c1 {
/** disabled for used to be can0 */
status = "disabled";
};

11
rk356x/rp-can1-m1-rk3568.dtsi Executable file
View File

@@ -0,0 +1,11 @@
&can1 {
compatible = "rockchip,rk3568-can-2.0";
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};

11
rk356x/rp-can2-m0-rk3568.dtsi Executable file
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@@ -0,0 +1,11 @@
&can2 {
compatible = "rockchip,rk3568-can-2.0";
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "okay";
};

37
rk356x/rp-gmac0-pro-rk3568.dtsi Executable file
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@@ -0,0 +1,37 @@
&gmac0 {
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>, <&cru CLK_MAC0_OUT>;
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>, <&cru CLK_MAC0_2TOP>;
assigned-clock-rates = <0>, <125000000>, <25000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&eth0_pins
&gmac0_clkinout>;
tx_delay = <0x2d>;
rx_delay = <0x2c>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
&mdio0 {
rgmii_phy0: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
clocks = <&cru CLK_MAC0_OUT>;
};
};

39
rk356x/rp-gmac1-m0-pro-rk3566.dtsi Executable file
View File

@@ -0,0 +1,39 @@
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>, <&cru CLK_MAC1_OUT>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>,<&gmac1_clkin>;
assigned-clock-rates = <0>, <125000000>, <25000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m0_miim
&gmac1m0_tx_bus2
&gmac1m0_rx_bus2
&gmac1m0_rgmii_clk
&gmac1m0_rgmii_bus
&gmac1m0_clkinout
&eth1m0_pins>;
tx_delay = <0x3a>;
rx_delay = <0x29>;
phy-handle = <&rgmii_phy1>;
status = "okay";
};
&mdio1 {
rgmii_phy1: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
clocks = <&cru CLK_MAC1_OUT>;
};
};

38
rk356x/rp-gmac1-m1-pro-rk3568.dtsi Executable file
View File

@@ -0,0 +1,38 @@
&gmac1 {
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>, <&cru CLK_MAC1_OUT>;
assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>,<&gmac1_clkin>, <&cru CLK_MAC1_2TOP>;
assigned-clock-rates = <0>, <125000000>, <25000000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac1m1_miim
&gmac1m1_tx_bus2
&gmac1m1_rx_bus2
&gmac1m1_rgmii_clk
&gmac1m1_rgmii_bus
&eth1m0_pins
&gmac1m1_clkinout>;
tx_delay = <0x3a>;
rx_delay = <0x29>;
phy-handle = <&rgmii_phy1>;
status = "okay";
};
&mdio1 {
rgmii_phy1: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x0>;
clocks = <&cru CLK_MAC1_OUT>;
};
};

105
rk356x/rp-ir-pwm.dtsi Executable file
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@@ -0,0 +1,105 @@
&pwm7 {
status = "okay";
compatible = "rockchip,remotectl-pwm";
remote_pwm_id = <3>;
handle_cpu_id = <1>;
remote_support_psci = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
ir_key1 {
rockchip,usercode = <0x4040>;
rockchip,key_table =
<0xf2 KEY_REPLY>,
<0xba KEY_BACK>,
<0xf4 KEY_UP>,
<0xf1 KEY_DOWN>,
<0xef KEY_LEFT>,
<0xee KEY_RIGHT>,
<0xbd KEY_HOME>,
<0xea KEY_VOLUMEUP>,
<0xe3 KEY_VOLUMEDOWN>,
<0xe2 KEY_SEARCH>,
<0xb2 KEY_POWER>,
<0xbc KEY_MUTE>,
<0xec KEY_MENU>,
<0xbf 0x190>,
<0xe0 0x191>,
<0xe1 0x192>,
<0xe9 183>,
<0xe6 248>,
<0xe8 185>,
<0xe7 186>,
<0xf0 388>,
<0xbe 0x175>;
};
ir_key2 {
rockchip,usercode = <0xff00>;
rockchip,key_table =
<0xf9 KEY_HOME>,
<0xbf KEY_BACK>,
<0xfb KEY_MENU>,
<0xaa KEY_REPLY>,
<0xb9 KEY_UP>,
<0xe9 KEY_DOWN>,
<0xb8 KEY_LEFT>,
<0xea KEY_RIGHT>,
<0xeb KEY_VOLUMEDOWN>,
<0xef KEY_VOLUMEUP>,
<0xf7 KEY_MUTE>,
<0xe7 KEY_POWER>,
<0xfc KEY_POWER>,
<0xa9 KEY_VOLUMEDOWN>,
<0xa8 KEY_VOLUMEDOWN>,
<0xe0 KEY_VOLUMEDOWN>,
<0xa5 KEY_VOLUMEDOWN>,
<0xab 183>,
<0xb7 388>,
<0xe8 388>,
<0xf8 184>,
<0xaf 185>,
<0xed KEY_VOLUMEDOWN>,
<0xee 186>,
<0xb3 KEY_VOLUMEDOWN>,
<0xf1 KEY_VOLUMEDOWN>,
<0xf2 KEY_VOLUMEDOWN>,
<0xf3 KEY_SEARCH>,
<0xb4 KEY_VOLUMEDOWN>,
<0xbe KEY_SEARCH>;
};
ir_key3 {
rockchip,usercode = <0x1dcc>;
rockchip,key_table =
<0xee KEY_REPLY>,
<0xf0 KEY_BACK>,
<0xf8 KEY_UP>,
<0xbb KEY_DOWN>,
<0xef KEY_LEFT>,
<0xed KEY_RIGHT>,
<0xfc KEY_HOME>,
<0xf1 KEY_VOLUMEUP>,
<0xfd KEY_VOLUMEDOWN>,
<0xb7 KEY_SEARCH>,
<0xff KEY_POWER>,
<0xf3 KEY_MUTE>,
<0xbf KEY_MENU>,
<0xf9 0x191>,
<0xf5 0x192>,
<0xb3 388>,
<0xbe KEY_1>,
<0xba KEY_2>,
<0xb2 KEY_3>,
<0xbd KEY_4>,
<0xf9 KEY_5>,
<0xb1 KEY_6>,
<0xfc KEY_7>,
<0xf8 KEY_8>,
<0xb0 KEY_9>,
<0xb6 KEY_0>,
<0xb5 KEY_BACKSPACE>;
};
};

526
rk356x/rp-lcd-dual-lvds-10-1024-600-mipi1-10-800-1280.dtsi Executable file
View File

@@ -0,0 +1,526 @@
#include <dt-bindings/display/media-bus-format.h>
#define RP_DUAL_LCD
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "180";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
home_apk = "null";
status = "okay";
};
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
width-mm = <217>;
height-mm = <136>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&dsi1 {
status = "okay";
//rockchip,lane-rate = <480>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
15 00 02 E0 00
15 00 02 E1 93
15 00 02 E2 65
15 00 02 E3 F8
15 00 02 E0 04
15 00 02 2D 03
15 00 02 E0 00
15 00 02 80 03
15 00 02 70 02
15 00 02 71 23
15 00 02 72 06
15 00 02 E0 01
15 00 02 00 00
15 00 02 01 66
15 00 02 03 00
15 00 02 04 6D
15 00 02 17 00
15 00 02 18 BF
15 00 02 19 00
15 00 02 1A 00
15 00 02 1B BF
15 00 02 1C 00
15 00 02 1F 3E
15 00 02 20 28
15 00 02 21 28
15 00 02 22 0E
15 00 02 37 09
15 00 02 38 04
15 00 02 39 08
15 00 02 3A 12
15 00 02 3C 78
15 00 02 3D FF
15 00 02 3E FF
15 00 02 3F 7F
15 00 02 40 06
15 00 02 41 A0
15 00 02 55 0F
15 00 02 56 01
15 00 02 57 69
15 00 02 58 0A
15 00 02 59 0A
15 00 02 5A 29
15 00 02 5B 15
15 00 02 5D 7C
15 00 02 5E 65
15 00 02 5F 55
15 00 02 60 49
15 00 02 61 44
15 00 02 62 35
15 00 02 63 3A
15 00 02 64 23
15 00 02 65 3D
15 00 02 66 3C
15 00 02 67 3D
15 00 02 68 5D
15 00 02 69 4D
15 00 02 6A 56
15 00 02 6B 48
15 00 02 6C 45
15 00 02 6D 38
15 00 02 6E 25
15 00 02 6F 00
15 00 02 70 7C
15 00 02 71 65
15 00 02 72 55
15 00 02 73 49
15 00 02 74 44
15 00 02 75 35
15 00 02 76 3A
15 00 02 77 23
15 00 02 78 3D
15 00 02 79 3C
15 00 02 7A 3D
15 00 02 7B 5D
15 00 02 7C 4D
15 00 02 7D 56
15 00 02 7E 48
15 00 02 7F 45
15 00 02 80 38
15 00 02 81 25
15 00 02 82 00
15 00 02 E0 02
15 00 02 00 1E
15 00 02 01 1E
15 00 02 02 41
15 00 02 03 41
15 00 02 04 43
15 00 02 05 43
15 00 02 06 1F
15 00 02 07 1F
15 00 02 08 1F
15 00 02 09 1F
15 00 02 0A 1E
15 00 02 0B 1E
15 00 02 0C 1F
15 00 02 0D 47
15 00 02 0E 47
15 00 02 0F 45
15 00 02 10 45
15 00 02 11 4B
15 00 02 12 4B
15 00 02 13 49
15 00 02 14 49
15 00 02 15 1F
15 00 02 16 1E
15 00 02 17 1E
15 00 02 18 40
15 00 02 19 40
15 00 02 1A 42
15 00 02 1B 42
15 00 02 1C 1F
15 00 02 1D 1F
15 00 02 1E 1F
15 00 02 1F 1f
15 00 02 20 1E
15 00 02 21 1E
15 00 02 22 1f
15 00 02 23 46
15 00 02 24 46
15 00 02 25 44
15 00 02 26 44
15 00 02 27 4A
15 00 02 28 4A
15 00 02 29 48
15 00 02 2A 48
15 00 02 2B 1f
15 00 02 2C 1F
15 00 02 2D 1F
15 00 02 2E 42
15 00 02 2F 42
15 00 02 30 40
15 00 02 31 40
15 00 02 32 1E
15 00 02 33 1E
15 00 02 34 1F
15 00 02 35 1F
15 00 02 36 1E
15 00 02 37 1E
15 00 02 38 1F
15 00 02 39 48
15 00 02 3A 48
15 00 02 3B 4A
15 00 02 3C 4A
15 00 02 3D 44
15 00 02 3E 44
15 00 02 3F 46
15 00 02 40 46
15 00 02 41 1F
15 00 02 42 1F
15 00 02 43 1F
15 00 02 44 43
15 00 02 45 43
15 00 02 46 41
15 00 02 47 41
15 00 02 48 1E
15 00 02 49 1E
15 00 02 4A 1E
15 00 02 4B 1F
15 00 02 4C 1E
15 00 02 4D 1E
15 00 02 4E 1F
15 00 02 4F 49
15 00 02 50 49
15 00 02 51 4B
15 00 02 52 4B
15 00 02 53 45
15 00 02 54 45
15 00 02 55 47
15 00 02 56 47
15 00 02 57 1F
15 00 02 58 10
15 00 02 59 00
15 00 02 5A 00
15 00 02 5B 30
15 00 02 5C 02
15 00 02 5D 40
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 30
15 00 02 61 01
15 00 02 62 02
15 00 02 63 6A
15 00 02 64 6A
15 00 02 65 05
15 00 02 66 12
15 00 02 67 74
15 00 02 68 04
15 00 02 69 6A
15 00 02 6A 6A
15 00 02 6B 08
15 00 02 6C 00
15 00 02 6D 06
15 00 02 6E 00
15 00 02 6F 88
15 00 02 70 00
15 00 02 71 00
15 00 02 72 06
15 00 02 73 7B
15 00 02 74 00
15 00 02 75 07
15 00 02 76 00
15 00 02 77 5D
15 00 02 78 17
15 00 02 79 1F
15 00 02 7A 00
15 00 02 7B 00
15 00 02 7C 00
15 00 02 7D 03
15 00 02 7E 7B
15 00 02 E0 04
15 00 02 2B 2B
15 00 02 2E 44
15 00 02 E0 01
15 00 02 0E 01
15 00 02 E0 03
15 00 02 98 2F
15 00 02 E0 00
15 00 02 E6 02
15 00 02 E7 02
05 78 01 11
05 05 01 29
15 0a 02 35 00
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <68000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <18>;
hfront-porch = <18>;
vback-porch = <8>;
vfront-porch = <24>;
hsync-len = <18>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi1_in_vp0 {
status = "okay";
};
&dsi1_in_vp1 {
status = "disabled";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&video_phy1 {
status = "okay";
};
&route_dsi1 {
status = "okay";
connect = <&vp0_out_dsi1>;
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
goodix,cfg-group3 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
};

342
rk356x/rp-lcd-dual-lvds-10-1024-600-mipi1-7-1200-1920.dtsi Executable file
View File

@@ -0,0 +1,342 @@
#include <dt-bindings/display/media-bus-format.h>
#define RP_DUAL_LCD
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "180";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
home_apk = "null";
status = "okay";
};
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
width-mm = <217>;
height-mm = <136>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&dsi1 {
status = "okay";
//rockchip,lane-rate = <480>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 03 b7 50 00
39 00 03 b8 00 00
39 10 03 b9 00 00
39 10 03 ba 14 42
39 10 03 bb 03 00
39 60 03 b9 01 00
39 10 03 de 03 00
39 60 03 c9 02 23
39 00 02 b0 00
39 00 06 14 08 b0 00 22 00
39 30 02 b4 0c
39 40 03 b6 3a d3
39 50 02 51 e6
39 30 02 53 2c
05 78 01 29
05 78 01 11
39 00 03 b7 50 00
39 00 03 b8 00 00
39 10 03 b9 00 00
39 10 03 ba 8c 83
39 10 03 bb 03 00
39 60 03 b9 01 00
39 10 03 c9 02 23
39 60 03 ca 01 23
39 10 03 cb 10 05
39 10 03 cc 05 10
39 10 03 d0 00 00
39 10 03 b6 03 00
39 10 03 de 03 00
39 10 03 d6 05 00
39 60 03 b7 4b 02
05 00 01 2c
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings1: display-timings {
native-mode = <&dsi1_timing0>;
dsi1_timing0: timing0 {
clock-frequency = <140000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <30>;
hfront-porch = <60>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi1_in_vp0 {
status = "okay";
};
&dsi1_in_vp1 {
status = "disabled";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&video_phy1 {
status = "okay";
};
&route_dsi1 {
status = "okay";
connect = <&vp0_out_dsi1>;
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
goodix,cfg-group3 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
};

327
rk356x/rp-lcd-dual-lvds-7-1024-600-mipi1-5-720-1280-v2.dtsi Executable file
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#include <dt-bindings/display/media-bus-format.h>
#define RP_DUAL_LCD
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "180";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "LVDS-1";
extend_device = "DSI-1";
extend_rotate = "1";
extend_rotate_2 = "0";
rotation_efull = "true";
rotation_efull_2 = "false";
home_apk = "null";
status = "okay";
};
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
width-mm = <217>;
height-mm = <136>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&dsi1 {
status = "okay";
//rockchip,lane-rate = <480>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 B9 F1 12 83
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37
39 00 02 B8 26
39 00 04 BF 02 10 00
39 00 0B B3 07 0B 1E 1E 03 FF 00 00 00 00
39 00 0A C0 73 73 50 50 00 00 08 70 00
39 00 02 BC 46
39 00 02 CC 0B
39 00 02 B4 80
39 00 04 B2 C8 12 A0
39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 80 C0 10
39 00 0D C1 53 00 32 32 77 F1 FF FF CC CC 77 77
39 00 03 B5 09 09
39 00 03 B6 B7 B7
39 00 40 E9 C2 10 0A 00 00 81 80 12 30 00 37 86 81 80 37 18 00 05 00 00 00 00 00 05 00 00 00 00 F8 BA 46 02 08 28 88 88 88 88 88 F8 BA 57 13 18 38 88 88 88 88 88 00 00 00 03 00 00 00 00 00 00 00 00 00
39 00 3E EA 07 12 01 01 02 3C 00 00 00 00 00 00 8F BA 31 75 38 18 88 88 88 88 88 8F BA 20 64 28 08 88 88 88 88 88 23 10 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 23 E0 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19
05 ff 01 11 ////Sleep Out
05 32 01 29 ///Display On
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <60000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <11>;
vfront-porch = <16>;
hsync-len = <10>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&dsi1_in_vp0 {
status = "okay";
};
&dsi1_in_vp1 {
status = "disabled";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&video_phy1 {
status = "okay";
};
&route_dsi1 {
status = "okay";
connect = <&vp0_out_dsi1>;
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
5A 00 04 58 02 05 3D 00 01
08 32 0F 5A 32 03 05 00 00
00 00 02 00 00 18 1A 1E 14
87 29 0A 55 57 B5 06 00 00
00 20 33 1C 14 01 00 0F 00
2B FF 7F 19 46 32 3C 78 94
D5 02 08 00 00 04 98 40 00
8A 4A 00 80 55 00 77 61 00
6F 70 00 6F 00 00 00 00 F0
40 30 FF FF 27 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 02 04 06 08 0A
0C 0E 10 12 14 FF FF FF FF
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 02
04 06 08 0A 0C 1D 1E 1F 20
21 22 24 26 28 29 2A FF FF
FF FF FF FF FF FF 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 6F 01
];
};

348
rk356x/rp-lcd-dual-mipi0-7-1024-600-edp-13-1920-1080.dtsi Executable file
View File

@@ -0,0 +1,348 @@
#include <dt-bindings/display/media-bus-format.h>
#define RP_DUAL_LCD
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "240";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
home_apk = "null";
status = "okay";
};
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <51000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <136>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&edp_panel {
status = "okay";
compatible = "simple-panel";
prepare-delay-ms = <20>;
enable-delay-ms = <20>;
disable-delay-ms = <20>;
unprepare-delay-ms = <20>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing1>;
timing0: timing0 {//EDP 13.3
clock-frequency = <150000000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <12>;
hsync-len = <16>;
hback-porch = <48>;
vfront-porch = <8>;
vsync-len = <4>;
vback-porch = <8>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
timing1: timing1 {// EDP 15.6 LP156WF6
clock-frequency = <138000000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <48>;
hsync-len = <32>;
hback-porch = <80>;
vfront-porch = <3>;
vsync-len = <5>;
vback-porch = <23>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
&edp {
hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
status = "okay";
force-hpd;
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&dsi1_in_vp0 {
status = "disabled";
};
&dsi1_in_vp1 {
status = "disabled";
};
&lvds_in_vp1 {
status = "disabled";
};
&lvds_in_vp2 {
status = "disabled";
};
&edp_in_vp0 {
status = "okay";
};
&edp_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&edp_phy {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&route_lvds {
status = "disabled";
connect = <&vp2_out_lvds>;
};
&route_edp {
status = "okay";
connect = <&vp0_out_edp>;
};
&pinctrl {
goodix {
goodix_irq: goodix-irq {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [ //old touch
41 00 04 58 02 05 7D 00 01 2F 28
0F 50 32 03 05 00 00 00 00 00 00
00 18 1A 1E 14 89 0D 0C 2C 2A 0C
08 00 00 00 82 03 1D 0A 32 05 0A
32 00 00 00 00 00 0B 1E 50 94 E5
02 08 00 00 04 A7 21 00 8B 28 00
73 31 00 62 3B 00 52 48 00 52 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 32 50 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 2A
29 28 26 24 22 21 20 1F 1E 1D 18
16 14 13 12 10 0F 0C 0A 08 06 FF
FF FF FF 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 3B 01
];
goodix,cfg-group5 = [ //new touch
FF 00 04 58 02 05 0D 04 01
0A 28 0A 50 32 03 05 00 00
00 00 00 00 08 00 00 00 00
8B 2B 0E 30 32 0F 0A 00 00
00 83 02 1D 00 00 00 00 00
03 03 32 00 00 00 24 60 94
C0 02 00 00 00 04 93 27 00
80 30 00 70 3B 00 65 47 00
5C 57 00 5C 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 1C 1A 18 16 14
12 10 0E 0C 0A 08 06 04 02
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 26 24
22 21 20 1F 1E 1D 1C 18 16
13 12 10 0F 0C 0A 08 06 04
02 00 FF FF FF FF 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 6A 01
];
};

528
rk356x/rp-lcd-dual-mipi0-7-1024-600-mipi1-10-800-1280.dtsi Executable file
View File

@@ -0,0 +1,528 @@
#include <dt-bindings/display/media-bus-format.h>
#define RP_DUAL_LCD
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "180";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
home_apk = "null";
status = "okay";
};
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing1 {
clock-frequency = <51000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <136>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi1 {
status = "okay";
//rockchip,lane-rate = <480>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
15 00 02 E0 00
15 00 02 E1 93
15 00 02 E2 65
15 00 02 E3 F8
15 00 02 E0 04
15 00 02 2D 03
15 00 02 E0 00
15 00 02 80 03
15 00 02 70 02
15 00 02 71 23
15 00 02 72 06
15 00 02 E0 01
15 00 02 00 00
15 00 02 01 66
15 00 02 03 00
15 00 02 04 6D
15 00 02 17 00
15 00 02 18 BF
15 00 02 19 00
15 00 02 1A 00
15 00 02 1B BF
15 00 02 1C 00
15 00 02 1F 3E
15 00 02 20 28
15 00 02 21 28
15 00 02 22 0E
15 00 02 37 09
15 00 02 38 04
15 00 02 39 08
15 00 02 3A 12
15 00 02 3C 78
15 00 02 3D FF
15 00 02 3E FF
15 00 02 3F 7F
15 00 02 40 06
15 00 02 41 A0
15 00 02 55 0F
15 00 02 56 01
15 00 02 57 69
15 00 02 58 0A
15 00 02 59 0A
15 00 02 5A 29
15 00 02 5B 15
15 00 02 5D 7C
15 00 02 5E 65
15 00 02 5F 55
15 00 02 60 49
15 00 02 61 44
15 00 02 62 35
15 00 02 63 3A
15 00 02 64 23
15 00 02 65 3D
15 00 02 66 3C
15 00 02 67 3D
15 00 02 68 5D
15 00 02 69 4D
15 00 02 6A 56
15 00 02 6B 48
15 00 02 6C 45
15 00 02 6D 38
15 00 02 6E 25
15 00 02 6F 00
15 00 02 70 7C
15 00 02 71 65
15 00 02 72 55
15 00 02 73 49
15 00 02 74 44
15 00 02 75 35
15 00 02 76 3A
15 00 02 77 23
15 00 02 78 3D
15 00 02 79 3C
15 00 02 7A 3D
15 00 02 7B 5D
15 00 02 7C 4D
15 00 02 7D 56
15 00 02 7E 48
15 00 02 7F 45
15 00 02 80 38
15 00 02 81 25
15 00 02 82 00
15 00 02 E0 02
15 00 02 00 1E
15 00 02 01 1E
15 00 02 02 41
15 00 02 03 41
15 00 02 04 43
15 00 02 05 43
15 00 02 06 1F
15 00 02 07 1F
15 00 02 08 1F
15 00 02 09 1F
15 00 02 0A 1E
15 00 02 0B 1E
15 00 02 0C 1F
15 00 02 0D 47
15 00 02 0E 47
15 00 02 0F 45
15 00 02 10 45
15 00 02 11 4B
15 00 02 12 4B
15 00 02 13 49
15 00 02 14 49
15 00 02 15 1F
15 00 02 16 1E
15 00 02 17 1E
15 00 02 18 40
15 00 02 19 40
15 00 02 1A 42
15 00 02 1B 42
15 00 02 1C 1F
15 00 02 1D 1F
15 00 02 1E 1F
15 00 02 1F 1f
15 00 02 20 1E
15 00 02 21 1E
15 00 02 22 1f
15 00 02 23 46
15 00 02 24 46
15 00 02 25 44
15 00 02 26 44
15 00 02 27 4A
15 00 02 28 4A
15 00 02 29 48
15 00 02 2A 48
15 00 02 2B 1f
15 00 02 2C 1F
15 00 02 2D 1F
15 00 02 2E 42
15 00 02 2F 42
15 00 02 30 40
15 00 02 31 40
15 00 02 32 1E
15 00 02 33 1E
15 00 02 34 1F
15 00 02 35 1F
15 00 02 36 1E
15 00 02 37 1E
15 00 02 38 1F
15 00 02 39 48
15 00 02 3A 48
15 00 02 3B 4A
15 00 02 3C 4A
15 00 02 3D 44
15 00 02 3E 44
15 00 02 3F 46
15 00 02 40 46
15 00 02 41 1F
15 00 02 42 1F
15 00 02 43 1F
15 00 02 44 43
15 00 02 45 43
15 00 02 46 41
15 00 02 47 41
15 00 02 48 1E
15 00 02 49 1E
15 00 02 4A 1E
15 00 02 4B 1F
15 00 02 4C 1E
15 00 02 4D 1E
15 00 02 4E 1F
15 00 02 4F 49
15 00 02 50 49
15 00 02 51 4B
15 00 02 52 4B
15 00 02 53 45
15 00 02 54 45
15 00 02 55 47
15 00 02 56 47
15 00 02 57 1F
15 00 02 58 10
15 00 02 59 00
15 00 02 5A 00
15 00 02 5B 30
15 00 02 5C 02
15 00 02 5D 40
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 30
15 00 02 61 01
15 00 02 62 02
15 00 02 63 6A
15 00 02 64 6A
15 00 02 65 05
15 00 02 66 12
15 00 02 67 74
15 00 02 68 04
15 00 02 69 6A
15 00 02 6A 6A
15 00 02 6B 08
15 00 02 6C 00
15 00 02 6D 06
15 00 02 6E 00
15 00 02 6F 88
15 00 02 70 00
15 00 02 71 00
15 00 02 72 06
15 00 02 73 7B
15 00 02 74 00
15 00 02 75 07
15 00 02 76 00
15 00 02 77 5D
15 00 02 78 17
15 00 02 79 1F
15 00 02 7A 00
15 00 02 7B 00
15 00 02 7C 00
15 00 02 7D 03
15 00 02 7E 7B
15 00 02 E0 04
15 00 02 2B 2B
15 00 02 2E 44
15 00 02 E0 01
15 00 02 0E 01
15 00 02 E0 03
15 00 02 98 2F
15 00 02 E0 00
15 00 02 E6 02
15 00 02 E7 02
05 78 01 11
05 05 01 29
15 0a 02 35 00
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings1: display-timings {
native-mode = <&dsi1_timing0>;
dsi1_timing0: timing0 {
clock-frequency = <68000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <18>;
hfront-porch = <18>;
vback-porch = <8>;
vfront-porch = <24>;
hsync-len = <18>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&dsi1_in_vp0 {
status = "okay";
};
&dsi1_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&video_phy1 {
status = "okay";
};
&route_dsi1 {
status = "okay";
connect = <&vp0_out_dsi1>;
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
goodix,cfg-group3 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
};

350
rk356x/rp-lcd-dual-mipi0-7-1024-600-mipi1-5-720-1280-v2.dtsi Executable file
View File

@@ -0,0 +1,350 @@
#include <dt-bindings/display/media-bus-format.h>
#define RP_DUAL_LCD
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "160";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "DSI";
extend_rotate = "1";
extend_rotate_2 = "0";
rotation_efull = "true";
rotation_efull_2 = "false";
home_apk = "null";
status = "okay";
};
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing1 {
clock-frequency = <51000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <136>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi1 {
status = "okay";
//rockchip,lane-rate = <480>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 B9 F1 12 83
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37
39 00 02 B8 26
39 00 04 BF 02 10 00
39 00 0B B3 07 0B 1E 1E 03 FF 00 00 00 00
39 00 0A C0 73 73 50 50 00 00 08 70 00
39 00 02 BC 46
39 00 02 CC 0B
39 00 02 B4 80
39 00 04 B2 C8 12 A0
39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 80 C0 10
39 00 0D C1 53 00 32 32 77 F1 FF FF CC CC 77 77
39 00 03 B5 09 09
39 00 03 B6 B7 B7
39 00 40 E9 C2 10 0A 00 00 81 80 12 30 00 37 86 81 80 37 18 00 05 00 00 00 00 00 05 00 00 00 00 F8 BA 46 02 08 28 88 88 88 88 88 F8 BA 57 13 18 38 88 88 88 88 88 00 00 00 03 00 00 00 00 00 00 00 00 00
39 00 3E EA 07 12 01 01 02 3C 00 00 00 00 00 00 8F BA 31 75 38 18 88 88 88 88 88 8F BA 20 64 28 08 88 88 88 88 88 23 10 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 23 E0 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19
05 ff 01 11 ////Sleep Out
05 32 01 29 ///Display On
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings1: display-timings {
native-mode = <&dsi1_timing0>;
dsi1_timing0: timing0 {
clock-frequency = <60000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <11>;
vfront-porch = <16>;
hsync-len = <10>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&dsi1_in_vp0 {
status = "okay";
};
&dsi1_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&video_phy1 {
status = "okay";
};
&route_dsi1 {
status = "okay";
connect = <&vp0_out_dsi1>;
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
41 00 04 58 02 05 7D 00 01 2F 28
0F 50 32 03 05 00 00 00 00 00 00
00 18 1A 1E 14 89 0D 0C 2C 2A 0C
08 00 00 00 82 03 1D 0A 32 05 0A
32 00 00 00 00 00 0B 1E 50 94 E5
02 08 00 00 04 A7 21 00 8B 28 00
73 31 00 62 3B 00 52 48 00 52 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 32 50 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 2A
29 28 26 24 22 21 20 1F 1E 1D 18
16 14 13 12 10 0F 0C 0A 08 06 FF
FF FF FF 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 3B 01
];
goodix,cfg-group5 = [
FF 00 04 58 02 05 0D 04 01
0A 28 0A 50 32 03 05 00 00
00 00 00 00 08 00 00 00 00
8B 2B 0E 30 32 0F 0A 00 00
00 83 02 1D 00 00 00 00 00
03 03 32 00 00 00 24 60 94
C0 02 00 00 00 04 93 27 00
80 30 00 70 3B 00 65 47 00
5C 57 00 5C 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 1C 1A 18 16 14
12 10 0E 0C 0A 08 06 04 02
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 26 24
22 21 20 1F 1E 1D 1C 18 16
13 12 10 0F 0C 0A 08 06 04
02 00 FF FF FF FF 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 6A 01
];
};

762
rk356x/rp-lcd-duallcd-mipi0-10-800-1280-mipi1-10-800-1280.dtsi Executable file
View File

@@ -0,0 +1,762 @@
/**
* rpdzkj lcd configuration
*/
#define RP_DUAL_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 FF 98 81 03
//=========_1===========//
39 00 02 01 00
39 00 02 02 00
39 00 02 03 53
39 00 02 04 13
39 00 02 05 00
39 00 02 06 04
39 00 02 07 00
39 00 02 08 00
39 00 02 09 22
39 00 02 0a 22
39 00 02 0b 00
39 00 02 0c 01
39 00 02 0d 00
39 00 02 0e 00
39 00 02 0f 23
39 00 02 10 23
39 00 02 11 00
39 00 02 12 00
39 00 02 13 00
39 00 02 14 00
39 00 02 15 00
39 00 02 16 00
39 00 02 17 00
39 00 02 18 00
39 00 02 19 00
39 00 02 1a 00
39 00 02 1b 00
39 00 02 1c 00
39 00 02 1d 00
39 00 02 1e 44
39 00 02 1f 80
39 00 02 20 02
39 00 02 21 03
39 00 02 22 00
39 00 02 23 00
39 00 02 24 00
39 00 02 25 00
39 00 02 26 00
39 00 02 27 00
39 00 02 28 33
39 00 02 29 03
39 00 02 2a 00
39 00 02 2b 00
39 00 02 2c 00
39 00 02 2d 00
39 00 02 2e 00
39 00 02 2f 00
39 00 02 30 00
39 00 02 31 00
39 00 02 32 00
39 00 02 33 00
39 00 02 34 04
39 00 02 35 00
39 00 02 36 00
39 00 02 37 00
39 00 02 38 3C
39 00 02 39 00
39 00 02 3a 40
39 00 02 3b 40
39 00 02 3c 00
39 00 02 3d 00
39 00 02 3e 00
39 00 02 3f 00
39 00 02 40 00
39 00 02 41 00
39 00 02 42 00
39 00 02 43 00
39 00 02 44 00
//=========_2===========//
39 00 02 50 01
39 00 02 51 23
39 00 02 52 45
39 00 02 53 67
39 00 02 54 89
39 00 02 55 ab
39 00 02 56 01
39 00 02 57 23
39 00 02 58 45
39 00 02 59 67
39 00 02 5a 89
39 00 02 5b ab
39 00 02 5c cd
39 00 02 5d ef
//=========_3===========//
39 00 02 5e 11
39 00 02 5f 01
39 00 02 60 00
39 00 02 61 15
39 00 02 62 14
39 00 02 63 0C
39 00 02 64 0D
39 00 02 65 0E
39 00 02 66 0F
39 00 02 67 06
39 00 02 68 02
39 00 02 69 02
39 00 02 6a 02
39 00 02 6b 02
39 00 02 6c 02
39 00 02 6d 02
39 00 02 6e 08
39 00 02 6f 02
39 00 02 70 02
39 00 02 71 02
39 00 02 72 02
39 00 02 73 02
39 00 02 74 02
39 00 02 75 01
39 00 02 76 00
39 00 02 77 15
39 00 02 78 14
39 00 02 79 0C
39 00 02 7a 0D
39 00 02 7b 0E
39 00 02 7c 0F
39 00 02 7D 08
39 00 02 7E 02
39 00 02 7F 02
39 00 02 80 02
39 00 02 81 02
39 00 02 82 02
39 00 02 83 02
39 00 02 84 06
39 00 02 85 02
39 00 02 86 02
39 00 02 87 02
39 00 02 88 02
39 00 02 89 02
39 00 02 8A 02
//CMD_Page
39 00 04 FF 98 81 04
39 00 02 6C 15
39 00 02 6E 3B
39 00 02 6F 73
39 00 02 3A 24
39 00 02 8D 14
39 00 02 87 BA
39 00 02 26 76
39 00 02 B2 D1
39 00 02 B5 27
39 00 02 31 75
39 00 02 30 03
39 00 02 3B 98
39 00 02 35 1f
39 00 02 33 14
39 00 02 7A 0F
39 00 02 38 02
39 00 02 39 00
//CMD_Page
39 00 04 FF 98 81 01
39 00 02 22 0A
39 00 02 31 0A
39 00 02 35 07
39 00 02 52 00
39 00 02 53 5A
39 00 02 54 00
39 00 02 55 59
39 00 02 50 83
39 00 02 51 80
39 00 02 60 20
39 00 02 61 01
39 00 02 62 07
39 00 02 63 00
//GammaP
39 00 02 A0 08
39 00 02 A1 0F
39 00 02 A2 15
39 00 02 A3 0E
39 00 02 A4 0D
39 00 02 A5 1B
39 00 02 A6 0F
39 00 02 A7 14
39 00 02 A8 33
39 00 02 A9 17
39 00 02 AA 23
39 00 02 AB 3F
39 00 02 AC 22
39 00 02 AD 24
39 00 02 AE 59
39 00 02 AF 2B
39 00 02 B0 2E
39 00 02 B1 4C
39 00 02 B2 5C
39 00 02 B3 33
//GammaN
39 00 02 C0 08
39 00 02 C1 0F
39 00 02 C2 15
39 00 02 C3 0E
39 00 02 C4 0D
39 00 02 C5 1B
39 00 02 C6 0F
39 00 02 C7 14
39 00 02 C8 33
39 00 02 C9 17
39 00 02 CA 23
39 00 02 CB 3F
39 00 02 CC 22
39 00 02 CD 24
39 00 02 CE 59
39 00 02 CF 2B
39 00 02 D0 2E
39 00 02 D1 4C
39 00 02 D2 5C
39 00 02 D3 33
//CMD_Page
39 00 04 FF 98 81 00
05 78 01 11 //sleep out
05 00 01 29 //display on
05 00 01 35 //TE on
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <76000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <60>;
hfront-porch = <60>;
vback-porch = <30>;
vfront-porch = <20>;
hsync-len = <30>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi1 {
status = "okay";
rockchip,lane-rate = <480>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 FF 98 81 03
//=========_1===========//
39 00 02 01 00
39 00 02 02 00
39 00 02 03 53
39 00 02 04 13
39 00 02 05 00
39 00 02 06 04
39 00 02 07 00
39 00 02 08 00
39 00 02 09 22
39 00 02 0a 22
39 00 02 0b 00
39 00 02 0c 01
39 00 02 0d 00
39 00 02 0e 00
39 00 02 0f 23
39 00 02 10 23
39 00 02 11 00
39 00 02 12 00
39 00 02 13 00
39 00 02 14 00
39 00 02 15 00
39 00 02 16 00
39 00 02 17 00
39 00 02 18 00
39 00 02 19 00
39 00 02 1a 00
39 00 02 1b 00
39 00 02 1c 00
39 00 02 1d 00
39 00 02 1e 44
39 00 02 1f 80
39 00 02 20 02
39 00 02 21 03
39 00 02 22 00
39 00 02 23 00
39 00 02 24 00
39 00 02 25 00
39 00 02 26 00
39 00 02 27 00
39 00 02 28 33
39 00 02 29 03
39 00 02 2a 00
39 00 02 2b 00
39 00 02 2c 00
39 00 02 2d 00
39 00 02 2e 00
39 00 02 2f 00
39 00 02 30 00
39 00 02 31 00
39 00 02 32 00
39 00 02 33 00
39 00 02 34 04
39 00 02 35 00
39 00 02 36 00
39 00 02 37 00
39 00 02 38 3C
39 00 02 39 00
39 00 02 3a 40
39 00 02 3b 40
39 00 02 3c 00
39 00 02 3d 00
39 00 02 3e 00
39 00 02 3f 00
39 00 02 40 00
39 00 02 41 00
39 00 02 42 00
39 00 02 43 00
39 00 02 44 00
//=========_2===========//
39 00 02 50 01
39 00 02 51 23
39 00 02 52 45
39 00 02 53 67
39 00 02 54 89
39 00 02 55 ab
39 00 02 56 01
39 00 02 57 23
39 00 02 58 45
39 00 02 59 67
39 00 02 5a 89
39 00 02 5b ab
39 00 02 5c cd
39 00 02 5d ef
//=========_3===========//
39 00 02 5e 11
39 00 02 5f 01
39 00 02 60 00
39 00 02 61 15
39 00 02 62 14
39 00 02 63 0C
39 00 02 64 0D
39 00 02 65 0E
39 00 02 66 0F
39 00 02 67 06
39 00 02 68 02
39 00 02 69 02
39 00 02 6a 02
39 00 02 6b 02
39 00 02 6c 02
39 00 02 6d 02
39 00 02 6e 08
39 00 02 6f 02
39 00 02 70 02
39 00 02 71 02
39 00 02 72 02
39 00 02 73 02
39 00 02 74 02
39 00 02 75 01
39 00 02 76 00
39 00 02 77 15
39 00 02 78 14
39 00 02 79 0C
39 00 02 7a 0D
39 00 02 7b 0E
39 00 02 7c 0F
39 00 02 7D 08
39 00 02 7E 02
39 00 02 7F 02
39 00 02 80 02
39 00 02 81 02
39 00 02 82 02
39 00 02 83 02
39 00 02 84 06
39 00 02 85 02
39 00 02 86 02
39 00 02 87 02
39 00 02 88 02
39 00 02 89 02
39 00 02 8A 02
//CMD_Page
39 00 04 FF 98 81 04
39 00 02 6C 15
39 00 02 6E 3B
39 00 02 6F 73
39 00 02 3A 24
39 00 02 8D 14
39 00 02 87 BA
39 00 02 26 76
39 00 02 B2 D1
39 00 02 B5 27
39 00 02 31 75
39 00 02 30 03
39 00 02 3B 98
39 00 02 35 1f
39 00 02 33 14
39 00 02 7A 0F
39 00 02 38 02
39 00 02 39 00
//CMD_Page
39 00 04 FF 98 81 01
39 00 02 22 0A
39 00 02 31 0A
39 00 02 35 07
39 00 02 52 00
39 00 02 53 5A
39 00 02 54 00
39 00 02 55 59
39 00 02 50 83
39 00 02 51 80
39 00 02 60 20
39 00 02 61 01
39 00 02 62 07
39 00 02 63 00
//GammaP
39 00 02 A0 08
39 00 02 A1 0F
39 00 02 A2 15
39 00 02 A3 0E
39 00 02 A4 0D
39 00 02 A5 1B
39 00 02 A6 0F
39 00 02 A7 14
39 00 02 A8 33
39 00 02 A9 17
39 00 02 AA 23
39 00 02 AB 3F
39 00 02 AC 22
39 00 02 AD 24
39 00 02 AE 59
39 00 02 AF 2B
39 00 02 B0 2E
39 00 02 B1 4C
39 00 02 B2 5C
39 00 02 B3 33
//GammaN
39 00 02 C0 08
39 00 02 C1 0F
39 00 02 C2 15
39 00 02 C3 0E
39 00 02 C4 0D
39 00 02 C5 1B
39 00 02 C6 0F
39 00 02 C7 14
39 00 02 C8 33
39 00 02 C9 17
39 00 02 CA 23
39 00 02 CB 3F
39 00 02 CC 22
39 00 02 CD 24
39 00 02 CE 59
39 00 02 CF 2B
39 00 02 D0 2E
39 00 02 D1 4C
39 00 02 D2 5C
39 00 02 D3 33
//CMD_Page
39 00 04 FF 98 81 00
05 78 01 11 //sleep out
05 00 01 29 //display on
05 00 01 35 //TE on
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings1: display-timings {
native-mode = <&dsi1_timing0>;
dsi1_timing0: timing1 {
clock-frequency = <76000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <60>;
hfront-porch = <60>;
vback-porch = <30>;
vfront-porch = <20>;
hsync-len = <30>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&dsi1_in_vp0 {
status = "okay";
};
&dsi1_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&video_phy1 {
status = "okay";
};
&route_dsi1 {
status = "okay";
connect = <&vp0_out_dsi1>;
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
#if 0
/* old touchscreen sensor_id0, reserve for some customer maybe using */
goodix,cfg-group0 = [
00 20 03 00 05 0A 05 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 00 00 00 00 90 30 AA
17 15 31 0D 00 00 01 B9 04 25
00 00 00 00 00 00 00 00 00 00
00 0F 23 94 C5 02 07 00 00 04
9F 10 00 8B 13 00 7C 16 00 6B
1B 00 60 20 00 60 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04
01 00 00 00 00 00 00 00 00 00
00 00 2A 29 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 00 02
04 06 07 08 0A 0C 0D 0E 0F 10
11 12 13 14 00 00 00 00 00 00
00 00 00 00 96 01
];
#endif
/** ic 9271_1020 sensor_id0, v3 add 20211104 */
goodix,cfg-group0 = [
59 20 03 00 05 0A 05 00 01 08
28 05 5A 46 03 05 00 00 00 00
00 00 00 17 19 1B 14 8E 2E 99
37 39 D3 07 00 00 01 81 02 2D
00 00 00 00 00 00 00 00 00 00
00 28 78 94 C5 02 07 00 00 04
9A 2C 00 80 37 00 6B 45 00 5C
56 00 50 6C 00 50 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 17 16 15 14 11 10 0F 0E
0D 0C 09 08 07 06 05 04 01 00
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0D 0F 10 11 12 28 27 26 25 24
23 22 21 20 1F 1E 1C 1B 19 13
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 BF 01
];
/* touchscreen sensor_id2 */
goodix,cfg-group2 = [
00 20 03 00 05 0A 35 00 00
05 28 08 55 41 03 05 00 00
00 00 00 00 00 1A 1C 1E 14
8E 2E 99 14 16 D3 07 00 00
00 9B 02 2D 00 00 00 00 00
00 00 00 00 00 00 0F 23 94
D5 02 07 00 00 04 9D 10 00
86 13 00 75 16 00 61 1B 00
53 20 00 53 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 17 16 15 14 11
10 0F 0E 0D 0C 09 08 07 06
05 04 01 00 FF FF 00 00 00
00 00 00 00 00 00 00 00 02
04 06 07 08 0A 0C 0D 0F 10
11 12 13 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 FF
FF FF FF 00 00 00 00 00 00
00 00 00 00 4D 01
];
};

148
rk356x/rp-lcd-edp-13-1920-1080.dtsi Executable file
View File

@@ -0,0 +1,148 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
#define RP_EDP_USED
&edp_panel {
status = "okay";
compatible = "simple-panel";
prepare-delay-ms = <20>;
enable-delay-ms = <20>;
disable-delay-ms = <20>;
unprepare-delay-ms = <20>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {//EDP 15.6
clock-frequency = <150000000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <160>;
hsync-len = <32>;
hback-porch = <160>;
vfront-porch = <3>;
vsync-len = <5>;
vback-porch = <23>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
timing1: timing1 {// EDP 13.3
clock-frequency = <138000000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <48>;
hsync-len = <32>;
hback-porch = <80>;
vfront-porch = <3>;
vsync-len = <5>;
vback-porch = <23>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
&edp {
status = "okay";
force-hpd;
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&edp_phy {
status = "okay";
};
&edp_in_vp0 {
status = "okay";
};
&edp_in_vp1 {
status = "disabled";
};
&hdmi_in_vp0 {
status = "disabled";
};
&hdmi_in_vp1 {
status = "okay";
};
&route_edp {
status = "okay";
connect = <&vp0_out_edp>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1920>;
gtp_resolution_y = <1080>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
64 80 07 38 04 0A 3D 00 01 C8 28 0F
55 37 03 05 00 00 00 00 00 00 00 18
1A 1E 14 90 30 AA 25 27 0F 0A 00 00
00 5A 03 11 00 00 00 00 00 00 00 00
00 25 00 19 37 94 D5 02 08 14 00 04
9B 1B 00 8E 1F 00 80 25 00 76 2B 00
6E 32 00 6E 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 10 00 00 00 00
00 00 00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04 01 00
00 00 00 00 00 00 00 00 00 00 00 02
04 06 07 08 0A 0C 0D 0E 0F 10 11 12
13 14 19 1B 1C 1E 1F 20 21 22 23 24
25 26 27 28 29 2A 00 00 00 00 00 00
00 00 00 00 B7 01
];
};

152
rk356x/rp-lcd-edp-13.3-15.6-1920-1080.dtsi Executable file
View File

@@ -0,0 +1,152 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
#define RP_EDP_USED
&edp_panel {
status = "okay";
compatible = "simple-panel";
prepare-delay-ms = <20>;
enable-delay-ms = <20>;
disable-delay-ms = <20>;
unprepare-delay-ms = <20>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing1>;
timing0: timing0 {//EDP 15.6
clock-frequency = <150000000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <160>;
hsync-len = <32>;
hback-porch = <160>;
vfront-porch = <3>;
vsync-len = <5>;
vback-porch = <23>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
timing1: timing1 {// EDP 13.3
clock-frequency = <138000000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <48>;
hsync-len = <32>;
hback-porch = <80>;
vfront-porch = <3>;
vsync-len = <5>;
vback-porch = <23>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
&edp {
status = "okay";
force-hpd;
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&edp_phy {
status = "okay";
};
&edp_in_vp0 {
status = "okay";
};
&edp_in_vp1 {
status = "disabled";
};
&hdmi_in_vp0 {
status = "disabled";
};
&hdmi_in_vp1 {
status = "okay";
};
&route_edp {
status = "okay";
connect = <&vp0_out_edp>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1920>;
gtp_resolution_y = <1080>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
43 80 07 38 04 0A 3D 00 01 06
28 08 55 32 03 05 00 00 00 00
00 00 06 18 1A 1E 14 95 35 FF
2D 2F A6 0F 00 00 00 01 03 2C
00 00 00 00 00 00 00 00 00 00
00 2D 5A 94 D0 42 00 08 00 04
79 30 00 6E 37 00 65 3F 00 5D
49 00 57 54 00 57 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 1D 1C 1B 1A 19 18 17 16
15 14 13 12 11 10 0F 0E 0D 0C
0B 0A 09 08 07 06 05 04 03 02
01 00 00 01 02 03 04 05 06 07
08 09 0A 0B 0C 0D 0E 0F 10 11
12 13 14 15 16 17 18 19 1B 1C
1D 1E 1F 20 21 22 23 24 25 26
27 28 29 2A 86 01
];
};

155
rk356x/rp-lcd-edp-15-1366-768.dtsi Executable file
View File

@@ -0,0 +1,155 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
#define RP_EDP_USED
&edp_panel {
status = "okay";
compatible = "simple-panel";
prepare-delay-ms = <20>;
enable-delay-ms = <20>;
disable-delay-ms = <20>;
unprepare-delay-ms = <20>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {//EDP 15.6 1366x768
clock-frequency = <72300000>;
hactive = <1366>;
vactive = <768>;
hfront-porch = <48>;
hsync-len = <32>;
hback-porch = <80>;
vfront-porch = <3>;
vsync-len = <5>;
vback-porch = <14>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
timing1: timing1 {// EDP 13.3
clock-frequency = <138000000>;
hactive = <1920>;
vactive = <1080>;
hfront-porch = <48>;
hsync-len = <32>;
hback-porch = <80>;
vfront-porch = <3>;
vsync-len = <5>;
vback-porch = <23>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
&edp {
status = "okay";
force-hpd;
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&edp_phy {
status = "okay";
};
&edp_in_vp0 {
status = "okay";
};
&edp_in_vp1 {
status = "disabled";
};
&hdmi_in_vp0 {
status = "disabled";
};
&hdmi_in_vp1 {
status = "okay";
};
&route_edp {
status = "okay";
connect = <&vp0_out_edp>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1366>;
gtp_resolution_y = <768>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
41 80 07 38 04 0A 2D 00 01 06
28 08 55 32 03 05 00 00 00 00
00 00 04 17 19 1D 14 95 35 FF
4C 4E B5 06 00 00 00 00 03 2D
00 00 00 00 00 00 00 00 00 00
00 2D 5A 94 D0 42 00 08 00 04
61 30 00 57 37 00 4D 3F 00 45
49 00 3E 54 00 3E 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 1D 1C 1B 1A 19 18 17 16
15 14 13 12 11 10 0F 0E 0D 0C
0B 0A 09 08 07 06 05 04 03 02
01 00 00 01 02 03 04 05 06 07
08 09 0A 0B 0C 0D 0E 0F 10 11
12 13 14 15 16 17 18 19 1B 1C
1D 1E 1F 20 21 22 23 24 25 26
27 28 29 2A EA 01
];
};

33
rk356x/rp-lcd-hdmi.dtsi Executable file
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@@ -0,0 +1,33 @@
/**
* enable hdmi dispaly
*/
&hdmi {
status = "okay";
};
&hdmi_in_vp0 {
status = "okay";
};
&hdmi_in_vp1 {
status = "disabled";
};
&hdmi_sound {
status = "okay";
};
&i2s0_8ch {
status = "okay";
};
&hdmi {
rockchip,phy-table =
<92812500 0x8009 0x0000 0x0270>,
<165000000 0x800b 0x0000 0x026d>,
<185625000 0x800b 0x0000 0x01ed>,
<297000000 0x800b 0x0000 0x01ad>,
<594000000 0x8029 0x0000 0x0088>,
<000000000 0x0000 0x0000 0x0000>;
};

177
rk356x/rp-lcd-lvds-10-1024-600-raw.dtsi Executable file
View File

@@ -0,0 +1,177 @@
#include <dt-bindings/display/media-bus-format.h>
#include "rp-lcd-hdmi.dtsi"
&backlight4{
pwms = <&pwm4 0 25000 1>; /** pwm polarity of raw lvds screen is inverse */
};
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
width-mm = <217>;
height-mm = <136>;
/*
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&pwm4 {
status = "okay";
};
&dsi0 {
status = "disabled";
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
goodix,cfg-group3 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
};

174
rk356x/rp-lcd-lvds-10-1024-600.dtsi Executable file
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@@ -0,0 +1,174 @@
#include <dt-bindings/display/media-bus-format.h>
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
width-mm = <217>;
height-mm = <136>;
/*
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&backlight4{
default-brightness-level=<255>;
};
&pwm4 {
status = "okay";
};
&dsi0 {
status = "disabled";
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
goodix,cfg-group3 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
};

197
rk356x/rp-lcd-lvds-10-1280-800-v2.dtsi Executable file
View File

@@ -0,0 +1,197 @@
#include <dt-bindings/display/media-bus-format.h>
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_2X12_BE>;
width-mm = <217>;
height-mm = <136>;
/*
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <72000000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <138>;
hfront-porch = <136>;
vback-porch = <10>;
vfront-porch = <10>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "180";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
home_apk = "null";
status = "okay";
};
&pwm4 {
status = "okay";
};
&dsi0 {
status = "disabled";
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1280>;
gtp_resolution_y = <800>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group3 = [
5A 00 05 20 03 02 0D 00 01 0A 28
0A 50 32 03 05 00 00 00 00 00 00
08 00 00 00 00 8C 2E 0E 30 32 34
06 00 00 00 82 02 1D 00 01 00 00
00 00 00 00 00 00 00 24 60 94 C5
02 07 00 00 04 97 27 00 80 30 00
6D 3B 00 60 47 00 54 57 00 54 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 2A
29 28 26 24 22 21 20 1F 1E 1D 1C
18 16 14 13 12 10 0F 0C 0A 08 06
04 02 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 D4 01
];
goodix,cfg-group2 = [
5A 00 05 20 03 02 0D 00 01 0A 28
0A 50 32 03 05 00 00 00 00 00 00
08 00 00 00 00 8C 2E 0E 30 32 34
06 00 00 00 82 02 1D 00 01 00 00
00 00 00 00 00 00 00 24 60 94 C5
02 07 00 00 04 97 27 00 80 30 00
6D 3B 00 60 47 00 54 57 00 54 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 2A
29 28 26 24 22 21 20 1F 1E 1D 1C
18 16 14 13 12 10 0F 0C 0A 08 06
04 02 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 D4 01
];
};

170
rk356x/rp-lcd-lvds-10-1280-800.dtsi Executable file
View File

@@ -0,0 +1,170 @@
#include <dt-bindings/display/media-bus-format.h>
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_2X12_BE>;
width-mm = <217>;
height-mm = <136>;
/*
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <72000000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <138>;
hfront-porch = <136>;
vback-porch = <10>;
vfront-porch = <10>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&pwm4 {
status = "okay";
};
&dsi0 {
status = "disabled";
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1280>;
gtp_resolution_y = <800>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group2 = [
5A 00 05 20 03 02 0D 00 01 0A 28
0A 50 32 03 05 00 00 00 00 00 00
08 00 00 00 00 8C 2E 0E 30 32 34
06 00 00 00 82 02 1D 00 01 00 00
00 00 00 00 00 00 00 24 60 94 C5
02 07 00 00 04 97 27 00 80 30 00
6D 3B 00 60 47 00 54 57 00 54 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 2A
29 28 26 24 22 21 20 1F 1E 1D 1C
18 16 14 13 12 10 0F 0C 0A 08 06
04 02 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 D4 01
];
goodix,cfg-group3 = [
5A 00 05 20 03 02 0D 00 01 0A 28
0A 50 32 03 05 00 00 00 00 00 00
08 00 00 00 00 8C 2E 0E 30 32 34
06 00 00 00 82 02 1D 00 01 00 00
00 00 00 00 00 00 00 24 60 94 C5
02 07 00 00 04 97 27 00 80 30 00
6D 3B 00 60 47 00 54 57 00 54 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 2A
29 28 26 24 22 21 20 1F 1E 1D 1C
18 16 14 13 12 10 0F 0C 0A 08 06
04 02 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 D4 01
];
};

183
rk356x/rp-lcd-lvds-7-1024-600-v2.dtsi Executable file
View File

@@ -0,0 +1,183 @@
#include <dt-bindings/display/media-bus-format.h>
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
width-mm = <217>;
height-mm = <136>;
/*
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&rpdzkj {
compatible = "rp_config";
user_version = "rpdzkj";
system_rotate = "0";
csi_camera_rotate = "0"; //all csi camera rotation //0 90 180 270 //no effect
csi_camera_facing = "0"; //0:auto 1:all front 2:all back //no effect
usb_camera_rotate = "0"; //all usb camera rotation //0 90 180 270
usb_camera_facing = "0"; //0:auto 1:all front 2:all back
lcd_density = "180";
language = "zh-CN"; //zh-CN //en-US
time_zone = "Asia/Shanghai"; //Asia/Shanghai = +8 //Europe/London = +1 //Africa/Casablanca = +0;
not_navigation_bar = "false";
not_status_bar = "false";
default_launcher = "true";
has_root = "true";
usb_not_permission = "true";
gps_use = "false";
gps_serial_port = "/dev/ttyS4";
primary_device = "DSI";
extend_device = "HDMI-A";
extend_rotate = "0";
rotation_efull = "false";
home_apk = "null";
status = "okay";
};
&pwm4 {
status = "okay";
};
&dsi0 {
status = "disabled";
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
5A 00 04 58 02 05 3D 00 01
08 32 0F 5A 32 03 05 00 00
00 00 02 00 00 18 1A 1E 14
87 29 0A 55 57 B5 06 00 00
00 20 33 1C 14 01 00 0F 00
2B FF 7F 19 46 32 3C 78 94
D5 02 08 00 00 04 98 40 00
8A 4A 00 80 55 00 77 61 00
6F 70 00 6F 00 00 00 00 F0
40 30 FF FF 27 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 02 04 06 08 0A
0C 0E 10 12 14 FF FF FF FF
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 02
04 06 08 0A 0C 1D 1E 1F 20
21 22 24 26 28 29 2A FF FF
FF FF FF FF FF FF 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 6F 01
];
};

161
rk356x/rp-lcd-lvds-7-1024-600.dtsi Executable file
View File

@@ -0,0 +1,161 @@
/**
* rpdzkj lcd configuration
*/
#include <dt-bindings/display/media-bus-format.h>
#include "rp-lcd-hdmi.dtsi" //include for default support hdmi display
#define RP_SINGLE_LCD
&lvds_panel {
status = "okay";
compatible = "simple-panel";
enable-delay-ms = <20>;
prepare-delay-ms = <20>;
unprepare-delay-ms = <20>;
disable-delay-ms = <20>;
bus-format = <MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA>;
width-mm = <217>;
height-mm = <136>;
/*
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <45000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <160>;
vback-porch = <23>;
vfront-porch = <12>;
hsync-len = <20>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dual-lvds-even-pixels;
panel_in_lvds: endpoint {
remote-endpoint = <&lvds_out_panel>;
};
};
};
};
&lvds {
status = "okay";
ports {
port@1 {
reg = <1>;
lvds_out_panel: endpoint {
remote-endpoint = <&panel_in_lvds>;
};
};
};
};
&pwm4 {
status = "okay";
};
&dsi0 {
status = "disabled";
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "disabled";
};
&video_phy0 {
status = "okay";
};
&lvds_in_vp1 {
status = "okay";
};
&lvds_in_vp2 {
status = "disabled";
};
&route_lvds {
status = "okay";
connect = <&vp1_out_lvds>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
//goodix_rst_gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
//goodix_irq_gpio = <&gpio0 RK_PA5 IRQ_TYPE_EDGE_FALLING>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
5A 00 04 58 02 05 3D 00 01
08 32 0F 5A 32 03 05 00 00
00 00 02 00 00 18 1A 1E 14
87 29 0A 55 57 B5 06 00 00
00 20 33 1C 14 01 00 0F 00
2B FF 7F 19 46 32 3C 78 94
D5 02 08 00 00 04 98 40 00
8A 4A 00 80 55 00 77 61 00
6F 70 00 6F 00 00 00 00 F0
40 30 FF FF 27 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 02 04 06 08 0A
0C 0E 10 12 14 FF FF FF FF
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 02
04 06 08 0A 0C 1D 1E 1F 20
21 22 24 26 28 29 2A FF FF
FF FF FF FF FF FF 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 6F 01
];
};

162
rk356x/rp-lcd-mipi0-10-1200-1920.dtsi Executable file
View File

@@ -0,0 +1,162 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <1000>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
// reset-delay-ms = <60>;
// init-delay-ms = <60>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
// unprepare-delay-ms = <60>;
// disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
//MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <130000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <30>;
hfront-porch = <60>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <10>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1200>;
gtp_resolution_y = <1920>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
49 20 03 00 05 0A 35 00 01 06 23 08
37 2D 03 05 00 00 00 00 00 00 04 17
19 1D 14 90 30 AA 53 55 0C 08 00 00
00 01 03 1C 00 00 00 00 00 00 00 00
00 00 00 3C 78 94 D0 42 00 08 00 04
8E 40 00 85 4A 00 7F 55 00 7B 61 00
7A 70 00 7B 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04 01 00
FF FF FF FF FF FF FF FF FF FF 00 02
04 06 07 08 0A 0C 0D 0E 0F 10 11 12
13 14 2A 29 28 27 26 25 24 23 22 21
20 1F 1E 1C 1B 19 FF FF FF FF FF FF
FF FF FF FF 24 01
];
goodix,cfg-group2 = [
49 20 03 00 05 0A 35 00 01 06 23 08
37 2D 03 05 00 00 00 00 00 00 04 17
19 1D 14 90 30 AA 53 55 0C 08 00 00
00 01 03 1C 00 00 00 00 00 00 00 00
00 00 00 3C 78 94 D0 42 00 08 00 04
8E 40 00 85 4A 00 7F 55 00 7B 61 00
7A 70 00 7B 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04 01 00
FF FF FF FF FF FF FF FF FF FF 00 02
04 06 07 08 0A 0C 0D 0E 0F 10 11 12
13 14 2A 29 28 27 26 25 24 23 22 21
20 1F 1E 1C 1B 19 FF FF FF FF FF FF
FF FF FF FF 24 01
];
};

141
rk356x/rp-lcd-mipi0-10-1920-1200.dtsi Executable file
View File

@@ -0,0 +1,141 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <1200>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
// reset-delay-ms = <60>;
// init-delay-ms = <60>;
enable-delay-ms = <160>;
prepare-delay-ms = <200>;
// unprepare-delay-ms = <60>;
// disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <130000000>;
hactive = <1920>;
vactive = <1200>;
hback-porch = <60>; //60
hfront-porch = <16>; //16
vback-porch = <23>; //23
vfront-porch = <12>; //12
hsync-len = <20>; //20
vsync-len = <3>; //3
de-active = <1>;
hsync-active = <1>;
vsync-active = <1>;
pixelclk-active = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1920>;
gtp_resolution_y = <1200>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
55 80 07 B0 04 0A 3D 00 01 08 28
05 50 32 03 05 00 00 00 00 00 00
00 18 1A 1E 14 8E 2F 99 17 15 31
0D 00 00 02 9B 03 1D 00 00 00 00
00 00 00 00 00 00 00 1E 78 94 C5
02 08 00 00 00 5B 22 00 4C 2D 00
41 3C 00 38 4F 00 32 69 00 32 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09 0C
0D 0E 0F 10 11 14 15 16 17 FF FF
00 00 00 00 00 00 00 00 00 00 00
02 04 06 07 08 0A 0C 0D 0F 10 11
12 13 19 1B 1C 1E 1F 20 21 22 23
24 25 26 27 28 29 FF FF FF 00 00
00 00 00 00 00 00 00 00 6B 01];
};

432
rk356x/rp-lcd-mipi0-10-800-1280-v2.dtsi Executable file
View File

@@ -0,0 +1,432 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 FF 98 81 03
//=========_1===========//
39 00 02 01 00
39 00 02 02 00
39 00 02 03 53
39 00 02 04 13
39 00 02 05 00
39 00 02 06 04
39 00 02 07 00
39 00 02 08 00
39 00 02 09 22
39 00 02 0a 22
39 00 02 0b 00
39 00 02 0c 01
39 00 02 0d 00
39 00 02 0e 00
39 00 02 0f 23
39 00 02 10 23
39 00 02 11 00
39 00 02 12 00
39 00 02 13 00
39 00 02 14 00
39 00 02 15 00
39 00 02 16 00
39 00 02 17 00
39 00 02 18 00
39 00 02 19 00
39 00 02 1a 00
39 00 02 1b 00
39 00 02 1c 00
39 00 02 1d 00
39 00 02 1e 44
39 00 02 1f 80
39 00 02 20 02
39 00 02 21 03
39 00 02 22 00
39 00 02 23 00
39 00 02 24 00
39 00 02 25 00
39 00 02 26 00
39 00 02 27 00
39 00 02 28 33
39 00 02 29 03
39 00 02 2a 00
39 00 02 2b 00
39 00 02 2c 00
39 00 02 2d 00
39 00 02 2e 00
39 00 02 2f 00
39 00 02 30 00
39 00 02 31 00
39 00 02 32 00
39 00 02 33 00
39 00 02 34 04
39 00 02 35 00
39 00 02 36 00
39 00 02 37 00
39 00 02 38 3C
39 00 02 39 00
39 00 02 3a 40
39 00 02 3b 40
39 00 02 3c 00
39 00 02 3d 00
39 00 02 3e 00
39 00 02 3f 00
39 00 02 40 00
39 00 02 41 00
39 00 02 42 00
39 00 02 43 00
39 00 02 44 00
//=========_2===========//
39 00 02 50 01
39 00 02 51 23
39 00 02 52 45
39 00 02 53 67
39 00 02 54 89
39 00 02 55 ab
39 00 02 56 01
39 00 02 57 23
39 00 02 58 45
39 00 02 59 67
39 00 02 5a 89
39 00 02 5b ab
39 00 02 5c cd
39 00 02 5d ef
//=========_3===========//
39 00 02 5e 11
39 00 02 5f 01
39 00 02 60 00
39 00 02 61 15
39 00 02 62 14
39 00 02 63 0C
39 00 02 64 0D
39 00 02 65 0E
39 00 02 66 0F
39 00 02 67 06
39 00 02 68 02
39 00 02 69 02
39 00 02 6a 02
39 00 02 6b 02
39 00 02 6c 02
39 00 02 6d 02
39 00 02 6e 08
39 00 02 6f 02
39 00 02 70 02
39 00 02 71 02
39 00 02 72 02
39 00 02 73 02
39 00 02 74 02
39 00 02 75 01
39 00 02 76 00
39 00 02 77 15
39 00 02 78 14
39 00 02 79 0C
39 00 02 7a 0D
39 00 02 7b 0E
39 00 02 7c 0F
39 00 02 7D 08
39 00 02 7E 02
39 00 02 7F 02
39 00 02 80 02
39 00 02 81 02
39 00 02 82 02
39 00 02 83 02
39 00 02 84 06
39 00 02 85 02
39 00 02 86 02
39 00 02 87 02
39 00 02 88 02
39 00 02 89 02
39 00 02 8A 02
//CMD_Page
39 00 04 FF 98 81 04
39 00 02 6C 15
39 00 02 6E 3B
39 00 02 6F 73
39 00 02 3A 24
39 00 02 8D 14
39 00 02 87 BA
39 00 02 26 76
39 00 02 B2 D1
39 00 02 B5 27
39 00 02 31 75
39 00 02 30 03
39 00 02 3B 98
39 00 02 35 1f
39 00 02 33 14
39 00 02 7A 0F
39 00 02 38 02
39 00 02 39 00
//CMD_Page
39 00 04 FF 98 81 01
39 00 02 22 0A
39 00 02 31 0A
39 00 02 35 07
39 00 02 52 00
39 00 02 53 5A
39 00 02 54 00
39 00 02 55 59
39 00 02 50 83
39 00 02 51 80
39 00 02 60 20
39 00 02 61 01
39 00 02 62 07
39 00 02 63 00
//GammaP
39 00 02 A0 08
39 00 02 A1 0F
39 00 02 A2 15
39 00 02 A3 0E
39 00 02 A4 0D
39 00 02 A5 1B
39 00 02 A6 0F
39 00 02 A7 14
39 00 02 A8 33
39 00 02 A9 17
39 00 02 AA 23
39 00 02 AB 3F
39 00 02 AC 22
39 00 02 AD 24
39 00 02 AE 59
39 00 02 AF 2B
39 00 02 B0 2E
39 00 02 B1 4C
39 00 02 B2 5C
39 00 02 B3 33
//GammaN
39 00 02 C0 08
39 00 02 C1 0F
39 00 02 C2 15
39 00 02 C3 0E
39 00 02 C4 0D
39 00 02 C5 1B
39 00 02 C6 0F
39 00 02 C7 14
39 00 02 C8 33
39 00 02 C9 17
39 00 02 CA 23
39 00 02 CB 3F
39 00 02 CC 22
39 00 02 CD 24
39 00 02 CE 59
39 00 02 CF 2B
39 00 02 D0 2E
39 00 02 D1 4C
39 00 02 D2 5C
39 00 02 D3 33
//CMD_Page
39 00 04 FF 98 81 00
05 78 01 11 //sleep out
05 00 01 29 //display on
05 00 01 35 //TE on
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <76000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <60>;
hfront-porch = <60>;
vback-porch = <30>;
vfront-porch = <20>;
hsync-len = <30>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
#if 0
/* old touchscreen sensor_id0, reserve for some customer maybe using */
goodix,cfg-group0 = [
00 20 03 00 05 0A 05 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 00 00 00 00 90 30 AA
17 15 31 0D 00 00 01 B9 04 25
00 00 00 00 00 00 00 00 00 00
00 0F 23 94 C5 02 07 00 00 04
9F 10 00 8B 13 00 7C 16 00 6B
1B 00 60 20 00 60 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04
01 00 00 00 00 00 00 00 00 00
00 00 2A 29 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 00 02
04 06 07 08 0A 0C 0D 0E 0F 10
11 12 13 14 00 00 00 00 00 00
00 00 00 00 96 01
];
#endif
/** ic 9271_1020 sensor_id0, v3 add 20211104 */
goodix,cfg-group0 = [
70 20 03 00 05 0A 05 00 01 08
28 05 5A 46 03 05 00 00 00 00
00 00 00 17 19 1B 14 8E 2E 99
37 39 D3 07 00 00 00 80 02 2D
00 00 00 00 00 00 00 00 00 00
00 28 78 94 C5 02 07 00 00 04
9A 2C 00 80 37 00 6B 45 00 5C
56 00 50 6C 00 50 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 17 16 15 14 11 10 0F 0E
0D 0C 09 08 07 06 05 04 01 00
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0D 0F 10 11 12 28 27 26 25 24
23 22 21 20 1F 1E 1C 1B 19 13
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 AA 01
];
/* touchscreen sensor_id2 */
goodix,cfg-group2 = [
00 20 03 00 05 0A 35 00 00
05 28 08 55 41 03 05 00 00
00 00 00 00 00 1A 1C 1E 14
8E 2E 99 14 16 D3 07 00 00
00 9B 02 2D 00 00 00 00 00
00 00 00 00 00 00 0F 23 94
D5 02 07 00 00 04 9D 10 00
86 13 00 75 16 00 61 1B 00
53 20 00 53 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 17 16 15 14 11
10 0F 0E 0D 0C 09 08 07 06
05 04 01 00 FF FF 00 00 00
00 00 00 00 00 00 00 00 02
04 06 07 08 0A 0C 0D 0F 10
11 12 13 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 FF
FF FF FF 00 00 00 00 00 00
00 00 00 00 4D 01
];
};

155
rk356x/rp-lcd-mipi0-10-800-1280-v3.dtsi Executable file
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#define RP_SINGLE_LCD
#include "rp-lcd-hdmi.dtsi"
&dsi0 {
status = "okay";
//rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
05 78 01 11 //sleep out
05 20 01 29 //display on
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <82000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <100>;
hfront-porch = <100>;
vback-porch = <30>;
vfront-porch = <20>;
hsync-len = <30>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group2 = [
49 20 03 00 05 0A 35 00 01 06 23 08
37 2D 03 05 00 00 00 00 00 00 04 17
19 1D 14 90 30 AA 53 55 0C 08 00 00
00 01 03 1C 00 00 00 00 00 00 00 00
00 00 00 3C 78 94 D0 42 00 08 00 04
8E 40 00 85 4A 00 7F 55 00 7B 61 00
7A 70 00 7B 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04 01 00
FF FF FF FF FF FF FF FF FF FF 00 02
04 06 07 08 0A 0C 0D 0E 0F 10 11 12
13 14 2A 29 28 27 26 25 24 23 22 21
20 1F 1E 1C 1B 19 FF FF FF FF FF FF
FF FF FF FF 24 01
];
};

405
rk356x/rp-lcd-mipi0-10-800-1280.dtsi Executable file
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@@ -0,0 +1,405 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
15 00 02 E0 00
15 00 02 E1 93
15 00 02 E2 65
15 00 02 E3 F8
15 00 02 E0 04
15 00 02 2D 03
15 00 02 E0 00
15 00 02 80 03
15 00 02 70 02
15 00 02 71 23
15 00 02 72 06
15 00 02 E0 01
15 00 02 00 00
15 00 02 01 66
15 00 02 03 00
15 00 02 04 6D
15 00 02 17 00
15 00 02 18 BF
15 00 02 19 00
15 00 02 1A 00
15 00 02 1B BF
15 00 02 1C 00
15 00 02 1F 3E
15 00 02 20 28
15 00 02 21 28
15 00 02 22 0E
15 00 02 37 09
15 00 02 38 04
15 00 02 39 08
15 00 02 3A 12
15 00 02 3C 78
15 00 02 3D FF
15 00 02 3E FF
15 00 02 3F 7F
15 00 02 40 06
15 00 02 41 A0
15 00 02 55 0F
15 00 02 56 01
15 00 02 57 69
15 00 02 58 0A
15 00 02 59 0A
15 00 02 5A 29
15 00 02 5B 15
15 00 02 5D 7C
15 00 02 5E 65
15 00 02 5F 55
15 00 02 60 49
15 00 02 61 44
15 00 02 62 35
15 00 02 63 3A
15 00 02 64 23
15 00 02 65 3D
15 00 02 66 3C
15 00 02 67 3D
15 00 02 68 5D
15 00 02 69 4D
15 00 02 6A 56
15 00 02 6B 48
15 00 02 6C 45
15 00 02 6D 38
15 00 02 6E 25
15 00 02 6F 00
15 00 02 70 7C
15 00 02 71 65
15 00 02 72 55
15 00 02 73 49
15 00 02 74 44
15 00 02 75 35
15 00 02 76 3A
15 00 02 77 23
15 00 02 78 3D
15 00 02 79 3C
15 00 02 7A 3D
15 00 02 7B 5D
15 00 02 7C 4D
15 00 02 7D 56
15 00 02 7E 48
15 00 02 7F 45
15 00 02 80 38
15 00 02 81 25
15 00 02 82 00
15 00 02 E0 02
15 00 02 00 1E
15 00 02 01 1E
15 00 02 02 41
15 00 02 03 41
15 00 02 04 43
15 00 02 05 43
15 00 02 06 1F
15 00 02 07 1F
15 00 02 08 1F
15 00 02 09 1F
15 00 02 0A 1E
15 00 02 0B 1E
15 00 02 0C 1F
15 00 02 0D 47
15 00 02 0E 47
15 00 02 0F 45
15 00 02 10 45
15 00 02 11 4B
15 00 02 12 4B
15 00 02 13 49
15 00 02 14 49
15 00 02 15 1F
15 00 02 16 1E
15 00 02 17 1E
15 00 02 18 40
15 00 02 19 40
15 00 02 1A 42
15 00 02 1B 42
15 00 02 1C 1F
15 00 02 1D 1F
15 00 02 1E 1F
15 00 02 1F 1f
15 00 02 20 1E
15 00 02 21 1E
15 00 02 22 1f
15 00 02 23 46
15 00 02 24 46
15 00 02 25 44
15 00 02 26 44
15 00 02 27 4A
15 00 02 28 4A
15 00 02 29 48
15 00 02 2A 48
15 00 02 2B 1f
15 00 02 2C 1F
15 00 02 2D 1F
15 00 02 2E 42
15 00 02 2F 42
15 00 02 30 40
15 00 02 31 40
15 00 02 32 1E
15 00 02 33 1E
15 00 02 34 1F
15 00 02 35 1F
15 00 02 36 1E
15 00 02 37 1E
15 00 02 38 1F
15 00 02 39 48
15 00 02 3A 48
15 00 02 3B 4A
15 00 02 3C 4A
15 00 02 3D 44
15 00 02 3E 44
15 00 02 3F 46
15 00 02 40 46
15 00 02 41 1F
15 00 02 42 1F
15 00 02 43 1F
15 00 02 44 43
15 00 02 45 43
15 00 02 46 41
15 00 02 47 41
15 00 02 48 1E
15 00 02 49 1E
15 00 02 4A 1E
15 00 02 4B 1F
15 00 02 4C 1E
15 00 02 4D 1E
15 00 02 4E 1F
15 00 02 4F 49
15 00 02 50 49
15 00 02 51 4B
15 00 02 52 4B
15 00 02 53 45
15 00 02 54 45
15 00 02 55 47
15 00 02 56 47
15 00 02 57 1F
15 00 02 58 10
15 00 02 59 00
15 00 02 5A 00
15 00 02 5B 30
15 00 02 5C 02
15 00 02 5D 40
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 30
15 00 02 61 01
15 00 02 62 02
15 00 02 63 6A
15 00 02 64 6A
15 00 02 65 05
15 00 02 66 12
15 00 02 67 74
15 00 02 68 04
15 00 02 69 6A
15 00 02 6A 6A
15 00 02 6B 08
15 00 02 6C 00
15 00 02 6D 06
15 00 02 6E 00
15 00 02 6F 88
15 00 02 70 00
15 00 02 71 00
15 00 02 72 06
15 00 02 73 7B
15 00 02 74 00
15 00 02 75 07
15 00 02 76 00
15 00 02 77 5D
15 00 02 78 17
15 00 02 79 1F
15 00 02 7A 00
15 00 02 7B 00
15 00 02 7C 00
15 00 02 7D 03
15 00 02 7E 7B
15 00 02 E0 04
15 00 02 2B 2B
15 00 02 2E 44
15 00 02 E0 01
15 00 02 0E 01
15 00 02 E0 03
15 00 02 98 2F
15 00 02 E0 00
15 00 02 E6 02
15 00 02 E7 02
05 78 01 11
05 05 01 29
15 0a 02 35 00
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <68000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <18>;
hfront-porch = <18>;
vback-porch = <8>;
vfront-porch = <24>;
hsync-len = <18>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
/* old touchscreen sensor_id0 */
goodix,cfg-group0 = [
00 20 03 00 05 0A 05 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 00 00 00 00 90 30 AA
17 15 31 0D 00 00 01 B9 04 25
00 00 00 00 00 00 00 00 00 00
00 0F 23 94 C5 02 07 00 00 04
9F 10 00 8B 13 00 7C 16 00 6B
1B 00 60 20 00 60 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04
01 00 00 00 00 00 00 00 00 00
00 00 2A 29 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 00 02
04 06 07 08 0A 0C 0D 0E 0F 10
11 12 13 14 00 00 00 00 00 00
00 00 00 00 96 01
];
/* new touchscreen sensor_id2 */
goodix,cfg-group2 = [
00 20 03 00 05 0A 35 00 00
05 28 08 55 41 03 05 00 00
00 00 00 00 00 1A 1C 1E 14
8E 2E 99 14 16 D3 07 00 00
00 9B 02 2D 00 00 00 00 00
00 00 00 00 00 00 0F 23 94
D5 02 07 00 00 04 9D 10 00
86 13 00 75 16 00 61 1B 00
53 20 00 53 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 17 16 15 14 11
10 0F 0E 0D 0C 09 08 07 06
05 04 01 00 FF FF 00 00 00
00 00 00 00 00 00 00 00 02
04 06 07 08 0A 0C 0D 0F 10
11 12 13 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 FF
FF FF FF 00 00 00 00 00 00
00 00 00 00 4D 01
];
};

197
rk356x/rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi Executable file
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@@ -0,0 +1,197 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
// rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
//MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 B9 F1 12 83
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37
39 00 02 B8 26
39 00 04 BF 02 10 00
39 00 0B B3 07 0B 1E 1E 03 FF 00 00 00 00
39 00 0A C0 73 73 50 50 00 00 08 70 00
39 00 02 BC 46
39 00 02 CC 0B
39 00 02 B4 80
39 00 04 B2 C8 12 A0
39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 80 C0 10
39 00 0D C1 53 00 32 32 77 F1 FF FF CC CC 77 77
39 00 03 B5 09 09
39 00 03 B6 B7 B7
39 00 40 E9 C2 10 0A 00 00 81 80 12 30 00 37 86 81 80 37 18 00 05 00 00 00 00 00 05 00 00 00 00 F8 BA 46 02 08 28 88 88 88 88 88 F8 BA 57 13 18 38 88 88 88 88 88 00 00 00 03 00 00 00 00 00 00 00 00 00
39 00 3E EA 07 12 01 01 02 3C 00 00 00 00 00 00 8F BA 31 75 38 18 88 88 88 88 88 8F BA 20 64 28 08 88 88 88 88 88 23 10 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 23 E0 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19
05 ff 01 11 ////Sleep Out
05 32 01 29 ///Display On
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <60000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <45>;
hfront-porch = <45>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <10>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <720>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
4D D0 02 00 05 05 35 00 01 08 32
08 5A 3C 03 05 00 00 00 00 00 00
00 18 1A 1E 14 89 29 0A 55 57 B5
06 00 00 00 41 22 10 00 01 00 0F
00 2A 00 00 19 50 32 3C 78 94 D5
02 08 00 00 04 A2 40 00 8F 4A 00
80 55 00 73 61 00 67 70 00 67 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 02 04 06 08 0A 0C 0E 10 12
14 FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF 22
21 20 1F 1E 1D 1C 18 16 00 02 04
06 08 0A 0F 10 12 FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF 8D 01
];
};

188
rk356x/rp-lcd-mipi0-5-720-1280-v2.dtsi Executable file
View File

@@ -0,0 +1,188 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
// rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 B9 F1 12 83
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37
39 00 02 B8 26
39 00 04 BF 02 10 00
39 00 0B B3 07 0B 1E 1E 03 FF 00 00 00 00
39 00 0A C0 73 73 50 50 00 00 08 70 00
39 00 02 BC 46
39 00 02 CC 0B
39 00 02 B4 80
39 00 04 B2 C8 12 A0
39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 80 C0 10
39 00 0D C1 53 00 32 32 77 F1 FF FF CC CC 77 77
39 00 03 B5 09 09
39 00 03 B6 B7 B7
39 00 40 E9 C2 10 0A 00 00 81 80 12 30 00 37 86 81 80 37 18 00 05 00 00 00 00 00 05 00 00 00 00 F8 BA 46 02 08 28 88 88 88 88 88 F8 BA 57 13 18 38 88 88 88 88 88 00 00 00 03 00 00 00 00 00 00 00 00 00
39 00 3E EA 07 12 01 01 02 3C 00 00 00 00 00 00 8F BA 31 75 38 18 88 88 88 88 88 8F BA 20 64 28 08 88 88 88 88 88 23 10 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
39 00 23 E0 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19
05 ff 01 11 ////Sleep Out
05 32 01 29 ///Display On
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <60000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <11>;
vfront-porch = <16>;
hsync-len = <10>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <720>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 D0 02 00 05 05 35 01 01 08 1E 0F 5A 3C
03 05 00 00 00 00 11 11 00 19 1B 1E 14 89
29 0A 41 43 D3 07 00 00 00 9A 02 11 00 01
05 00 00 00 00 09 11 00 00 36 4A 94 45 00
00 00 00 00 94 37 00 8B 3B 00 83 3F 00 7C
43 00 76 47 00 76 10 30 48 00 F0 4A 3A FF
FF 27 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
08 0A 0C 0E 10 12 14 16 18 1A 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 0E 0C 0A 08 06 05 04 02 00 1D 1E 1F
20 22 24 28 29 2A 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 84 01];
};

420
rk356x/rp-lcd-mipi0-5-720-1280.dtsi Executable file
View File

@@ -0,0 +1,420 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
// rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <2>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 02 FE 01
39 00 02 24 00
39 00 02 25 53
39 00 02 26 00
39 00 02 27 0A
39 00 02 29 0A
39 00 02 2B E5
39 00 02 16 52
39 00 02 2F 54
39 00 02 34 59
39 00 02 1B 50
39 00 02 12 02
// 39 00 02 1B 20
// 39 00 02 12 08
39 00 02 1A 06
39 00 02 46 5F
39 00 02 52 70
39 00 02 53 00
39 00 02 54 70
39 00 02 55 00
39 00 02 5F 11
39 00 02 FE 03
39 00 02 00 05
39 00 02 01 16
39 00 02 02 0B
39 00 02 03 0F
39 00 02 04 7D
39 00 02 05 00
39 00 02 06 50
39 00 02 07 05
39 00 02 08 16
39 00 02 09 0D
39 00 02 0A 11
39 00 02 0B 7D
39 00 02 0C 00
39 00 02 0D 50
39 00 02 0E 07
39 00 02 0F 08
39 00 02 10 01
39 00 02 11 02
39 00 02 12 00
39 00 02 13 7D
39 00 02 14 00
39 00 02 15 85
39 00 02 16 08
39 00 02 17 03
39 00 02 18 04
39 00 02 19 05
39 00 02 1A 06
39 00 02 1B 00
39 00 02 1C 7D
39 00 02 1D 00
39 00 02 1E 85
39 00 02 1F 08
39 00 02 20 00
39 00 02 21 00
39 00 02 22 00
39 00 02 23 00
39 00 02 24 00
39 00 02 25 00
39 00 02 26 00
39 00 02 27 00
39 00 02 28 00
39 00 02 29 00
39 00 02 2A 07
39 00 02 2B 08
39 00 02 2D 01
39 00 02 2F 02
39 00 02 30 00
39 00 02 31 40
39 00 02 32 05
39 00 02 33 08
39 00 02 34 54
39 00 02 35 7D
39 00 02 36 00
39 00 02 37 03
39 00 02 38 04
39 00 02 39 05
39 00 02 3A 06
39 00 02 3B 00
39 00 02 3D 40
39 00 02 3F 05
39 00 02 40 08
39 00 02 41 54
39 00 02 42 7D
39 00 02 43 00
39 00 02 44 00
39 00 02 45 00
39 00 02 46 00
39 00 02 47 00
39 00 02 48 00
39 00 02 49 00
39 00 02 4A 00
39 00 02 4B 00
39 00 02 4C 00
39 00 02 4D 00
39 00 02 4E 00
39 00 02 4F 00
39 00 02 50 00
39 00 02 51 00
39 00 02 52 00
39 00 02 53 00
39 00 02 54 00
39 00 02 55 00
39 00 02 56 00
39 00 02 58 00
39 00 02 59 00
39 00 02 5A 00
39 00 02 5B 00
39 00 02 5C 00
39 00 02 5D 00
39 00 02 5E 00
39 00 02 5F 00
39 00 02 60 00
39 00 02 61 00
39 00 02 62 00
39 00 02 63 00
39 00 02 64 00
39 00 02 65 00
39 00 02 66 00
39 00 02 67 00
39 00 02 68 00
39 00 02 69 00
39 00 02 6A 00
39 00 02 6B 00
39 00 02 6C 00
39 00 02 6D 00
39 00 02 6E 00
39 00 02 6F 00
39 00 02 70 00
39 00 02 71 00
39 00 02 72 20
39 00 02 73 00
39 00 02 74 08
39 00 02 75 08
39 00 02 76 08
39 00 02 77 08
39 00 02 78 08
39 00 02 79 08
39 00 02 7A 00
39 00 02 7B 00
39 00 02 7C 00
39 00 02 7D 00
39 00 02 7E BF
39 00 02 7F 3F
39 00 02 80 3F
39 00 02 81 3F
39 00 02 82 3F
39 00 02 83 3F
39 00 02 84 3F
39 00 02 85 02
39 00 02 86 06
39 00 02 87 3F
39 00 02 88 14
39 00 02 89 10
39 00 02 8A 16
39 00 02 8B 12
39 00 02 8C 08
39 00 02 8D 0C
39 00 02 8E 0A
39 00 02 8F 0E
39 00 02 90 00
39 00 02 91 04
39 00 02 92 3F
39 00 02 93 3F
39 00 02 94 3F
39 00 02 95 3F
39 00 02 96 05
39 00 02 97 01
39 00 02 98 0F
39 00 02 99 0B
39 00 02 9A 0D
39 00 02 9B 09
39 00 02 9C 13
39 00 02 9D 17
39 00 02 9E 11
39 00 02 9F 15
39 00 02 A0 3F
39 00 02 A2 07
39 00 02 A3 03
39 00 02 A4 3F
39 00 02 A5 3F
39 00 02 A6 3F
39 00 02 A7 3F
39 00 02 A9 3F
39 00 02 AA 3F
39 00 02 AB 3F
39 00 02 AC 3F
39 00 02 AD 3F
39 00 02 AE 3F
39 00 02 AF 3F
39 00 02 B0 3F
39 00 02 B1 3F
39 00 02 B2 3F
39 00 02 B3 05
39 00 02 B4 01
39 00 02 B5 3F
39 00 02 B6 17
39 00 02 B7 13
39 00 02 B8 15
39 00 02 B9 11
39 00 02 BA 0F
39 00 02 BB 0B
39 00 02 BC 0D
39 00 02 BD 09
39 00 02 BE 07
39 00 02 BF 03
39 00 02 C0 3F
39 00 02 C1 3F
39 00 02 C2 3F
39 00 02 C3 3F
39 00 02 C4 02
39 00 02 C5 06
39 00 02 C6 08
39 00 02 C7 0C
39 00 02 C8 0A
39 00 02 C9 0E
39 00 02 CA 10
39 00 02 CB 14
39 00 02 CC 12
39 00 02 CD 16
39 00 02 CE 3F
39 00 02 CF 00
39 00 02 D0 04
39 00 02 D1 3F
39 00 02 D2 3F
39 00 02 D3 3F
39 00 02 D4 3F
39 00 02 D5 3F
39 00 02 D6 3F
39 00 02 D7 3F
39 00 02 DC 02
39 00 02 DE 12
39 00 02 FE 0E
39 00 02 01 75
39 00 02 FE 04
39 00 02 60 00
39 00 02 61 08
39 00 02 62 0E
39 00 02 63 0D
39 00 02 64 05
39 00 02 65 10
39 00 02 66 0E
39 00 02 67 0A
39 00 02 68 16
39 00 02 69 0C
39 00 02 6A 10
39 00 02 6B 07
39 00 02 6C 0E
39 00 02 6D 13
39 00 02 6E 0C
39 00 02 6F 00
39 00 02 70 00
39 00 02 71 08
39 00 02 72 0E
39 00 02 73 0D
39 00 02 74 05
39 00 02 75 10
39 00 02 76 0E
39 00 02 77 0A
39 00 02 78 16
39 00 02 79 0C
39 00 02 7A 10
39 00 02 7B 07
39 00 02 7C 0E
39 00 02 7D 13
39 00 02 7E 0C
39 78 02 7F 00
39 00 02 FE 00
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <60000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <30>;
hfront-porch = <64>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <720>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 D0 02 00 05 05 35 01 01 08 1E 0F 5A 3C
03 05 00 00 00 00 11 11 00 19 1B 1E 14 89
29 0A 41 43 D3 07 00 00 00 9A 02 11 00 01
05 00 00 00 00 09 11 00 00 36 4A 94 45 00
00 00 00 00 94 37 00 8B 3B 00 83 3F 00 7C
43 00 76 47 00 76 10 30 48 00 F0 4A 3A FF
FF 27 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
08 0A 0C 0E 10 12 14 16 18 1A 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 0E 0C 0A 08 06 05 04 02 00 1D 1E 1F
20 22 24 28 29 2A 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 84 01];
};

162
rk356x/rp-lcd-mipi0-5.5-1080-1920.dtsi Executable file
View File

@@ -0,0 +1,162 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
// rockchip,lane-rate = <480>;
dsi0_panel:panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
15 00 02 FE 00
15 00 02 C2 08
15 00 02 35 00
15 00 02 53 20
15 00 02 51 FF
05 78 01 01 //add for reboot init fail
05 78 01 29
05 78 01 11
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0:timing0 {
clock-frequency = <138000000>;
hactive = <1080>;
vactive = <1920>;
hback-porch = <30>;
hfront-porch = <36>;
vback-porch = <6>;
vfront-porch = <6>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi:endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel:endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1080>;
gtp_resolution_y = <1920>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
47 38 04 80 07 0A 05 00
01 08 28 05 50 32 03 05
00 00 00 00 00 00 00 00
00 00 00 8B 2B 0D 17 15
31 0D 00 00 00 9A 03 2D
00 00 00 00 00 03 64 32
00 00 00 0F 2C 94 C5 02
07 00 00 04 9E 10 00 82
14 00 6B 19 00 57 20 00
4A 27 00 4A 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 FF 00 00
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 02
04 06 08 0A 0C 0F 10 12
13 26 24 22 21 20 1F 1E
1D 1C 18 16 FF FF FF FF
00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00
8C 01
];
};

145
rk356x/rp-lcd-mipi0-5.5-720-1280-v2.dtsi Executable file
View File

@@ -0,0 +1,145 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 B9 F1 12 83
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37
39 00 05 B8 26 22 20 03
39 00 04 BF 02 11 00
39 00 0B B3 0C 10 0A 50 03 FF 00 00 00 00
39 00 0A C0 73 73 50 50 00 00 08 70 00
39 00 02 BC 46
39 00 02 CC 0B
39 00 02 B4 80
39 00 04 B2 C8 12 30
39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 00 C0 10
39 00 0D C1 53 00 1E 1E 77 C1 FF FF AF AF 7F 7F
39 00 03 B5 07 07
39 00 03 B6 70 70
39 00 07 C6 00 00 FF FF 01 FF
39 00 40 E9 C2 10 05 04 FE 02 81 12 31 45 3F 83 12 91 3B 2A 08 05 00 00 00 00 08 05 00 00 00 00 FF 02 46 02 48 68 88 88 88 80 88 FF 13 57 13 58 78 88 88 88 81 88 00 00 00 00 00 12 B1 3B 00 00 00 00 00
39 00 3E EA 00 1A 00 00 00 00 00 00 00 00 00 00 FF 31 75 31 18 78 88 88 88 85 88 FF 20 64 20 08 68 88 88 88 84 88 20 10 00 00 54 00 00 00 00 00 00 00 C0 00 00 0C 00 00 00 00 30 02 A1 00 00 00 00
39 00 23 E0 00 05 07 1A 39 3F 33 2C 06 0B 0D 11 13 12 14 10 1A 00 05 07 1A 39 3F 33 2C 06 0B 0D 11 13 12 14 10 1A
05 ff 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <60000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <42>;
hfront-porch = <44>;
vback-porch = <10>;
vfront-porch = <14>;
hsync-len = <2>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt1x {
status = "okay";
compatible = "goodix,gt1x";
reg = <0x5d>;
/**
* goodix,rst-gpio = <>;
* goodix,irq-gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
};

393
rk356x/rp-lcd-mipi0-5.5-720-1280.dtsi Executable file
View File

@@ -0,0 +1,393 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 02 FE 01
39 00 02 24 C0
39 00 02 25 53
39 00 02 26 00
39 00 02 2B E5
39 00 02 27 0A
39 00 02 29 0A
39 00 02 16 52
39 00 02 2F 53
39 00 02 34 5A
39 00 02 1B 00
39 00 02 12 0A
39 00 02 1A 06
39 00 02 46 4F
39 00 02 52 A0
39 00 02 53 00
39 00 02 54 A0
39 00 02 55 00
39 00 02 FE 03
39 00 02 00 05
39 00 02 01 16
39 00 02 02 0B
39 00 02 03 0F
39 00 02 04 7D
39 00 02 05 00
39 00 02 06 50
39 00 02 07 05
39 00 02 08 16
39 00 02 09 0D
39 00 02 0A 11
39 00 02 0B 7D
39 00 02 0C 00
39 00 02 0D 50
39 00 02 0E 07
39 00 02 0F 08
39 00 02 10 01
39 00 02 11 02
39 00 02 12 00
39 00 02 13 7D
39 00 02 14 00
39 00 02 15 85
39 00 02 16 08
39 00 02 17 03
39 00 02 18 04
39 00 02 19 05
39 00 02 1A 06
39 00 02 1B 00
39 00 02 1C 7D
39 00 02 1D 00
39 00 02 1E 85
39 00 02 1F 08
39 00 02 20 00
39 00 02 21 00
39 00 02 22 00
39 00 02 23 00
39 00 02 24 00
39 00 02 25 00
39 00 02 26 00
39 00 02 27 00
39 00 02 28 00
39 00 02 29 00
39 00 02 2A 07
39 00 02 2B 08
39 00 02 2D 01
39 00 02 2F 02
39 00 02 30 00
39 00 02 31 40
39 00 02 32 05
39 00 02 33 08
39 00 02 34 54
39 00 02 35 7D
39 00 02 36 00
39 00 02 37 03
39 00 02 38 04
39 00 02 39 05
39 00 02 3A 06
39 00 02 3B 00
39 00 02 3D 40
39 00 02 3F 05
39 00 02 40 08
39 00 02 41 54
39 00 02 42 7D
39 00 02 43 00
39 00 02 44 00
39 00 02 45 00
39 00 02 46 00
39 00 02 47 00
39 00 02 48 00
39 00 02 49 00
39 00 02 4A 00
39 00 02 4B 00
39 00 02 4C 00
39 00 02 4D 00
39 00 02 4E 00
39 00 02 4F 00
39 00 02 50 00
39 00 02 51 00
39 00 02 52 00
39 00 02 53 00
39 00 02 54 00
39 00 02 55 00
39 00 02 56 00
39 00 02 58 00
39 00 02 59 00
39 00 02 5A 00
39 00 02 5B 00
39 00 02 5C 00
39 00 02 5D 00
39 00 02 5E 00
39 00 02 5F 00
39 00 02 60 00
39 00 02 61 00
39 00 02 62 00
39 00 02 63 00
39 00 02 64 00
39 00 02 65 00
39 00 02 66 00
39 00 02 67 00
39 00 02 68 00
39 00 02 69 00
39 00 02 6A 00
39 00 02 6B 00
39 00 02 6C 00
39 00 02 6D 00
39 00 02 6E 00
39 00 02 6F 00
39 00 02 70 00
39 00 02 71 00
39 00 02 72 20
39 00 02 73 00
39 00 02 74 08
39 00 02 75 08
39 00 02 76 08
39 00 02 77 08
39 00 02 78 08
39 00 02 79 08
39 00 02 7A 00
39 00 02 7B 00
39 00 02 7C 00
39 00 02 7D 00
39 00 02 7E BF
39 00 02 7F 02
39 00 02 80 06
39 00 02 81 14
39 00 02 82 10
39 00 02 83 16
39 00 02 84 12
39 00 02 85 08
39 00 02 86 3F
39 00 02 87 3F
39 00 02 88 3F
39 00 02 89 3F
39 00 02 8A 3F
39 00 02 8B 0C
39 00 02 8C 0A
39 00 02 8D 0E
39 00 02 8E 3F
39 00 02 8F 3F
39 00 02 90 00
39 00 02 91 04
39 00 02 92 3F
39 00 02 93 3F
39 00 02 94 3F
39 00 02 95 3F
39 00 02 96 05
39 00 02 97 01
39 00 02 98 3F
39 00 02 99 3F
39 00 02 9A 0F
39 00 02 9B 0B
39 00 02 9C 0D
39 00 02 9D 3F
39 00 02 9E 3F
39 00 02 9F 3F
39 00 02 A0 3F
39 00 02 A2 3F
39 00 02 A3 09
39 00 02 A4 13
39 00 02 A5 17
39 00 02 A6 11
39 00 02 A7 15
39 00 02 A9 07
39 00 02 AA 03
39 00 02 AB 3F
39 00 02 AC 3F
39 00 02 AD 05
39 00 02 AE 01
39 00 02 AF 17
39 00 02 B0 13
39 00 02 B1 15
39 00 02 B2 11
39 00 02 B3 0F
39 00 02 B4 3F
39 00 02 B5 3F
39 00 02 B6 3F
39 00 02 B7 3F
39 00 02 B8 3F
39 00 02 B9 0B
39 00 02 BA 0D
39 00 02 BB 09
39 00 02 BC 3F
39 00 02 BD 3F
39 00 02 BE 07
39 00 02 BF 03
39 00 02 C0 3F
39 00 02 C1 3F
39 00 02 C2 3F
39 00 02 C3 3F
39 00 02 C4 02
39 00 02 C5 06
39 00 02 C6 3F
39 00 02 C7 3F
39 00 02 C8 08
39 00 02 C9 0C
39 00 02 CA 0A
39 00 02 CB 3F
39 00 02 CC 3F
39 00 02 CD 3F
39 00 02 CE 3F
39 00 02 CF 3F
39 00 02 D0 0E
39 00 02 D1 10
39 00 02 D2 14
39 00 02 D3 12
39 00 02 D4 16
39 00 02 D5 00
39 00 02 D6 04
39 00 02 D7 3F
39 00 02 DC 02
39 00 02 DE 12
39 00 02 FE 0E
39 00 02 01 75
39 00 02 54 01
39 00 02 FE 04
39 00 02 60 00
39 00 02 61 0C
39 00 02 62 12
39 00 02 63 0E
39 00 02 64 06
39 00 02 65 12
39 00 02 66 0E
39 00 02 67 0B
39 00 02 68 15
39 00 02 69 0B
39 00 02 6A 10
39 00 02 6B 07
39 00 02 6C 0F
39 00 02 6D 12
39 00 02 6E 0C
39 00 02 6F 00
39 00 02 70 00
39 00 02 71 0C
39 00 02 72 12
39 00 02 73 0E
39 00 02 74 06
39 00 02 75 12
39 00 02 76 0E
39 00 02 77 0B
39 00 02 78 15
39 00 02 79 0B
39 00 02 7A 10
39 00 02 7B 07
39 00 02 7C 0F
39 00 02 7D 12
39 00 02 7E 0C
39 00 02 7F 00
39 00 02 FE 00
39 00 02 58 AD
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <64000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <32>;
hfront-porch = <32>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt1x {
status = "okay";
compatible = "goodix,gt1x";
reg = <0x5d>;
/**
* goodix,rst-gpio = <>;
* goodix,irq-gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
};

176
rk356x/rp-lcd-mipi0-7-1024-600.dtsi Executable file
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@@ -0,0 +1,176 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <51000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <160>;
hfront-porch = <136>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [ //old touch
41 00 04 58 02 05 7D 00 01 2F 28
0F 50 32 03 05 00 00 00 00 00 00
00 18 1A 1E 14 89 0D 0C 2C 2A 0C
08 00 00 00 82 03 1D 0A 32 05 0A
32 00 00 00 00 00 0B 1E 50 94 E5
02 08 00 00 04 A7 21 00 8B 28 00
73 31 00 62 3B 00 52 48 00 52 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 32 50 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 2A
29 28 26 24 22 21 20 1F 1E 1D 18
16 14 13 12 10 0F 0C 0A 08 06 FF
FF FF FF 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 3B 01
];
goodix,cfg-group5 = [ //new touch
FF 00 04 58 02 05 0D 04 01
0A 28 0A 50 32 03 05 00 00
00 00 00 00 08 00 00 00 00
8B 2B 0E 30 32 0F 0A 00 00
00 83 02 1D 00 00 00 00 00
03 03 32 00 00 00 24 60 94
C0 02 00 00 00 04 93 27 00
80 30 00 70 3B 00 65 47 00
5C 57 00 5C 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 1C 1A 18 16 14
12 10 0E 0C 0A 08 06 04 02
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 26 24
22 21 20 1F 1E 1D 1C 18 16
13 12 10 0F 0C 0A 08 06 04
02 00 FF FF FF FF 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 6A 01
];
};

232
rk356x/rp-lcd-mipi0-7-1200-1920.dtsi Executable file
View File

@@ -0,0 +1,232 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <900>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 03 b7 50 00
39 00 03 b8 00 00
39 10 03 b9 00 00
39 10 03 ba 14 42
39 10 03 bb 03 00
39 60 03 b9 01 00
39 10 03 de 03 00
39 60 03 c9 02 23
39 00 02 b0 00
39 00 06 14 08 b0 00 22 00
39 30 02 b4 0c
39 40 03 b6 3a d3
39 50 02 51 e6
39 30 02 53 2c
05 78 01 29
05 78 01 11
39 00 03 b7 50 00
39 00 03 b8 00 00
39 10 03 b9 00 00
39 10 03 ba 8c 83
39 10 03 bb 03 00
39 60 03 b9 01 00
39 10 03 c9 02 23
39 60 03 ca 01 23
39 10 03 cb 10 05
39 10 03 cc 05 10
39 10 03 d0 00 00
39 10 03 b6 03 00
39 10 03 de 03 00
39 10 03 d6 05 00
39 60 03 b7 4b 02
05 00 01 2c
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <140000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <30>;
hfront-porch = <60>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <4>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1200>;
gtp_resolution_y = <1920>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [ //sensor id 0 for new tp
44 B0 04 80 07 05 45 00 02 08 28
08 46 32 03 05 00 00 00 00 00 00
00 00 00 00 00 8C 2C 0E B0 B2 B2
04 00 00 00 20 03 1C 00 01 00 00
00 00 00 32 00 00 00 96 D2 94 D5
02 00 00 00 04 8D 9B 00 85 A6 00
7F B1 00 79 BD 00 73 CB 00 73 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 02 04 06 08 0A 0C 0E 10 12
14 16 18 1A 1C FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF 00
02 04 06 08 0A 0C 0F 10 12 13 14
28 26 24 22 21 20 1F 1E 1D 1C 18
16 FF FF FF FF FF 00 00 00 00 00
00 00 00 00 00 00 00 00 34 01
];
goodix,cfg-group2 = [ //sensor id 2 for new tp
44 B0 04 80 07 05 45 00 02 08 28
08 46 32 03 05 00 00 00 00 00 00
00 00 00 00 00 8C 2C 0E B0 B2 B2
04 00 00 00 20 03 1C 00 01 00 00
00 00 00 32 00 00 00 96 D2 94 D5
02 00 00 00 04 8D 9B 00 85 A6 00
7F B1 00 79 BD 00 73 CB 00 73 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 02 04 06 08 0A 0C 0E 10 12
14 16 18 1A 1C FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF 00
02 04 06 08 0A 0C 0F 10 12 13 14
28 26 24 22 21 20 1F 1E 1D 1C 18
16 FF FF FF FF FF 00 00 00 00 00
00 00 00 00 00 00 00 00 34 01
];
goodix,cfg-group5 = [
5C B0 04 80 07 05 45 00 02 08
28 08 46 32 03 05 00 00 00 00
00 00 00 00 00 00 00 8C 2C 0E
22 24 BB 0A 00 00 02 01 03 1C
00 01 00 00 00 00 00 32 00 00
00 14 46 94 C5 02 00 00 00 04
E3 16 00 B4 1D 00 8D 25 00 72
30 00 5D 3E 00 5D 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 02 04 06 08 0A 0C 0E 10
12 14 16 18 1A 1C FF FF FF FF
FF FF FF FF FF FF FF FF FF FF
FF FF 00 02 04 06 08 0A 0C 0F
10 12 13 14 28 26 24 22 21 20
1F 1E 1D 1C 18 16 FF FF FF FF
FF 00 00 00 00 00 00 00 00 00
00 00 00 00 B8 01
];
};

410
rk356x/rp-lcd-mipi0-7-720-1280.dtsi Executable file
View File

@@ -0,0 +1,410 @@
#include "rp-lcd-hdmi.dtsi"
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 02 E0 00
39 00 02 E1 93
39 00 02 E2 65
39 00 02 E3 F8
39 00 02 80 03
39 00 02 E0 04
39 00 02 2D 03
39 00 02 E0 00
39 00 02 70 10
39 00 02 71 13
39 00 02 72 06
39 00 02 75 03
39 00 02 E0 01
// 39 00 02 4A 30
39 00 02 00 00
39 00 02 01 A0
39 00 02 03 00
39 00 02 04 A0
39 00 02 0A 07
39 00 02 0C 74
39 00 02 17 00
39 00 02 18 D7
39 00 02 19 01
39 00 02 1A 00
39 00 02 1B D7
39 00 02 1C 01
39 00 02 1F 74
39 00 02 20 19
39 00 02 21 19
39 00 02 22 0E
39 00 02 27 43
39 00 02 37 09
39 00 02 38 04
39 00 02 39 08
39 00 02 3A 18
39 00 02 3B 18
39 00 02 3C 72
39 00 02 3E FF
39 00 02 3E FF
39 00 02 3F FF
39 00 02 40 04
39 00 02 41 A0
39 00 02 43 08
39 00 02 44 07
39 00 02 45 30
39 00 02 55 01
39 00 02 56 01
39 00 02 57 65
39 00 02 58 0A
39 00 02 59 0A
39 00 02 5A 28
39 00 02 5B 0F
39 00 02 5D 7C
39 00 02 5E 5F
39 00 02 5F 4D
39 00 02 60 3F
39 00 02 61 39
39 00 02 62 29
39 00 02 63 2B
39 00 02 64 12
39 00 02 65 28
39 00 02 66 24
39 00 02 67 22
39 00 02 68 3E
39 00 02 69 2C
39 00 02 6A 33
39 00 02 6B 26
39 00 02 6C 23
39 00 02 6D 18
39 00 02 6E 09
39 00 02 6F 00
39 00 02 70 7C
39 00 02 71 5F
39 00 02 72 4D
39 00 02 73 3F
39 00 02 74 39
39 00 02 75 29
39 00 02 76 2B
39 00 02 77 12
39 00 02 78 28
39 00 02 79 24
39 00 02 7A 22
39 00 02 7B 3E
39 00 02 7C 2C
39 00 02 7D 33
39 00 02 7E 26
39 00 02 7F 23
39 00 02 80 18
39 00 02 81 09
39 00 02 82 00
39 00 02 E0 02
39 00 02 00 37
39 00 02 01 17
39 00 02 02 0A
39 00 02 03 06
39 00 02 04 08
39 00 02 05 04
39 00 02 06 00
39 00 02 07 1F
39 00 02 08 1F
39 00 02 09 1F
39 00 02 0A 1F
39 00 02 0B 1F
39 00 02 0C 1F
39 00 02 0D 1F
39 00 02 0E 1F
39 00 02 0F 1F
39 00 02 10 3F
39 00 02 11 1F
39 00 02 12 1F
39 00 02 13 1E
39 00 02 14 10
39 00 02 15 1F
39 00 02 16 37
39 00 02 17 17
39 00 02 18 0B
39 00 02 19 07
39 00 02 1A 09
39 00 02 1B 05
39 00 02 1C 01
39 00 02 1D 1F
39 00 02 1E 1F
39 00 02 1F 1F
39 00 02 20 1F
39 00 02 21 1F
39 00 02 22 1F
39 00 02 23 1F
39 00 02 24 1F
39 00 02 25 1F
39 00 02 26 1F
39 00 02 27 1F
39 00 02 28 1F
39 00 02 29 1E
39 00 02 2A 11
39 00 02 2B 1F
39 00 02 2C 37
39 00 02 2D 17
39 00 02 2E 05
39 00 02 2F 09
39 00 02 30 07
39 00 02 31 0B
39 00 02 32 11
39 00 02 33 1F
39 00 02 34 1F
39 00 02 35 1F
39 00 02 36 1F
39 00 02 37 1F
39 00 02 38 1F
39 00 02 39 1F
39 00 02 3A 1F
39 00 02 3B 1F
39 00 02 3C 3F
39 00 02 3D 1F
39 00 02 3E 1E
39 00 02 3F 1F
39 00 02 40 01
39 00 02 41 1F
39 00 02 42 38
39 00 02 43 18
39 00 02 44 04
39 00 02 45 08
39 00 02 46 06
39 00 02 47 0A
39 00 02 48 10
39 00 02 49 1F
39 00 02 4A 1F
39 00 02 4B 1F
39 00 02 4C 1F
39 00 02 4D 1F
39 00 02 4E 1F
39 00 02 4F 1F
39 00 02 50 1F
39 00 02 51 1F
39 00 02 52 1F
39 00 02 53 1F
39 00 02 54 1E
39 00 02 55 1F
39 00 02 56 00
39 00 02 57 1F
39 00 02 58 10
39 00 02 59 00
39 00 02 5A 00
39 00 02 5B 10
39 00 02 5C 01
39 00 02 5D 50
39 00 02 5E 01
39 00 02 5F 02
39 00 02 60 30
39 00 02 61 01
39 00 02 62 02
39 00 02 63 06
39 00 02 64 6A
39 00 02 65 55
39 00 02 66 08
39 00 02 67 73
39 00 02 68 05
39 00 02 69 08
39 00 02 6A 6E
39 00 02 6B 00
39 00 02 6C 00
39 00 02 6D 00
39 00 02 6E 00
39 00 02 6F 88
39 00 02 70 00
39 00 02 71 00
39 00 02 72 06
39 00 02 73 7B
39 00 02 74 00
39 00 02 75 80
39 00 02 76 00
39 00 02 77 0D
39 00 02 78 18
39 00 02 79 00
39 00 02 7A 00
39 00 02 7B 00
39 00 02 7C 00
39 00 02 7D 03
39 00 02 7E 7B
39 00 02 E0 04
39 00 02 04 01
39 00 02 0E 38
39 00 02 2B 2B
39 00 02 2E 44
39 00 02 E0 00
39 00 02 E6 02
39 00 02 E6 02
// 39 00 02 36 00
39 C8 02 11 00
39 C8 02 29 00
05 78 01 11//delay 120MS
05 78 01 29
];
panel-exit-sequence = [
05 78 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <70000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <34>;
hfront-porch = <34>;
vback-porch = <6>;
vfront-porch = <20>;
hsync-len = <24>;
vsync-len = <3>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <720>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
57 58 02 00 04 05 35 00 01 08 32 0F
5A 32 03 05 00 00 00 00 02 00 00 18
1A 1E 14 8A 2A 0C 55 57 B5 06 00 00
00 20 33 1C 14 01 00 0F 00 2B FF 7F
19 46 32 3C 78 94 D5 02 08 00 00 04
98 40 00 8A 4A 00 80 55 00 77 61 00
6F 70 00 6F 00 00 00 00 F0 40 30 FF
FF 27 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 18 16 14 12 10 0E 0C 0A
08 06 04 02 FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF 24 22
21 20 1F 1E 1D 1C 18 16 00 02 04 06
08 0A 0F 10 12 13 FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF 81 01
];
goodix,cfg-group2 = [
5A 58 02 00 04 05 35 00 01 08
32 0F 5A 32 03 05 00 00 00 00
02 00 00 18 1A 1E 14 8A 2A 0C
55 57 B5 06 00 00 00 20 33 1C
14 01 00 0F 00 2B FF 7F 19 46
32 3C 78 94 D5 02 08 00 00 04
98 40 00 8A 4A 00 80 55 00 77
61 00 6F 70 00 6F 00 00 00 00
F0 40 30 FF FF 27 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 18 16 14 12 10 0E 0C 0A
08 06 04 02 FF FF 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 02 04 06 08 0A 0F 10
12 13 24 22 21 20 1F 1E 1D 1C
18 16 FF FF FF FF FF FF 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 5E 01
];
};

157
rk356x/rp-lcd-mipi0-8-1200-1920-v2.dtsi Executable file
View File

@@ -0,0 +1,157 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <1000>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
// reset-delay-ms = <60>;
// init-delay-ms = <60>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
// unprepare-delay-ms = <60>;
// disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
//MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 78 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <148000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <60>;
hfront-porch = <80>;
vback-porch = <25>;
vfront-porch = <35>;
hsync-len = <1>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1200>;
gtp_resolution_y = <1920>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group2 = [
00 20 03 00 05 0A 05 00 01 08 28
05 50 32 03 05 00 00 00 00 00 00
00 00 00 00 00 8C 2C 0E 17 15 31
0D 00 00 01 BA 03 1D 00 00 00 00
00 03 64 32 00 00 00 0F 41 94 C5
02 07 00 00 04 99 11 00 77 17 00
5F 1F 00 4C 2A 00 41 38 00 41 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 28
26 24 22 21 20 1F 1E 1D 1C 18 16
00 02 04 06 08 0A 0C 0F 10 12 13
14 FF FF 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 FE 01
];
};

174
rk356x/rp-lcd-mipi0-8-1200-1920.dtsi Executable file
View File

@@ -0,0 +1,174 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <940>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 78 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <148000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <60>;
hfront-porch = <80>;
vback-porch = <25>;
vfront-porch = <35>;
hsync-len = <1>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1200>;
gtp_resolution_y = <1920>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
5E B0 04 80 07 05 05 00 01 0F 28 05
50 32 03 05 00 00 00 00 00 00 00 00
00 00 00 8C 2C 0E 52 54 31 0D 00 00
01 80 04 1C 00 00 00 00 00 03 64 32
00 00 00 52 66 94 C5 02 07 00 00 04
83 53 00 82 57 00 80 5B 00 7F 5F 00
7E 63 00 7E 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 1C 1A 18 16 14 12 10 0E
0C 0A 08 06 04 02 FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF 00 02
04 06 08 0A 0C 0F 10 12 13 14 28 26
24 22 21 20 1F 1E 1D 1C 18 16 FF FF
FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF 22 01
];
goodix,cfg-group2 = [
00 20 03 00 05 0A 05 00 01 08 28
05 50 32 03 05 00 00 00 00 00 00
00 00 00 00 00 8C 2C 0E 17 15 31
0D 00 00 01 BA 03 1D 00 00 00 00
00 03 64 32 00 00 00 0F 41 94 C5
02 07 00 00 04 99 11 00 77 17 00
5F 1F 00 4C 2A 00 41 38 00 41 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 28
26 24 22 21 20 1F 1E 1D 1C 18 16
00 02 04 06 08 0A 0C 0F 10 12 13
14 FF FF 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 FE 01
];
};

370
rk356x/rp-lcd-mipi0-8-800-1280-v2.dtsi Executable file
View File

@@ -0,0 +1,370 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <510>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 FF 98 81 03
39 00 02 01 00
39 00 02 02 00
39 00 02 03 73
39 00 02 04 D7
39 00 02 05 00
39 00 02 06 08
39 00 02 07 11
39 00 02 08 00
39 00 02 09 3F
39 00 02 0a 00
39 00 02 0b 00
39 00 02 0c 00
39 00 02 0d 00
39 00 02 0e 00
39 00 02 0f 3F
39 00 02 10 3F
39 00 02 11 00
39 00 02 12 00
39 00 02 13 00
39 00 02 14 00
39 00 02 15 00
39 00 02 16 00
39 00 02 17 00
39 00 02 18 00
39 00 02 19 00
39 00 02 1a 00
39 00 02 1b 00
39 00 02 1c 00
39 00 02 1d 00
39 00 02 1e 40
39 00 02 1f 80
39 00 02 20 06
39 00 02 21 01
39 00 02 22 00
39 00 02 23 00
39 00 02 24 00
39 00 02 25 00
39 00 02 26 00
39 00 02 27 00
39 00 02 28 33
39 00 02 29 33
39 00 02 2a 00
39 00 02 2b 00
39 00 02 2c 00
39 00 02 2d 00
39 00 02 2e 00
39 00 02 2f 00
39 00 02 30 00
39 00 02 31 00
39 00 02 32 00
39 00 02 33 00
39 00 02 34 00
39 00 02 35 00
39 00 02 36 00
39 00 02 37 00
39 00 02 38 00
39 00 02 39 00
39 00 02 3a 00
39 00 02 3b 00
39 00 02 3c 00
39 00 02 3d 00
39 00 02 3e 00
39 00 02 3f 00
39 00 02 40 00
39 00 02 41 00
39 00 02 42 00
39 00 02 43 00
39 00 02 44 00
39 00 02 50 01
39 00 02 51 23
39 00 02 52 44
39 00 02 53 67
39 00 02 54 89
39 00 02 55 ab
39 00 02 56 01
39 00 02 57 23
39 00 02 58 45
39 00 02 59 67
39 00 02 5a 89
39 00 02 5b ab
39 00 02 5c cd
39 00 02 5d ef
39 00 02 5e 00
39 00 02 5f 0C
39 00 02 60 0C
39 00 02 61 0F
39 00 02 62 0F
39 00 02 63 0E
39 00 02 64 0E
39 00 02 65 06
39 00 02 66 07
39 00 02 67 0D
39 00 02 68 02
39 00 02 69 02
39 00 02 6a 02
39 00 02 6b 02
39 00 02 6c 02
39 00 02 6d 02
39 00 02 6e 0D
39 00 02 6f 02
39 00 02 70 02
39 00 02 71 05
39 00 02 72 01
39 00 02 73 08
39 00 02 74 00
39 00 02 75 0C
39 00 02 76 0C
39 00 02 77 0F
39 00 02 78 0F
39 00 02 79 0E
39 00 02 7a 0E
39 00 02 7b 06
39 00 02 7c 07
39 00 02 7d 0D
39 00 02 7e 02
39 00 02 7f 02
39 00 02 80 02
39 00 02 81 02
39 00 02 82 02
39 00 02 83 02
39 00 02 84 0D
39 00 02 85 02
39 00 02 86 02
39 00 02 87 05
39 00 02 88 01
39 00 02 89 08
39 00 02 8A 00
39 00 04 FF 98 81 04
39 00 02 6E 3B
39 00 02 6F 57
39 00 02 3A 24
39 00 02 8D 1F
39 00 02 87 BA
39 00 02 B2 D1
39 00 02 88 0B
39 00 02 38 01
39 00 02 39 00
39 00 02 B5 07
39 00 02 31 75
39 00 02 3B 98
39 00 04 FF 98 81 01
39 00 02 22 0A
39 00 02 31 09
39 00 02 35 07
39 00 02 53 7B
39 00 02 55 40
39 00 02 50 86
39 00 02 51 82
39 00 02 60 27
39 00 02 62 20
39 00 02 A0 00
39 00 02 A1 12
39 00 02 A2 20
39 00 02 A3 13
39 00 02 A4 14
39 00 02 A5 27
39 00 02 A6 1D
39 00 02 A7 1F
39 00 02 A8 7C
39 00 02 A9 1D
39 00 02 AA 2A
39 00 02 AB 6B
39 00 02 AC 1A
39 00 02 AD 18
39 00 02 AE 4E
39 00 02 AF 24
39 00 02 B0 2A
39 00 02 B1 4D
39 00 02 B2 5B
39 00 02 B3 23
39 00 02 C0 00
39 00 02 C1 13
39 00 02 C2 20
39 00 02 C3 12
39 00 02 C4 15
39 00 02 C5 28
39 00 02 C6 1C
39 00 02 C7 1E
39 00 02 C8 7B
39 00 02 C9 1E
39 00 02 CA 29
39 00 02 CB 6C
39 00 02 CC 1A
39 00 02 CD 19
39 00 02 CE 4D
39 00 02 CF 22
39 00 02 D0 2A
39 00 02 D1 4D
39 00 02 D2 5B
39 00 02 D3 23
39 00 04 FF 98 81 00
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <80000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <60>;
hfront-porch = <60>;
vback-porch = <8>;
vfront-porch = <8>;
hsync-len = <6>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
45 20 03 00 05 05 35 00 01 C8
1E 0F 50 32 03 05 00 00 00 00
00 00 04 18 1A 1E 14 8C 2E 0E
1E 20 EB 04 00 00 00 BA 02 2D
00 00 00 00 00 03 00 00 00 00
00 0F 2D 94 D5 02 07 00 00 04
E6 10 00 BB 14 00 92 1A 00 78
20 00 61 28 00 61 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E
0C 0A 08 06 04 02 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 2A 29 28 26 24 22 21 20
1F 1E 1D 1C 18 16 00 02 04 06
08 0A 0C 0F 10 12 13 14 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 CB 01
];
goodix,cfg-group5 = [
00 20 03 00 05 0A 05 00 01 08 28 08
50 32 03 05 00 00 00 00 00 00 00 18
1A 1E 14 8C 2C 0E 17 15 31 0D 00 00
02 9B 04 1D 00 00 00 00 00 03 64 32
00 00 00 11 25 94 C5 02 07 00 00 04
60 12 00 5D 15 00 57 19 00 54 1D 00
4F 22 00 4F 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 1C 1A 18 16 14 12 10 0E
0C 0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 28 26
24 22 21 20 1F 1E 1D 1C 18 16 14 13
00 02 04 06 08 0A 0C 0F 10 12 FF FF
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 2F 01];
};

400
rk356x/rp-lcd-mipi0-8-800-1280-v3.dtsi Executable file
View File

@@ -0,0 +1,400 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 FF 98 81 03
39 00 02 01 00
39 00 02 02 00
39 00 02 03 57 //54
39 00 02 04 D3 //D4
39 00 02 05 00
39 00 02 06 11
39 00 02 07 08 //09
39 00 02 08 00
39 00 02 09 00
39 00 02 0a 3F //00
39 00 02 0b 00
39 00 02 0c 00
39 00 02 0d 00
39 00 02 0e 00
39 00 02 0f 3F //00
39 00 02 10 3F //00
39 00 02 11 00
39 00 02 12 00
39 00 02 13 00
39 00 02 14 00
39 00 02 15 00
39 00 02 16 00
39 00 02 17 00
39 00 02 18 00
39 00 02 19 00
39 00 02 1a 00
39 00 02 1b 00
39 00 02 1c 00
39 00 02 1d 00
39 00 02 1e 40
39 00 02 1f 80
39 00 02 20 06
39 00 02 21 01
39 00 02 22 00
39 00 02 23 00
39 00 02 24 00
39 00 02 25 00
39 00 02 26 00
39 00 02 27 00
39 00 02 28 33
39 00 02 29 33
39 00 02 2a 00
39 00 02 2b 00
39 00 02 2c 00
39 00 02 2d 00
39 00 02 2e 00
39 00 02 2f 00
39 00 02 30 00
39 00 02 31 00
39 00 02 32 00
39 00 02 33 00
39 00 02 34 00
39 00 02 35 00
39 00 02 36 00
39 00 02 37 00
39 00 02 38 78
39 00 02 39 00
39 00 02 3a 00
39 00 02 3b 00
39 00 02 3c 00
39 00 02 3d 00
39 00 02 3e 00
39 00 02 3f 00
39 00 02 40 00
39 00 02 41 00
39 00 02 42 00
39 00 02 43 00 //GCH/L
39 00 02 44 00
39 00 02 50 00
39 00 02 51 23
39 00 02 52 45
39 00 02 53 67
39 00 02 54 89
39 00 02 55 ab
39 00 02 56 01
39 00 02 57 23
39 00 02 58 45
39 00 02 59 67
39 00 02 5a 89
39 00 02 5b ab
39 00 02 5c cd
39 00 02 5d ef
39 00 02 5e 00
39 00 02 5f 0D //FW_CGOUT_L[1]
39 00 02 60 0D //FW_CGOUT_L[2]
39 00 02 61 0C //FW_CGOUT_L[3]
39 00 02 62 0C //FW_CGOUT_L[4]
39 00 02 63 0F //FW_CGOUT_L[5]
39 00 02 64 0F //FW_CGOUT_L[6]
39 00 02 65 0E //FW_CGOUT_L[7]
39 00 02 66 0E //FW_CGOUT_L[8]
39 00 02 67 08 //FW_CGOUT_L[9]
39 00 02 68 02 //FW_CGOUT_L[10]
39 00 02 69 02 //FW_CGOUT_L[11]
39 00 02 6a 02 //FW_CGOUT_L[12]
39 00 02 6b 02 //FW_CGOUT_L[13]
39 00 02 6c 02 //FW_CGOUT_L[14]
39 00 02 6d 02 //FW_CGOUT_L[15]
39 00 02 6e 02 //FW_CGOUT_L[16]
39 00 02 6f 02 //FW_CGOUT_L[17]
39 00 02 70 14 //FW_CGOUT_L[18]
39 00 02 71 15 //FW_CGOUT_L[19]
39 00 02 72 06 //FW_CGOUT_L[20]
39 00 02 73 02 //FW_CGOUT_L[21]
39 00 02 74 02 //FW_CGOUT_L[22]
39 00 02 75 0D //BW_CGOUT_L[1]
39 00 02 76 0D //BW_CGOUT_L[2]
39 00 02 77 0C //BW_CGOUT_L[3]
39 00 02 78 0C //BW_CGOUT_L[4]
39 00 02 79 0F //BW_CGOUT_L[5]
39 00 02 7a 0F //BW_CGOUT_L[6]
39 00 02 7b 0E //BW_CGOUT_L[7]
39 00 02 7c 0E //BW_CGOUT_L[8]
39 00 02 7d 08 //BW_CGOUT_L[9]
39 00 02 7e 02 //BW_CGOUT_L[10]
39 00 02 7f 02 //BW_CGOUT_L[11]
39 00 02 80 02 //BW_CGOUT_L[12]
39 00 02 81 02 //BW_CGOUT_L[13]
39 00 02 82 02 //BW_CGOUT_L[14]
39 00 02 83 02 //BW_CGOUT_L[15]
39 00 02 84 02 //BW_CGOUT_L[16]
39 00 02 85 02 //BW_CGOUT_L[17]
39 00 02 86 14 //BW_CGOUT_L[18]
39 00 02 87 15 //BW_CGOUT_L[19]
39 00 02 88 06 //BW_CGOUT_L[20]
39 00 02 89 02 //BW_CGOUT_L[21]
39 00 02 8A 02 //BW_CGOUT_L[22]
39 00 04 FF 98 81 04
39 00 02 6E 3B
39 00 02 6F 57
39 00 02 3A 24
39 00 02 8D 1F
39 00 02 87 BA
39 00 02 B2 D1
39 00 02 88 0B
39 00 02 38 01
39 00 02 39 00
39 00 02 B5 07
39 00 02 31 75
39 00 02 3B 98
39 00 04 FF 98 81 01
39 00 02 22 0A
39 00 02 31 09
39 00 02 35 07
39 00 02 53 87
39 00 02 55 84
39 00 02 50 86
39 00 02 51 82
39 00 02 60 10
39 00 02 62 00
39 00 02 A0 00
39 00 02 A1 12
39 00 02 A2 1F
39 00 02 A3 12
39 00 02 A4 16
39 00 02 A5 29
39 00 02 A6 1E
39 00 02 A7 1F
39 00 02 A8 7E
39 00 02 A9 1B
39 00 02 AA 28
39 00 02 AB 6D
39 00 02 AC 19
39 00 02 AD 18
39 00 02 AE 4C
39 00 02 AF 1E
39 00 02 B0 23
39 00 02 B1 52
39 00 02 B2 6D
39 00 02 B3 3F
39 00 02 C0 00
39 00 02 C1 12
39 00 02 C2 20
39 00 02 C3 10
39 00 02 C4 13
39 00 02 C5 27
39 00 02 C6 1B
39 00 02 C7 1D
39 00 02 C8 75
39 00 02 C9 1F
39 00 02 CA 28
39 00 02 CB 68
39 00 02 CC 1A
39 00 02 CD 18
39 00 02 CE 4D
39 00 02 CF 25
39 00 02 D0 2E
39 00 02 D1 53
39 00 02 D2 60
39 00 02 D3 3F
39 00 04 FF 98 81 00
39 00 02 35 00
05 80 01 11
05 20 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <76000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <70>;
hfront-porch = <70>;
vback-porch = <22>;
vfront-porch = <16>;
hsync-len = <20>;
vsync-len = <6>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
45 20 03 00 05 05 35 00 01 C8 1E 0F 50 32
03 05 00 00 00 00 00 00 04 18 1A 1E 14 8C
2E 0E 1E 20 EB 04 00 00 00 BA 02 2D 00 00
00 00 00 03 00 00 00 00 00 0F 2D 94 D5 02
07 00 00 04 E6 10 00 BB 14 00 92 1A 00 78
20 00 61 28 00 61 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00
1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 2A 29 28 26 24 22 21 20 1F 1E 1D 1C
18 16 00 02 04 06 08 0A 0C 0F 10 12 13 14
00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 CB 01
];
/** jc */
goodix,cfg-group2 = [
00 20 03 00 05 0A 05 00 01 08 28
05 50 32 03 05 00 00 00 00 00 00
00 00 00 00 00 8C 2C 0E 17 15 31
0D 00 00 01 BA 03 1D 00 00 00 00
00 03 64 32 00 00 00 0F 41 94 C5
02 07 00 00 04 99 11 00 77 17 00
5F 1F 00 4C 2A 00 41 38 00 41 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E 0C
0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 28
26 24 22 21 20 1F 1E 1D 1C 18 16
00 02 04 06 08 0A 0C 0F 10 12 13
14 FF FF 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 FE 01
];
goodix,cfg-group5 = [
00 20 03 00 05 0A 05 00 01 08 28 08
50 32 03 05 00 00 00 00 00 00 00 18
1A 1E 14 8C 2C 0E 17 15 31 0D 00 00
02 9B 04 1D 00 00 00 00 00 03 64 32
00 00 00 11 25 94 C5 02 07 00 00 04
60 12 00 5D 15 00 57 19 00 54 1D 00
4F 22 00 4F 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 1C 1A 18 16 14 12 10 0E
0C 0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 28 26
24 22 21 20 1F 1E 1D 1C 18 16 14 13
00 02 04 06 08 0A 0C 0F 10 12 FF FF
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 2F 01
];
};

399
rk356x/rp-lcd-mipi0-8-800-1280.dtsi Executable file
View File

@@ -0,0 +1,399 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <510>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
15 00 02 E0 00
39 00 02 E1 93
39 00 02 E2 65
39 00 02 E3 F8
39 00 02 E0 00
39 00 02 70 10
39 00 02 71 13
39 00 02 72 06
39 00 02 80 03
39 00 02 E0 04
39 00 02 2D 03
39 00 02 E0 01
39 00 02 00 00
39 00 02 01 A0
39 00 02 03 00
39 00 02 04 A0
39 00 02 17 00
39 00 02 18 B1
39 00 02 19 01
39 00 02 1A 00
39 00 02 1B B1
39 00 02 1C 01
39 00 02 1F 3E
39 00 02 20 2D
39 00 02 21 2D
39 00 02 22 0E
39 00 02 37 19
39 00 02 38 05
39 00 02 39 08
39 00 02 3A 12
39 00 02 3C 78
39 00 02 3E 80
39 00 02 3F 80
39 00 02 40 06
39 00 02 41 A0
39 00 02 55 01
39 00 02 56 01
39 00 02 57 69
39 00 02 58 0A
39 00 02 59 0A
39 00 02 5A 28
39 00 02 5B 19
39 00 02 5D 7C
39 00 02 5E 65
39 00 02 5F 53
39 00 02 60 48
39 00 02 61 43
39 00 02 62 35
39 00 02 63 39
39 00 02 64 23
39 00 02 65 3D
39 00 02 66 3C
39 00 02 67 3D
39 00 02 68 5A
39 00 02 69 46
39 00 02 6A 57
39 00 02 6B 4B
39 00 02 6C 49
39 00 02 6D 2F
39 00 02 6E 03
39 00 02 6F 00
39 00 02 70 7C
39 00 02 71 65
39 00 02 72 53
39 00 02 73 48
39 00 02 74 43
39 00 02 75 35
39 00 02 76 39
39 00 02 77 23
39 00 02 78 3D
39 00 02 79 3C
39 00 02 7A 3D
39 00 02 7B 5A
39 00 02 7C 46
39 00 02 7D 57
39 00 02 7E 4B
39 00 02 7F 49
39 00 02 80 2F
39 00 02 81 03
39 00 02 82 00
39 00 02 E0 02
39 00 02 00 47
39 00 02 01 47
39 00 02 02 45
39 00 02 03 45
39 00 02 04 4B
39 00 02 05 4B
39 00 02 06 49
39 00 02 07 49
39 00 02 08 41
39 00 02 09 1F
39 00 02 0A 1F
39 00 02 0B 1F
39 00 02 0C 1F
39 00 02 0D 1F
39 00 02 0E 1F
39 00 02 0F 43
39 00 02 10 1F
39 00 02 11 1F
39 00 02 12 1F
39 00 02 13 1F
39 00 02 14 1F
39 00 02 15 1F
39 00 02 16 46
39 00 02 17 46
39 00 02 18 44
39 00 02 19 44
39 00 02 1A 4A
39 00 02 1B 4A
39 00 02 1C 48
39 00 02 1D 48
39 00 02 1E 40
39 00 02 1F 1F
39 00 02 20 1F
39 00 02 21 1F
39 00 02 22 1F
39 00 02 23 1F
39 00 02 24 1F
39 00 02 25 42
39 00 02 26 1F
39 00 02 27 1F
39 00 02 28 1F
39 00 02 29 1F
39 00 02 2A 1F
39 00 02 2B 1F
39 00 02 2C 11
39 00 02 2D 0F
39 00 02 2E 0D
39 00 02 2F 0B
39 00 02 30 09
39 00 02 31 07
39 00 02 32 05
39 00 02 33 18
39 00 02 34 17
39 00 02 35 1F
39 00 02 36 01
39 00 02 37 1F
39 00 02 38 1F
39 00 02 39 1F
39 00 02 3A 1F
39 00 02 3B 1F
39 00 02 3C 1F
39 00 02 3D 1F
39 00 02 3E 1F
39 00 02 3F 13
39 00 02 40 1F
39 00 02 41 1F
39 00 02 42 10
39 00 02 43 0E
39 00 02 44 0C
39 00 02 45 0A
39 00 02 46 08
39 00 02 47 06
39 00 02 48 04
39 00 02 49 18
39 00 02 4A 17
39 00 02 4B 1F
39 00 02 4C 00
39 00 02 4D 1F
39 00 02 4E 1F
39 00 02 4F 1F
39 00 02 50 1F
39 00 02 51 1F
39 00 02 52 1F
39 00 02 53 1F
39 00 02 54 1F
39 00 02 55 12
39 00 02 56 1F
39 00 02 57 1F
39 00 02 58 40
39 00 02 59 00
39 00 02 5A 00
39 00 02 5B 30
39 00 02 5C 03
39 00 02 5D 30
39 00 02 5E 01
39 00 02 5F 02
39 00 02 60 00
39 00 02 61 01
39 00 02 62 02
39 00 02 63 03
39 00 02 64 6B
39 00 02 65 00
39 00 02 66 00
39 00 02 67 73
39 00 02 68 05
39 00 02 69 06
39 00 02 6A 6B
39 00 02 6B 08
39 00 02 6C 00
39 00 02 6D 04
39 00 02 6E 04
39 00 02 6F 88
39 00 02 70 00
39 00 02 71 00
39 00 02 72 06
39 00 02 73 7B
39 00 02 74 00
39 00 02 75 07
39 00 02 76 00
39 00 02 77 5D
39 00 02 78 17
39 00 02 79 1F
39 00 02 7A 00
39 00 02 7B 00
39 00 02 7C 00
39 00 02 7D 03
39 00 02 7E 7B
39 00 02 E0 01
39 00 02 0E 01
39 00 02 E0 03
39 00 02 98 2F
39 00 02 E0 04
39 00 02 09 10
39 00 02 2B 2B
39 00 02 2E 44
39 00 02 E0 00
39 00 02 E6 02
39 00 02 E7 02
05 78 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <90000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <96>;
hfront-porch = <96>;
vback-porch = <8>;
vfront-porch = <8>;
hsync-len = <6>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
45 20 03 00 05 05 35 00 01 C8
1E 0F 50 32 03 05 00 00 00 00
00 00 04 18 1A 1E 14 8C 2E 0E
1E 20 EB 04 00 00 00 BA 02 2D
00 00 00 00 00 03 00 00 00 00
00 0F 2D 94 D5 02 07 00 00 04
E6 10 00 BB 14 00 92 1A 00 78
20 00 61 28 00 61 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 1C 1A 18 16 14 12 10 0E
0C 0A 08 06 04 02 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 2A 29 28 26 24 22 21 20
1F 1E 1D 1C 18 16 00 02 04 06
08 0A 0C 0F 10 12 13 14 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 CB 01
];
goodix,cfg-group5 = [
00 20 03 00 05 0A 05 00 01 08 28 08
50 32 03 05 00 00 00 00 00 00 00 18
1A 1E 14 8C 2C 0E 17 15 31 0D 00 00
02 9B 04 1D 00 00 00 00 00 03 64 32
00 00 00 11 25 94 C5 02 07 00 00 04
60 12 00 5D 15 00 57 19 00 54 1D 00
4F 22 00 4F 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 1C 1A 18 16 14 12 10 0E
0C 0A 08 06 04 02 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 28 26
24 22 21 20 1F 1E 1D 1C 18 16 14 13
00 02 04 06 08 0A 0C 0F 10 12 FF FF
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 2F 01];
};

213
rk356x/rp-lcd-mipi0tolvds-gm8775c-10-1024-600-raw.dtsi Executable file
View File

@@ -0,0 +1,213 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
#define RP_MIPI02LVDS
&dsi0 {
status = "okay";
rockchip,lane-rate = <445>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
init-delay-ms = <120>;
reset-delay-ms = <120>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
23 08 02 27 AA
23 08 02 48 02
23 08 02 B6 20
23 08 02 01 00
23 08 02 02 58
23 08 02 03 24
23 08 02 04 50
23 08 02 05 12
23 08 02 06 50
23 08 02 07 00
23 08 02 08 18
23 08 02 09 04
23 08 02 0A 18
23 08 02 0B 82
23 08 02 0C 1F
23 08 02 0D 01
23 08 02 0E 80
23 08 02 0F 20
23 08 02 10 20
23 08 02 11 03
23 08 02 12 1B
23 08 02 13 07
23 08 02 14 34
23 08 02 15 20
23 08 02 16 10
23 08 02 17 00
23 08 02 18 01
23 08 02 19 23
23 08 02 1A 40
23 08 02 1B 00
23 08 02 1E 46
23 08 02 51 30
23 08 02 1F 10
23 08 02 2A 01
05 78 01 11
05 05 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <50000000>;
hactive = <1024>;
vactive = <600>;
hback-porch = <80>;
hfront-porch = <80>;
vback-porch = <24>;
vfront-porch = <24>;
hsync-len = <18>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1024>;
gtp_resolution_y = <600>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01];
goodix,cfg-group3 = [
46 00 04 58 02 0A 3D 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 18 1A 1E 14 8D 2D 88
17 15 31 0D 00 00 01 9B 03 1D
00 00 00 00 00 00 00 00 00 00
00 1E 5A 94 C5 02 08 00 00 00
61 21 00 57 29 00 4E 34 00 48
41 00 43 51 00 43 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09
0C 0D 0E 0F 10 11 14 15 FF FF
FF FF 00 00 00 00 00 00 00 00
00 00 00 02 04 06 07 08 0A 0C
0F 10 11 12 13 19 1B 1C 1E 1F
20 21 22 23 24 25 26 27 FF FF
FF FF FF FF 00 00 00 00 00 00
00 00 00 00 FD 01
];
};

157
rk356x/rp-lcd-mipi0tolvds-gm8775c-1920-1080.dtsi Executable file
View File

@@ -0,0 +1,157 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
#define RP_MIPI02LVDS
#define RP_DUALLVDS
&dsi0 {
status = "okay";
// rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
init-delay-ms = <120>;
reset-delay-ms = <120>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
23 08 02 27 AA
23 08 02 48 02
23 08 02 B6 20
23 08 02 01 80
23 08 02 02 38
23 08 02 03 47
23 08 02 04 50
23 08 02 05 12
23 08 02 06 50
23 08 02 07 00
23 08 02 08 18
23 08 02 09 04
23 08 02 0A 18
23 08 02 0B 82
23 08 02 0C 13
23 08 02 0D 01
23 08 02 0E 80
23 08 02 0F 20
23 08 02 10 20
23 08 02 11 03
23 08 02 12 1B
23 08 02 13 63
23 08 02 14 34
23 08 02 15 20
23 08 02 16 10
23 08 02 17 00
23 08 02 18 34
23 08 02 19 20
23 08 02 1A 10
23 08 02 1B 00
23 08 02 1E 46
23 08 02 51 30
23 08 02 1F 10
23 08 02 2A 01
05 78 01 11
05 05 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <130000000>;
hactive = <1920>;
vactive = <1080>;
hback-porch = <80>;
hfront-porch = <80>;
vback-porch = <24>;
vfront-porch = <24>;
hsync-len = <18>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
//touch todo.

141
rk356x/rp-lcd-mipi1-10-1920-1200.dtsi Normal file
View File

@@ -0,0 +1,141 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
//rockchip,lane-rate = <1200>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
// reset-delay-ms = <60>;
// init-delay-ms = <60>;
enable-delay-ms = <160>;
prepare-delay-ms = <200>;
// unprepare-delay-ms = <60>;
// disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <150000000>;
hactive = <1920>;
vactive = <1200>;
hback-porch = <32>; //60
hfront-porch = <110>; //16
vback-porch = <14>; //23
vfront-porch = <11>; //12
hsync-len = <1>; //20
vsync-len = <1>; //3
de-active = <1>;
hsync-active = <1>;
vsync-active = <1>;
pixelclk-active = <1>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1920>;
gtp_resolution_y = <1200>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
55 80 07 B0 04 0A 3D 00 01 08 28
05 50 32 03 05 00 00 00 00 00 00
00 18 1A 1E 14 8E 2F 99 17 15 31
0D 00 00 02 9B 03 1D 00 00 00 00
00 00 00 00 00 00 00 1E 78 94 C5
02 08 00 00 00 5B 22 00 4C 2D 00
41 3C 00 38 4F 00 32 69 00 32 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00
00 00 00 01 04 05 06 07 08 09 0C
0D 0E 0F 10 11 14 15 16 17 FF FF
00 00 00 00 00 00 00 00 00 00 00
02 04 06 07 08 0A 0C 0D 0F 10 11
12 13 19 1B 1C 1E 1F 20 21 22 23
24 25 26 27 28 29 FF FF FF 00 00
00 00 00 00 00 00 00 00 6B 01];
};

406
rk356x/rp-lcd-mipi1-10-800-1280.dtsi Executable file
View File

@@ -0,0 +1,406 @@
#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
#define RP_MIPI1_USED
&dsi1 {
status = "okay";
//rockchip,lane-rate = <480>;
dsi1_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <60>;
init-delay-ms = <60>;
enable-delay-ms = <60>;
prepare-delay-ms = <60>;
unprepare-delay-ms = <60>;
disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
15 00 02 E0 00
15 00 02 E1 93
15 00 02 E2 65
15 00 02 E3 F8
15 00 02 E0 04
15 00 02 2D 03
15 00 02 E0 00
15 00 02 80 03
15 00 02 70 02
15 00 02 71 23
15 00 02 72 06
15 00 02 E0 01
15 00 02 00 00
15 00 02 01 66
15 00 02 03 00
15 00 02 04 6D
15 00 02 17 00
15 00 02 18 BF
15 00 02 19 00
15 00 02 1A 00
15 00 02 1B BF
15 00 02 1C 00
15 00 02 1F 3E
15 00 02 20 28
15 00 02 21 28
15 00 02 22 0E
15 00 02 37 09
15 00 02 38 04
15 00 02 39 08
15 00 02 3A 12
15 00 02 3C 78
15 00 02 3D FF
15 00 02 3E FF
15 00 02 3F 7F
15 00 02 40 06
15 00 02 41 A0
15 00 02 55 0F
15 00 02 56 01
15 00 02 57 69
15 00 02 58 0A
15 00 02 59 0A
15 00 02 5A 29
15 00 02 5B 15
15 00 02 5D 7C
15 00 02 5E 65
15 00 02 5F 55
15 00 02 60 49
15 00 02 61 44
15 00 02 62 35
15 00 02 63 3A
15 00 02 64 23
15 00 02 65 3D
15 00 02 66 3C
15 00 02 67 3D
15 00 02 68 5D
15 00 02 69 4D
15 00 02 6A 56
15 00 02 6B 48
15 00 02 6C 45
15 00 02 6D 38
15 00 02 6E 25
15 00 02 6F 00
15 00 02 70 7C
15 00 02 71 65
15 00 02 72 55
15 00 02 73 49
15 00 02 74 44
15 00 02 75 35
15 00 02 76 3A
15 00 02 77 23
15 00 02 78 3D
15 00 02 79 3C
15 00 02 7A 3D
15 00 02 7B 5D
15 00 02 7C 4D
15 00 02 7D 56
15 00 02 7E 48
15 00 02 7F 45
15 00 02 80 38
15 00 02 81 25
15 00 02 82 00
15 00 02 E0 02
15 00 02 00 1E
15 00 02 01 1E
15 00 02 02 41
15 00 02 03 41
15 00 02 04 43
15 00 02 05 43
15 00 02 06 1F
15 00 02 07 1F
15 00 02 08 1F
15 00 02 09 1F
15 00 02 0A 1E
15 00 02 0B 1E
15 00 02 0C 1F
15 00 02 0D 47
15 00 02 0E 47
15 00 02 0F 45
15 00 02 10 45
15 00 02 11 4B
15 00 02 12 4B
15 00 02 13 49
15 00 02 14 49
15 00 02 15 1F
15 00 02 16 1E
15 00 02 17 1E
15 00 02 18 40
15 00 02 19 40
15 00 02 1A 42
15 00 02 1B 42
15 00 02 1C 1F
15 00 02 1D 1F
15 00 02 1E 1F
15 00 02 1F 1f
15 00 02 20 1E
15 00 02 21 1E
15 00 02 22 1f
15 00 02 23 46
15 00 02 24 46
15 00 02 25 44
15 00 02 26 44
15 00 02 27 4A
15 00 02 28 4A
15 00 02 29 48
15 00 02 2A 48
15 00 02 2B 1f
15 00 02 2C 1F
15 00 02 2D 1F
15 00 02 2E 42
15 00 02 2F 42
15 00 02 30 40
15 00 02 31 40
15 00 02 32 1E
15 00 02 33 1E
15 00 02 34 1F
15 00 02 35 1F
15 00 02 36 1E
15 00 02 37 1E
15 00 02 38 1F
15 00 02 39 48
15 00 02 3A 48
15 00 02 3B 4A
15 00 02 3C 4A
15 00 02 3D 44
15 00 02 3E 44
15 00 02 3F 46
15 00 02 40 46
15 00 02 41 1F
15 00 02 42 1F
15 00 02 43 1F
15 00 02 44 43
15 00 02 45 43
15 00 02 46 41
15 00 02 47 41
15 00 02 48 1E
15 00 02 49 1E
15 00 02 4A 1E
15 00 02 4B 1F
15 00 02 4C 1E
15 00 02 4D 1E
15 00 02 4E 1F
15 00 02 4F 49
15 00 02 50 49
15 00 02 51 4B
15 00 02 52 4B
15 00 02 53 45
15 00 02 54 45
15 00 02 55 47
15 00 02 56 47
15 00 02 57 1F
15 00 02 58 10
15 00 02 59 00
15 00 02 5A 00
15 00 02 5B 30
15 00 02 5C 02
15 00 02 5D 40
15 00 02 5E 01
15 00 02 5F 02
15 00 02 60 30
15 00 02 61 01
15 00 02 62 02
15 00 02 63 6A
15 00 02 64 6A
15 00 02 65 05
15 00 02 66 12
15 00 02 67 74
15 00 02 68 04
15 00 02 69 6A
15 00 02 6A 6A
15 00 02 6B 08
15 00 02 6C 00
15 00 02 6D 06
15 00 02 6E 00
15 00 02 6F 88
15 00 02 70 00
15 00 02 71 00
15 00 02 72 06
15 00 02 73 7B
15 00 02 74 00
15 00 02 75 07
15 00 02 76 00
15 00 02 77 5D
15 00 02 78 17
15 00 02 79 1F
15 00 02 7A 00
15 00 02 7B 00
15 00 02 7C 00
15 00 02 7D 03
15 00 02 7E 7B
15 00 02 E0 04
15 00 02 2B 2B
15 00 02 2E 44
15 00 02 E0 01
15 00 02 0E 01
15 00 02 E0 03
15 00 02 98 2F
15 00 02 E0 00
15 00 02 E6 02
15 00 02 E7 02
05 78 01 11
05 05 01 29
15 0a 02 35 00
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <68000000>;
hactive = <800>;
vactive = <1280>;
hback-porch = <18>;
hfront-porch = <18>;
vback-porch = <8>;
vfront-porch = <24>;
hsync-len = <18>;
vsync-len = <4>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi1: endpoint {
remote-endpoint = <&dsi1_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi1_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi1>;
};
};
};
};
&dsi1_in_vp0 {
status = "disabled";
};
&dsi1_in_vp1 {
status = "okay";
};
&video_phy1{
status = "okay";
};
&route_dsi1 {
status = "okay";
connect = <&vp1_out_dsi1>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <800>;
gtp_resolution_y = <1280>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
/* old touchscreen sensor_id0 */
goodix,cfg-group0 = [
00 20 03 00 05 0A 05 00 01 08
28 05 50 32 03 05 00 00 00 00
00 00 00 00 00 00 00 90 30 AA
17 15 31 0D 00 00 01 B9 04 25
00 00 00 00 00 00 00 00 00 00
00 0F 23 94 C5 02 07 00 00 04
9F 10 00 8B 13 00 7C 16 00 6B
1B 00 60 20 00 60 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00
00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04
01 00 00 00 00 00 00 00 00 00
00 00 2A 29 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 00 02
04 06 07 08 0A 0C 0D 0E 0F 10
11 12 13 14 00 00 00 00 00 00
00 00 00 00 96 01
];
/* new touchscreen sensor_id2 */
goodix,cfg-group2 = [
00 20 03 00 05 0A 35 00 00
05 28 08 55 41 03 05 00 00
00 00 00 00 00 1A 1C 1E 14
8E 2E 99 14 16 D3 07 00 00
00 9B 02 2D 00 00 00 00 00
00 00 00 00 00 00 0F 23 94
D5 02 07 00 00 04 9D 10 00
86 13 00 75 16 00 61 1B 00
53 20 00 53 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00
00 00 00 00 17 16 15 14 11
10 0F 0E 0D 0C 09 08 07 06
05 04 01 00 FF FF 00 00 00
00 00 00 00 00 00 00 00 02
04 06 07 08 0A 0C 0D 0F 10
11 12 13 28 27 26 25 24 23
22 21 20 1F 1E 1C 1B 19 FF
FF FF FF 00 00 00 00 00 00
00 00 00 00 4D 01
];
};

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