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5dd7a8972b
rockchip/rk356x/pro-rk3568-h.dts
zhangpeng 5dd7a8972b rockchip
2025-04-28 11:36:59 +08:00

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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
//rk3568-evb1-ddr4-v10
//#include "rk3568-evb1-ddr4-v10.dtsi"
#include "rk3568-evb-rpdzkj-rk809-pwm-pcie-wifi.dtsi"
#include "../rk3568-linux.dtsi"
/*************************HDMI IN***********************/
#include "rp-mipi-camera-rk628d-csi2hdmi.dtsi"
/***************************************************/
/*************************PCIE***********************/
#include "rk3568-pcie2x1.dtsi"
#include "rp-pcie-5g.dtsi"
/***************************************************/
/*************************adc key***********************/
#include "rp-adc-key.dtsi"
/***************************************************/
/*************************gmac***********************/
#include "rp-gmac0-pro-rk3568.dtsi"
#include "rp-gmac1-m1-pro-rk3568.dtsi"
/***************************************************/
/*************************wifi***********************/
#include "rp-wifi-bt-ap6275p-rk3568.dtsi"
/***************************************************/
/*************************CAN**********************/
#include "rp-can1-m1-rk3568.dtsi"
#include "rp-can2-m0-rk3568.dtsi"
/**************************************************/
/***************** SINGLE LCD (LCD + HDMI) ****************/
#include "pro-rk3568-h-single-lcd-gpio.dtsi"
/* HDMI */
//#include "rp-lcd-mipi2hdmi-lt8912.dtsi" //dsi1-lt8912-hdmi + HDMI
/* MIPI DSI0 */
//#include "rp-lcd-mipi0-5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
//#include "rp-lcd-mipi0-7-1024-600.dtsi"
//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
//#include "rp-lcd-mipi0-8-800-1280.dtsi"
//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
//#include "rp-lcd-mipi0-10-800-1280.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
/* LVDS */
//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
//#include "rp-lcd-lvds-10-1024-600.dtsi"
//#include "rp-lcd-lvds-10-1280-800.dtsi"
/*MIPI TO LVDS */
//#include "rp-lcd-mipi0tolvds-gm8775c-10-1024-600-raw.dtsi"
//#include "rp-lcd-mipi0tolvds-gm8775c-1920-1080.dtsi"
/* EDP */
//#include "rp-lcd-edp-13-1920-1080.dtsi"
//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
//null
//null
//null
#ifdef RP_TRIPLE_LCD
#include "pro-rk3568-triple-lcd-gpio.dtsi" // if use triple lcd, must enable it
#endif
#ifdef RP_DUAL_LCD
#include "pro-rk3568-dual-lcd-gpio.dtsi" // if use dual lcd, must enable it
#endif
/{
model = "pro-rk3568-h";
compatible = "rpdzkj,pro-rk3568-h", "rockchip,rk3568";
fan_gpio_control {
compatible = "fan_gpio_control";
gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
};
vcc3v3_pcie3: gpio-regulator-pcie3 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //In the uboot phase fixed.c resolves gpio
pinctrl-names = "default";
pinctrl-0 = <&vcc3v3_pcie30>;
};
rp_power{
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
pinctrl-1 = <&vcc5v0_otg_en>;
//#define GPIO_FUNCTION_OUTPUT 0
//#define GPIO_FUNCTION_INPUT 1
//#define GPIO_FUNCTION_IRQ 2
//#define GPIO_FUNCTION_FLASH 3
//#define GPIO_FUNCTION_OUTPUT_CTRL 4
led { //system led
gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb_pwr { //usb power
gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
hub_rst { //usb hub
gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
uart_en {
gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
otg_power { //usb otg power
gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_en { //spk enable
gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
4g_power { //4g power
gpio_num = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
spk_mute { //spk mute
gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
gpio_function = <4>;
};
HDMI_5V {
gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "okay";
compatible = "rp_gpio";
gpio3b5 { //pcie power
gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
gpio3a7 { //pcie clock
gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
fiq-debugger {
compatible = "rockchip,fiq-debugger";
rockchip,serial-id = <2>;
rockchip,wake-irq = <0>;
/* If enable uart uses irq instead of fiq */
rockchip,irq-mode-enable = <1>;
rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
};
&pmu_io_domains {
status = "okay";
pmuio2-supply = <&vcc3v3_pmu>;
vccio1-supply = <&vccio_acodec>;
vccio3-supply = <&vccio_sd>;
vccio4-supply = <&vcc_1v8>;
vccio5-supply = <&vcc_3v3>;
vccio6-supply = <&vcc_1v8>;
vccio7-supply = <&vcc_3v3>;
};
&pwm0 {
status = "okay";
pinctrl-names = "active";
};
&i2c1 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c5 {
status = "okay";
rtc@51 {
status = "okay";
compatible = "rtc,hym8563";
reg = <0x51>;
};
};
&sdmmc2 {
status = "disabled";
};
&uart0 {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m1_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m1_xfer>;
};
&spi0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
spi0_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
spi1_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
status = "okay";
};
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <200000000>;
pinctrl-names = "default";
pinctrl-0 = <&can2m0_pins>;
status = "okay";
};
&video_phy1 {
status = "okay";
};
/******** must be close,if not system no run ******/
&dmc {
status = "disabled";
};
&dfi {
status = "disabled";
};
/*********************************************/
&pwm7 {
/****** disable for gpio used to be spi0_cs0 */
status = "disabled";
};
/**
* when single mipi1 or edp ports used, pwm need the pwm5,
* and if mutiple lcd used, we just reference the backlight5.
*/
//#if (defined(RP_MIPI1_USED) || defined(RP_EDP_USED)) && defined(RP_SINGLE_LCD)
#if defined(RP_EDP_USED) && defined(RP_SINGLE_LCD)
&backlight4 {
pwms = <&pwm5 0 25000 0>;
};
#endif
#if defined(RP_SINGLE_LCD) && defined(RP_MIPI02LVDS)
&backlight4{
pwms = <&pwm4 0 25000 0>;
};
&dsi0_panel {
enable-gpios = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
};
#endif
/*************************wifi bt***********************/
&wireless_wlan {
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>,<&wifi_poweren_gpio>;
WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
WIFI,poweren_gpio = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wireless_bluetooth {
BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
status = "okay";
};
/******************************************************/
&pcie2x1 {
/**
* gpio please refer to main dts:
* reset-gpios = <&gpio* ** ***>;
*/
reset-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
};
&rk_headset {
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
};
&pinctrl {
spi1 {
spi1m1_pins: spi1m1-pins {
rockchip,pins =
/* spi1_clkm1 */
<3 RK_PC3 3 &pcfg_pull_none>,
/* spi1_misom1 */
<3 RK_PC2 3 &pcfg_pull_down>,
/* spi1_mosim1 */
<3 RK_PC1 3 &pcfg_pull_down>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
vcc5v0_otg_en: vcc5v0-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
vcc3v3-pcie3 {
vcc3v3_pcie30: vcc3v3-pcie3 {
rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_poweren_gpio: wifi-poweren-gpio {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
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