rk3588/.dr4-rk3588.dtb.dts.tmp

@@ -14600,29 +14600,11 @@
 
 
 &usbhost3_0 {
-    status = "okay";
+    status = "disabled";
 };
 
 &usbhost_dwc3_0 {
-    status = "okay";
-};
-
-&usbdrd_dwc3_0 {
-     extcon=<&u2phy0>;
-     status="okay";
-};
-
-&u2phy0 {
-     status = "okay";
-};
-
-&usbdrd_dwc3_1 {
-     extcon=<&u2phy1>;
-     status="okay";
-};
-
-&u2phy1 {
-     status = "okay";
+    status = "disabled";
 };
 # 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
 
@@ -14828,10 +14810,24 @@
         };
 };
 
+
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0m0_xfer>;
+ fifo-depth =<4096>;
+ rx-fifo-depth =<2048>;
+ tx-fifo-depth =<2048>;
+  dma-names = "tx", "rx";
+
+
+};
+
 &uart1 {
  status = "okay";
  pinctrl-names = "default";
- pinctrl-0 = <&uart1m1_xfer>;
+ pinctrl-0 = <&uart1m2_xfer>;
  fifo-depth =<4096>;
  rx-fifo-depth =<2048>;
  tx-fifo-depth =<2048>;
@@ -14870,10 +14866,21 @@
 
 };
 
+&uart6 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart6m2_xfer>;
+ fifo-depth =<4096>;
+ rx-fifo-depth =<2048>;
+ tx-fifo-depth =<2048>;
+  dma-names = "tx", "rx";
+
+};
+
 &uart7 {
  status = "okay";
  pinctrl-names = "default";
- pinctrl-0 = <&uart7m0_xfer>;
+ pinctrl-0 = <&uart7m1_xfer>;
  fifo-depth =<4096>;
  rx-fifo-depth =<2048>;
  tx-fifo-depth =<2048>;
@@ -14890,6 +14897,27 @@
  dma-names = "tx", "rx";
 };
 
+&uart9 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart9m2_xfer>;
+ fifo-depth =<4096>;
+ rx-fifo-depth =<2048>;
+ tx-fifo-depth =<2048>;
+ dma-names = "tx", "rx";
+};
+
+
+
+&can0 {
+ assigned-clocks = <&cru 112>;
+ assigned-clock-rates = <200000000>;
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&can0m0_pins>;
+
+};
+
 &can1 {
  assigned-clocks = <&cru 114>;
  assigned-clock-rates = <200000000>;
@@ -14898,6 +14926,14 @@
  pinctrl-0 = <&can1m1_pins>;
 };
 
+&can2 {
+ assigned-clocks = <&cru 116>;
+ assigned-clock-rates = <200000000>;
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&can2m1_pins>;
+};
+
 &spi3 {
     status = "okay";
     pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
@@ -14932,7 +14968,7 @@
 };
 
 &sdmmc {
-    status = "disabled";
+    status = "okay";
 };
 
 &fiq_debugger {
@@ -14951,19 +14987,3 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
 &hdptxphy_hdmi_clk1 {
             status = "okay";
 };
-
-&pwm0 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm0m2_pins>;
-    #pwm-cells = <3>;
-};
-
-&pwm13 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm13m2_pins>;
-    #pwm-cells = <3>;
-};

rk3588/dr4-rk3588.dts

@@ -161,10 +161,24 @@
         };
 };
 
+
+
+&uart0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0m0_xfer>;
+	fifo-depth =<4096>;	
+	rx-fifo-depth =<2048>;
+	tx-fifo-depth =<2048>;
+		dma-names = "tx", "rx";
+
+
+};
+
 &uart1 {
 	status = "okay";
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart1m1_xfer>;
+	pinctrl-0 = <&uart1m2_xfer>;
 	fifo-depth =<4096>;	
 	rx-fifo-depth =<2048>;
 	tx-fifo-depth =<2048>;
@@ -203,10 +217,21 @@
 	
 };
 
+&uart6 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart6m2_xfer>;
+	fifo-depth =<4096>;	
+	rx-fifo-depth =<2048>;
+	tx-fifo-depth =<2048>;
+		dma-names = "tx", "rx";
+	
+};
+
 &uart7 {
 	status = "okay";
 	pinctrl-names = "default";
-	pinctrl-0 = <&uart7m0_xfer>;
+	pinctrl-0 = <&uart7m1_xfer>;
 	fifo-depth =<4096>;	
 	rx-fifo-depth =<2048>;
 	tx-fifo-depth =<2048>;
@@ -223,6 +248,27 @@
 	dma-names = "tx", "rx";
 };
 
+&uart9 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart9m2_xfer>;
+	fifo-depth =<4096>;	
+	rx-fifo-depth =<2048>;
+	tx-fifo-depth =<2048>;
+	dma-names = "tx", "rx";
+};
+
+
+
+&can0 {
+	assigned-clocks = <&cru CLK_CAN0>;
+	assigned-clock-rates = <200000000>;
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&can0m0_pins>;
+	
+};
+
 &can1 {
 	assigned-clocks = <&cru CLK_CAN1>;
 	assigned-clock-rates = <200000000>;
@@ -231,6 +277,14 @@
 	pinctrl-0 = <&can1m1_pins>;
 }; 
 
+&can2 {
+	assigned-clocks = <&cru CLK_CAN2>;
+	assigned-clock-rates = <200000000>;
+	status = "disabled";
+	pinctrl-names = "default";
+	pinctrl-0 = <&can2m1_pins>;
+}; 
+
 &spi3 {
     status = "okay";
     pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
@@ -265,7 +319,7 @@
 };
 
 &sdmmc {
-    status = "disabled";
+    status = "okay";
 };
 
 &fiq_debugger {
@@ -283,20 +337,4 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
 
 &hdptxphy_hdmi_clk1 {
             status = "okay";
-};
-
-&pwm0 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm0m2_pins>;  // 选择 PWM1 的引脚复用
-    #pwm-cells = <3>;
-};
-
-&pwm13 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm13m2_pins>;  // 选择 PWM1 的引脚复用和UART1 M1引脚冲突了
-    #pwm-cells = <3>;
 };

rk3588/rp-usb-host.dtsi

@@ -39,27 +39,10 @@
 
 
 &usbhost3_0 {
-    status = "okay";
+    status = "disabled";
 };
 
 &usbhost_dwc3_0 {
-    status = "okay";
+    status = "disabled";
 };
 
-&usbdrd_dwc3_0 {
-     extcon=<&u2phy0>;
-     status="okay";
-};
-  
-&u2phy0 {
-     status = "okay";
-};
-
-&usbdrd_dwc3_1 {
-     extcon=<&u2phy1>;
-     status="okay";
-};
-  
-&u2phy1 {
-     status = "okay";
-};