2 Commits

Author SHA1 Message Date
zhangpeng
92bc223ace 禁用CAN2m1对NPU I2C的占用 2025-04-29 11:39:13 +08:00
zhangpeng
f716b853db 增加SPI3 2025-04-28 11:56:22 +08:00
6 changed files with 299 additions and 56 deletions

View File

@@ -32,11 +32,13 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

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@@ -28,8 +28,10 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi

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@@ -14517,7 +14517,20 @@
/delete-node/ &backlight;
# 4 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi" 1
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m0_xfer>;
goodix_ts:goodix_ts@5d {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
};
};
# 6 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi" 1
@@ -14622,8 +14635,8 @@
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
&gmac0_clkinout
&eth0_pins>;
tx_delay = <0x44>;
@@ -14707,6 +14720,37 @@
};
# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 64 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
&hdmi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim2_tx1_scl &hdmim2_tx1_sda>;
};
&hdmi1_in_vp1 {
status = "okay";
};
&hdmi1_sound {
status = "okay";
};
&i2s6_8ch {
status = "okay";
};
&hdptxphy_hdmi1 {
status = "okay";
};
&route_hdmi1 {
status = "okay";
connect = <&vp1_out_hdmi1>;
};
# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
/ {
model = "dr4-rk3588";
@@ -14736,7 +14780,7 @@
thermal-zone = "soc-thermal";
threshold-temp = <60000>;
running-time = <10000>;
status = "disable";
status = "disabled";
};
rp_power{
@@ -14754,7 +14798,83 @@
};
# 162 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
rp_gpio{
status = "disabled";
compatible = "rp_gpio";
gpio3c7 {
gpio_num = <&gpio3 23 0>;
gpio_function = <0>;
};
};
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart7 {
@@ -14777,6 +14897,17 @@
dma-names = "tx", "rx";
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&can0 {
assigned-clocks = <&cru 112>;
@@ -14794,9 +14925,30 @@
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
# 225 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
&can2 {
assigned-clocks = <&cru 116>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can2m1_pins>;
};
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "disable";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
@@ -14815,11 +14967,23 @@
};
&sdmmc {
status = "disabled";
status = "okay";
};
&fiq_debugger {
rockchip,baudrate = <115200>;
};
&display_subsystem {
clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
};
&hdptxphy_hdmi_clk0 {
status = "okay";
};
&hdptxphy_hdmi_clk1 {
status = "okay";
};

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@@ -2,7 +2,7 @@
//#include "../rk3588-evb4-lp4-v10-linux.dts"
#include "rp-rk3588-board.dtsi"
// #include "rp-tp-i2c6-gt911.dtsi"
#include "rp-tp-i2c6-gt911.dtsi"
// #include "rd-rk3588-lcd-gpio.dtsi"
#include "rpdzkj_config.dtsi"
@@ -60,8 +60,8 @@
//#include "rp-camera-dphy0-imx415.dtsi"
/******************************************/
//#include "rp-lcd-hdmi0.dtsi" //batch ignore
//#include "rp-lcd-hdmi1.dtsi" //batch ignore
// #include "rp-lcd-hdmi0.dtsi" //batch ignore
#include "rp-lcd-hdmi1.dtsi" //batch ignore
//#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore
// #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
@@ -115,7 +115,7 @@
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "disable";
status = "disabled";
};
rp_power{
@@ -150,15 +150,82 @@
// };
};
// rp_gpio{
// status = "okay";
// compatible = "rp_gpio";
rp_gpio{
status = "disabled";
compatible = "rp_gpio";
// gpio3c7 {
// gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
// gpio_function = <0>;
// };
// };
gpio3c7 {
gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
gpio_function = <0>;
};
};
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart7 {
@@ -181,6 +248,17 @@
dma-names = "tx", "rx";
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&can0 {
assigned-clocks = <&cru CLK_CAN0>;
@@ -199,31 +277,29 @@
pinctrl-0 = <&can1m1_pins>;
};
// &can2 {
// assigned-clocks = <&cru CLK_CAN2>;
// assigned-clock-rates = <200000000>;
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&can2m1_pins>;
// };
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can2m1_pins>;
};
// &spi3 {
// // status = "disabled";
// status = "okay";
// max-freq = <48000000>;
// dev-port = <1>;
// pinctrl-0 = <&spi3m1_cs1 &spi3m1_pins>;
// spidev0: spidev@00 {
// status = "okay";
// compatible = "rockchip,spidev";
// reg = <0x00>;
// spi-max-frequency = <48000000>;
// };
// };
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "disable";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
@@ -242,24 +318,23 @@
};
&sdmmc {
status = "disabled";
status = "okay";
};
&fiq_debugger {
rockchip,baudrate = <115200>;
};
// &display_subsystem {
// clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
// clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
// };
&display_subsystem {
clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
};
// &hdptxphy_hdmi_clk0 {
// status = "okay";
// };
&hdptxphy_hdmi_clk0 {
status = "okay";
};
// &hdptxphy_hdmi_clk1 {
// status = "okay";
// };
&hdptxphy_hdmi_clk1 {
status = "okay";
};

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@@ -22,8 +22,8 @@
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
&gmac0_clkinout
&eth0_pins>;
tx_delay = <0x44>;
// rx_delay = <0x4f>;