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| Author | SHA1 | Date | |
|---|---|---|---|
|
18c4f8007c |
19
rk3568.dtsi
19
rk3568.dtsi
@@ -227,25 +227,6 @@
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};
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/* RK3568J cpu OPPs */
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opp-j-408000000 {
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opp-supported-hw = <0xfb 0xffff>;
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opp-hz = /bits/ 64 <408000000>;
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opp-microvolt = <850000 850000 1150000>;
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clock-latency-ns = <40000>;
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};
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opp-j-600000000 {
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opp-supported-hw = <0xfb 0xffff>;
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <850000 850000 1150000>;
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clock-latency-ns = <40000>;
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};
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opp-j-816000000 {
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opp-supported-hw = <0xfb 0xffff>;
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opp-hz = /bits/ 64 <816000000>;
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opp-microvolt = <850000 850000 1150000>;
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clock-latency-ns = <40000>;
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opp-suspend;
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};
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opp-j-1008000000 {
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opp-supported-hw = <0x04 0xffff>;
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opp-hz = /bits/ 64 <1008000000>;
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@@ -8,45 +8,41 @@
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//rk3568-evb1-ddr4-v10
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//#include "rk3568-evb1-ddr4-v10.dtsi"
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#include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi"
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#include "rk3568-evb-rpdzkj-rk809-pwm.dtsi"
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#include "../rk3568-linux.dtsi"
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/**************************pcie***********************/
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#include "zkzg-pcie-rk3568.dtsi"
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/*************************camera***********************/
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// #include "rp-camera-mipi-gc2093-single-2lane.dtsi"
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#include "rp-camera-mipi-gc2093-single-2lane.dtsi"
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/***************************************************/
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/*************************adc key***********************/
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// #include "rp-adc-key.dtsi"
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#include "rp-adc-key.dtsi"
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/***************************************************/
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/*************************gmac***********************/
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// #include "rp-gmac1-m1-pro-rk3568.dtsi"
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#include "rp-gmac0-pro-rk3568.dtsi"
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#include "rp-gmac1-m1-pro-rk3568.dtsi"
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/***************************************************/
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/*************************CAN**********************/
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// #include "rp-can0-m0-rk3568.dtsi"
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// #include "rp-can1-m1-rk3568.dtsi"
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// #include "rp-can2-m0-rk3568.dtsi"
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#include "zkzg-can-rk3568.dtsi"
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#include "rp-can0-m0-rk3568.dtsi"
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#include "rp-can1-m1-rk3568.dtsi"
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#include "rp-can2-m0-rk3568.dtsi"
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/**************************************************/
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/*********************PCIE**************************/
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// #include "rk3568-pcie2x1.dtsi"
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// #include "rk3568-pcie3x2.dtsi"
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#include "rk3568-pcie2x1.dtsi"
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#include "rk3568-pcie3x2.dtsi"
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/***************************************************/
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/*************************SATA***********************/
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// #include "rk3568-sata1.dtsi"
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#include "rk3568-sata1.dtsi"
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/***************************************************/
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// #include "lcd-gpio-dr4-rk3568.dtsi" //gpio config for lcd
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#include "lcd-gpio-dr4-rk3568.dtsi" //gpio config for lcd
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/****** LCD config reference **/
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/** single HDMI */
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@@ -66,7 +62,7 @@
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/** LVDS + HDMI */
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//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
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// #include "rp-lcd-lvds-10-1280-800-v2.dtsi"
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#include "rp-lcd-lvds-10-1280-800-v2.dtsi"
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//#include "rp-lcd-lvds-10-1280-800.dtsi"
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/** EDP + HDMI */
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@@ -89,7 +85,7 @@
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thermal-zone = "soc-thermal";
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threshold-temp = <60000>; //60C
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running-time = <10000>; //10s
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status = "disabled";
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status = "okay";
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};
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rp_power{
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@@ -113,10 +109,10 @@
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* };
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*/
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// led { //system led
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// gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
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// gpio_function = <3>;
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// };
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led { //system led
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gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
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gpio_function = <3>;
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};
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//fan { //fan
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// gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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@@ -131,49 +127,49 @@
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gpio_function = <4>;
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};
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// hub_rst { //usb hub
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// gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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// usb_pwr0 { //host0 power en
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// gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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// usb_pwr1 { //host1 power en
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// gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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// usb_pwr2 { //host2 power en
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// gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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// usb_pwr3 { //host3 power en
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// gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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// usb_pwr4 { //host4 power en
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// gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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hub_rst { //usb hub
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gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb_pwr0 { //host0 power en
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gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb_pwr1 { //host1 power en
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gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb_pwr2 { //host2 power en
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gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb_pwr3 { //host3 power en
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gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb_pwr4 { //host4 power en
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gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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// spk_en { //spk enable
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// gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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// spk_mute { //spk mute
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// gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
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// gpio_function = <4>;
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// };
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spk_en { //spk enable
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gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_mute { //spk mute
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gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>;
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gpio_function = <4>;
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};
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// vdd_3g { //4G module power en
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// gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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// };
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vdd_3g { //4G module power en
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gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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};
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rp_gpio{
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status = "disabled";
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status = "okay";
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compatible = "rp_gpio";
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/**
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@@ -268,17 +264,17 @@
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vccio3-supply = <&vccio_sd>;
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vccio4-supply = <&vcc_1v8>;
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vccio5-supply = <&vcc_3v3>;
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vccio6-supply = <&vcc_1v8>;
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vccio6-supply = <&vcc_3v3>;
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vccio7-supply = <&vcc_3v3>;
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};
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&i2c3 {
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status = "disabled";
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status = "okay";
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};
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&i2c5 {
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status = "disabled";
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status = "okay";
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rtc@51 {
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status = "okay";
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compatible = "rtc,hym8563";
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@@ -286,46 +282,48 @@
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart3 {
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status = "disabled";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart3m1_xfer>;
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};
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&uart4 {
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status = "disabled";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart4m0_xfer>;
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pinctrl-0 = <&uart4m1_xfer>;
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};
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&uart5 {
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status = "disabled";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart5m0_xfer>;
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};
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&uart6 {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&uart6m1_xfer>;
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pinctrl-0 = <&uart5m1_xfer>;
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};
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&uart7 {
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status = "disabled";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m1_xfer>;
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};
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&uart8 {
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status = "disabled";
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart8m0_xfer>;
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pinctrl-0 = <&uart8m1_xfer>;
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};
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&uart9 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart9m1_xfer>;
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};
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&spi0 {
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status = "disabled";
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status = "okay";
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/** redefine pins for cs1 used to be pwm5 */
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pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
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pinctrl-1 = <&spi0m0_cs0 &spi0m0_pins_hs>;
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@@ -338,22 +336,8 @@
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};
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};
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&spi1 {
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status = "okay";
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/** redefine pins for cs1 used to be pwm5 */
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pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
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pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins_hs>;
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spi_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&video_phy1 {
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status = "disabled";
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status = "okay";
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};
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/******** must be close,if not system no run ******/
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@@ -381,54 +365,48 @@
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* and if mutiple lcd used, we just use the backlight5, backlight10.
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*/
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/** LCD configuration */
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// #if defined(RP_SINGLE_LCD)
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#if defined(RP_SINGLE_LCD)
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// #if defined(RP_MIPI02LVDS)
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// &dsi0_panel {
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// enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
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// };
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// #if defined(RP_DUALLVDS)
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// // dual lvds donot need invert
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// &backlight4 {
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// pwms = <&pwm5 0 25000 0>;
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// };
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// #else
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// //pwm and enable pin may be inverted if use mipi to single lvds
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// &backlight4 {
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// pwms = <&pwm5 0 25000 1>;
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// };
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// #endif
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#if defined(RP_MIPI02LVDS)
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&dsi0_panel {
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enable-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_LOW>; //raw interface is inverse, so set to low
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};
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#if defined(RP_DUALLVDS)
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// dual lvds donot need invert
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&backlight4 {
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pwms = <&pwm5 0 25000 0>;
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};
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#else
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//pwm and enable pin may be inverted if use mipi to single lvds
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&backlight4 {
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pwms = <&pwm5 0 25000 1>;
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};
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#endif
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// #elif defined(RP_EDP_USED)
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// &backlight4 {
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// pwms = <&pwm10 0 25000 0>;
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// };
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// #endif
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#elif defined(RP_EDP_USED)
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&backlight4 {
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pwms = <&pwm10 0 25000 0>;
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};
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#endif
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// #else
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// &edp_panel {
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// backlight = <&backlight10>;
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// };
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// #ifdef RP_MIPI02LVDS
|
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// &dsi0_panel {
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// backlight = <&backlight5>;
|
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// };
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// #endif
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// #endif
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#else
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&edp_panel {
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backlight = <&backlight10>;
|
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};
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#ifdef RP_MIPI02LVDS
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&dsi0_panel {
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backlight = <&backlight5>;
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};
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#endif
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#endif
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/** Ethernet config*/
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// &gmac1 {
|
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// tx_delay = <0x49>;
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// rx_delay = <0x29>;
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// status = "okay";
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// };
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// &gmac0 {
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// tx_delay = <0x49>;
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// rx_delay = <0x29>;
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// status = "okay";
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// };
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&gmac1 {
|
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tx_delay = <0x49>;
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rx_delay = <0x29>;
|
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status = "okay";
|
||||
};
|
||||
|
||||
|
||||
/** headphone detect pin */
|
||||
@@ -449,7 +427,7 @@
|
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};
|
||||
|
||||
&sdmmc1 {
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
|
||||
max-frequency = <150000000>;
|
||||
supports-sdio;
|
||||
@@ -478,56 +456,60 @@
|
||||
BT,reset_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
/** pcie2x1 */
|
||||
&vcc3v3_pcie {
|
||||
/**
|
||||
* delete for gpio used to be bt_wake_host
|
||||
* and the vcc3v3_pcie need not control on our board.
|
||||
*/
|
||||
/delete-property/ gpio;
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
status = "okay";
|
||||
|
||||
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
|
||||
|
||||
/** pcie2x1 */
|
||||
// &vcc3v3_pcie {
|
||||
// /**
|
||||
// * delete for gpio used to be bt_wake_host
|
||||
// * and the vcc3v3_pcie need not control on our board.
|
||||
// */
|
||||
// /delete-property/ gpio;
|
||||
// };
|
||||
|
||||
// &pcie2x1 {
|
||||
// status = "disabled";
|
||||
|
||||
// reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
// };
|
||||
|
||||
|
||||
|
||||
/** pcie3x2 */
|
||||
// &pcie3x2 {
|
||||
// status = "disabled";
|
||||
// reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
// vpcie3v3-supply = <&vcc3v3_pcie3>;
|
||||
// };
|
||||
&pcie3x2 {
|
||||
status = "okay";
|
||||
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie3>;
|
||||
};
|
||||
|
||||
// &vcc3v3_pcie3 {
|
||||
// pinctrl-names = "default";
|
||||
// pinctrl-0 = <&pcie3_3v3>;
|
||||
// gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
&vcc3v3_pcie3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie3_3v3>;
|
||||
gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
// startup-delay-us = <8000>; //5000 is faild
|
||||
// };
|
||||
startup-delay-us = <8000>; //5000 is faild
|
||||
};
|
||||
|
||||
/** mipi camera config */
|
||||
// &vcc_camera {
|
||||
// gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
// pinctrl-names = "default";
|
||||
// pinctrl-0 = <&camera_en>;
|
||||
// };
|
||||
// &gc2093 {
|
||||
// pinctrl-names = "default";
|
||||
// pinctrl-0 = <&cif_clk>;
|
||||
// pinctrl-1 = <&camera_ctl>;
|
||||
// pwdn-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
// reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
|
||||
// };
|
||||
&vcc_camera {
|
||||
gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&camera_en>;
|
||||
};
|
||||
&gc2093 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&cif_clk>;
|
||||
pinctrl-1 = <&camera_ctl>;
|
||||
pwdn-gpios = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
|
||||
&pinctrl {
|
||||
@@ -570,20 +552,20 @@
|
||||
};
|
||||
};
|
||||
|
||||
// camera-pins {
|
||||
// camera_en: camera-en {
|
||||
// rockchip,pins =
|
||||
// /** gc2093 camera en */
|
||||
// <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
// };
|
||||
// camera_ctl: camera-ctl {
|
||||
// rockchip,pins =
|
||||
// /** gc2093 camera power down */
|
||||
// <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
// /** gc2093 camera reset */
|
||||
// <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
// };
|
||||
// };
|
||||
camera-pins {
|
||||
camera_en: camera-en {
|
||||
rockchip,pins =
|
||||
/** gc2093 camera en */
|
||||
<2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
camera_ctl: camera-ctl {
|
||||
rockchip,pins =
|
||||
/** gc2093 camera power down */
|
||||
<3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
/** gc2093 camera reset */
|
||||
<2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -594,5 +576,5 @@
|
||||
BT,reset_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -14,7 +14,7 @@
|
||||
#include <dt-bindings/pinctrl/rockchip.h>
|
||||
|
||||
|
||||
#include "../rk3568.dtsi"
|
||||
#include "../rk3566.dtsi"
|
||||
|
||||
/ {
|
||||
|
||||
@@ -131,7 +131,7 @@
|
||||
};
|
||||
|
||||
rk809_sound: rk809-sound {
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
compatible = "rockchip,multicodecs-card";
|
||||
rockchip,card-name = "rockchip-rk809";
|
||||
//hp-det-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
|
||||
@@ -188,7 +188,6 @@
|
||||
regulator-max-microvolt = <5000000>;
|
||||
vin-supply = <&dc_12v>;
|
||||
};
|
||||
|
||||
/*
|
||||
vcc5v0_usb: vcc5v0-usb {
|
||||
compatible = "regulator-fixed";
|
||||
@@ -367,7 +366,7 @@
|
||||
|
||||
|
||||
&i2c0 {
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
rk809: pmic@20 {
|
||||
compatible = "rockchip,rk809";
|
||||
reg = <0x20>;
|
||||
@@ -768,12 +767,12 @@
|
||||
*/
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
pmuio2-supply = <&vcc_3v3>;
|
||||
vccio1-supply = <&vcc_3v3>;
|
||||
vccio3-supply = <&vcc_3v3>;
|
||||
vccio4-supply = <&vcc_1v8>;
|
||||
pmuio2-supply = <&vcc3v3_pmu>;
|
||||
vccio1-supply = <&vccio_acodec>;
|
||||
vccio3-supply = <&vccio_sd>;
|
||||
vccio4-supply = <&vcc_3v3>;
|
||||
vccio5-supply = <&vcc_3v3>;
|
||||
vccio6-supply = <&vcc_1v8>;
|
||||
vccio6-supply = <&vcc_3v3>;
|
||||
vccio7-supply = <&vcc_3v3>;
|
||||
};
|
||||
|
||||
|
||||
@@ -1,30 +1,30 @@
|
||||
|
||||
&gmac0 {
|
||||
phy-mode = "rgmii";
|
||||
clock_in_out = "input";
|
||||
snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
/* Reset time is 20ms, 100ms for rtl8211f */
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
phy-mode = "rgmii";
|
||||
clock_in_out = "input";
|
||||
|
||||
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
|
||||
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
|
||||
assigned-clock-rates = <0>, <125000000>;
|
||||
snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
/* Reset time is 20ms, 100ms for rtl8211f */
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_miim
|
||||
&gmac0_tx_bus2
|
||||
&gmac0_rx_bus2
|
||||
&gmac0_rgmii_clk_level2
|
||||
&gmac0_rgmii_bus
|
||||
&gmac0_clkinout>;
|
||||
assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>, <&cru CLK_MAC0_OUT>;
|
||||
assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>, <&cru CLK_MAC0_2TOP>;
|
||||
assigned-clock-rates = <0>, <125000000>, <25000000>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac0_miim
|
||||
&gmac0_tx_bus2
|
||||
&gmac0_rx_bus2
|
||||
&gmac0_rgmii_clk
|
||||
&gmac0_rgmii_bus
|
||||
ð0_pins
|
||||
&gmac0_clkinout>;
|
||||
|
||||
tx_delay = <0x6e>;
|
||||
rx_delay = <0x3f>;
|
||||
|
||||
phy-handle = <&rgmii_phy0>;
|
||||
status = "okay";
|
||||
tx_delay = <0x2d>;
|
||||
rx_delay = <0x2c>;
|
||||
phy-handle = <&rgmii_phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
@@ -32,5 +32,6 @@
|
||||
rgmii_phy0: phy@0 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x0>;
|
||||
clocks = <&cru CLK_MAC0_OUT>;
|
||||
};
|
||||
};
|
||||
@@ -3,7 +3,7 @@
|
||||
phy-mode = "rgmii";
|
||||
clock_in_out = "input";
|
||||
|
||||
snps,reset-gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
/* Reset time is 20ms, 100ms for rtl8211f */
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
@@ -1,17 +0,0 @@
|
||||
&can0 {
|
||||
compatible = "rockchip,rk3568-can-2.0";
|
||||
assigned-clocks = <&cru CLK_CAN0>;
|
||||
assigned-clock-rates = <150000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0m1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&can1 {
|
||||
compatible = "rockchip,rk3568-can-2.0";
|
||||
assigned-clocks = <&cru CLK_CAN1>;
|
||||
assigned-clock-rates = <150000000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can1m1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
@@ -1,8 +0,0 @@
|
||||
&pcie30phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x2 {
|
||||
compatible = "rockchip,rk3568-pcie-ep";
|
||||
status = "okay";
|
||||
};
|
||||
58
rk3588/.dr4-rk3588.dtb.cmd
Normal file
58
rk3588/.dr4-rk3588.dtb.cmd
Normal file
@@ -0,0 +1,58 @@
|
||||
cmd_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := gcc -E -Wp,-MMD,arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.d.pre.tmp -nostdinc -I./scripts/dtc/include-prefixes -undef -D__DTS__ -x assembler-with-cpp -o arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.dts.tmp arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts ; ./scripts/dtc/dtc -O dtb -o arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb -b 0 -iarch/arm64/boot/dts/rockchip/rk3588/ -i./scripts/dtc/include-prefixes -Wno-interrupt_provider -@ -Wno-unit_address_vs_reg -Wno-unit_address_format -Wno-avoid_unnecessary_addr_size -Wno-alias_paths -Wno-graph_child_address -Wno-simple_bus_reg -Wno-unique_unit_address -Wno-pci_device_reg -d arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.d.dtc.tmp arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.dts.tmp ; cat arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.d.pre.tmp arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.d.dtc.tmp > arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.d
|
||||
|
||||
source_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts
|
||||
|
||||
deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-rk3588-board.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/usb/pd.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588j.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/phy/phy-snps-pcie3.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/clock/rk3588-cru.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/power/rk3588-power.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3588.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588s-pinctrl.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588s-pinconf.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-vccio3-pinctrl.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rockchip-pinconf.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-evb.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/display/rockchip_vop.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
|
||||
|
||||
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)
|
||||
|
||||
$(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb):
|
||||
1
rk3588/.dr4-rk3588.dtb.d.dtc.tmp
Normal file
1
rk3588/.dr4-rk3588.dtb.d.dtc.tmp
Normal file
@@ -0,0 +1 @@
|
||||
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: arch/arm64/boot/dts/rockchip/rk3588/.dr4-rk3588.dtb.dts.tmp
|
||||
50
rk3588/.dr4-rk3588.dtb.d.pre.tmp
Normal file
50
rk3588/.dr4-rk3588.dtb.d.pre.tmp
Normal file
@@ -0,0 +1,50 @@
|
||||
dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-rk3588-board.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/usb/pd.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588j.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/phy/phy-snps-pcie3.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/clock/rk3588-cru.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/arm-gic.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/interrupt-controller/irq.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/phy/phy.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/power/rk3588-power.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip,boot-mode.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/soc/rockchip-system-status.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/suspend/rockchip-rk3588.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/thermal/thermal.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588s-pinctrl.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/pinctrl/rockchip.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588s-pinconf.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-vccio3-pinctrl.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rockchip-pinconf.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-evb.dtsi \
|
||||
scripts/dtc/include-prefixes/dt-bindings/gpio/gpio.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/pwm/pwm.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/input/rk-input.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/display/drm_mipi_dsi.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/display/rockchip_vop.h \
|
||||
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi
|
||||
16029
rk3588/.dr4-rk3588.dtb.dts.tmp
Normal file
16029
rk3588/.dr4-rk3588.dtb.dts.tmp
Normal file
File diff suppressed because it is too large
Load Diff
BIN
rk3588/dr4-rk3588.dtb
Normal file
BIN
rk3588/dr4-rk3588.dtb
Normal file
Binary file not shown.
@@ -27,7 +27,7 @@
|
||||
#include "rp-wifi-bt-ap6275p-rk3588.dtsi"
|
||||
|
||||
/* hdmi rx */
|
||||
#include "rp-hdmirx.dtsi"
|
||||
// #include "rp-hdmirx.dtsi"
|
||||
|
||||
/* camera */
|
||||
/***********all camera config********/
|
||||
@@ -65,7 +65,7 @@
|
||||
#include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
|
||||
|
||||
/* lcd */
|
||||
#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
|
||||
// #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
|
||||
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
|
||||
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
|
||||
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
|
||||
|
||||
Reference in New Issue
Block a user