Compare commits
5 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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eb489d7a41 | ||
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d93093af17 | ||
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d0ceaee5c9 | ||
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1c3ffd507a | ||
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3ef84ea7c2 |
@@ -32,13 +32,11 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
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scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
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arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)
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@@ -28,10 +28,8 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
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scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
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arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi
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arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi
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@@ -14517,20 +14517,7 @@
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/delete-node/ &backlight;
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# 4 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi" 1
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&i2c6 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c6m0_xfer>;
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goodix_ts:goodix_ts@5d {
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status = "okay";
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compatible = "goodix,gt9xx";
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reg = <0x5d>;
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};
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};
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# 6 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi" 1
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@@ -14600,29 +14587,11 @@
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&usbhost3_0 {
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status = "okay";
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status = "disabled";
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};
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&usbhost_dwc3_0 {
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status = "okay";
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};
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&usbdrd_dwc3_0 {
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extcon=<&u2phy0>;
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status="okay";
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};
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&u2phy0 {
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status = "okay";
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};
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&usbdrd_dwc3_1 {
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extcon=<&u2phy1>;
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status="okay";
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};
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&u2phy1 {
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status = "okay";
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status = "disabled";
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};
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# 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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@@ -14738,37 +14707,6 @@
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};
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# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 64 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
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&hdmi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim2_tx1_scl &hdmim2_tx1_sda>;
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};
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&hdmi1_in_vp1 {
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status = "okay";
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};
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&hdmi1_sound {
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status = "okay";
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};
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&i2s6_8ch {
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status = "okay";
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};
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&hdptxphy_hdmi1 {
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status = "okay";
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};
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&route_hdmi1 {
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status = "okay";
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connect = <&vp1_out_hdmi1>;
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};
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# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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/ {
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model = "dr4-rk3588";
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@@ -14798,7 +14736,7 @@
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thermal-zone = "soc-thermal";
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threshold-temp = <60000>;
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running-time = <10000>;
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status = "disabled";
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status = "disable";
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};
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rp_power{
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@@ -14816,64 +14754,13 @@
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};
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rp_gpio{
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status = "disabled";
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compatible = "rp_gpio";
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gpio3c7 {
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gpio_num = <&gpio3 23 0>;
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gpio_function = <0>;
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};
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};
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m1_xfer>;
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fifo-depth =<4096>;
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rx-fifo-depth =<2048>;
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tx-fifo-depth =<2048>;
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dma-names = "tx", "rx";
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};
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&uart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart3m0_xfer>;
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fifo-depth =<4096>;
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rx-fifo-depth =<2048>;
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tx-fifo-depth =<2048>;
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dma-names = "tx", "rx";
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};
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&uart4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart4m1_xfer>;
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fifo-depth =<4096>;
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rx-fifo-depth =<2048>;
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tx-fifo-depth =<2048>;
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dma-names = "tx", "rx";
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};
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&uart5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart5m0_xfer>;
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fifo-depth =<4096>;
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rx-fifo-depth =<2048>;
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tx-fifo-depth =<2048>;
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dma-names = "tx", "rx";
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# 162 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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};
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&uart7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m0_xfer>;
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pinctrl-0 = <&uart7m1_xfer>;
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fifo-depth =<4096>;
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rx-fifo-depth =<2048>;
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tx-fifo-depth =<2048>;
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@@ -14890,6 +14777,16 @@
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dma-names = "tx", "rx";
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};
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&can0 {
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assigned-clocks = <&cru 112>;
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assigned-clock-rates = <200000000>;
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&can0m0_pins>;
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};
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&can1 {
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assigned-clocks = <&cru 114>;
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assigned-clock-rates = <200000000>;
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@@ -14897,22 +14794,9 @@
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pinctrl-names = "default";
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pinctrl-0 = <&can1m1_pins>;
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};
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&spi3 {
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status = "okay";
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pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
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spi3_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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# 225 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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&i2c4 {
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status = "disabled";
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status = "disable";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m1_xfer>;
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@@ -14931,6 +14815,7 @@
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};
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&sdmmc {
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status = "disabled";
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};
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@@ -14938,32 +14823,3 @@
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&fiq_debugger {
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rockchip,baudrate = <115200>;
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};
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&display_subsystem {
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clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
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clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
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};
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&hdptxphy_hdmi_clk0 {
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status = "okay";
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};
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&hdptxphy_hdmi_clk1 {
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status = "okay";
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};
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&pwm0 {
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status = "okay";
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compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm0m2_pins>;
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#pwm-cells = <3>;
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};
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&pwm13 {
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status = "okay";
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compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm13m2_pins>;
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#pwm-cells = <3>;
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};
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Binary file not shown.
@@ -2,7 +2,7 @@
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//#include "../rk3588-evb4-lp4-v10-linux.dts"
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#include "rp-rk3588-board.dtsi"
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#include "rp-tp-i2c6-gt911.dtsi"
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// #include "rp-tp-i2c6-gt911.dtsi"
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// #include "rd-rk3588-lcd-gpio.dtsi"
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#include "rpdzkj_config.dtsi"
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@@ -60,8 +60,8 @@
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//#include "rp-camera-dphy0-imx415.dtsi"
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/******************************************/
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|
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// #include "rp-lcd-hdmi0.dtsi" //batch ignore
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#include "rp-lcd-hdmi1.dtsi" //batch ignore
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//#include "rp-lcd-hdmi0.dtsi" //batch ignore
|
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//#include "rp-lcd-hdmi1.dtsi" //batch ignore
|
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//#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore
|
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// #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
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@@ -115,7 +115,7 @@
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||||
thermal-zone = "soc-thermal";
|
||||
threshold-temp = <60000>; //60C
|
||||
running-time = <10000>; //10s
|
||||
status = "disabled";
|
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status = "disable";
|
||||
};
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||||
|
||||
rp_power{
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@@ -150,63 +150,21 @@
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// };
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};
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rp_gpio{
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status = "disabled";
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compatible = "rp_gpio";
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gpio3c7 {
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gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
gpio_function = <0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4m1_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
// rp_gpio{
|
||||
// status = "okay";
|
||||
// compatible = "rp_gpio";
|
||||
|
||||
// gpio3c7 {
|
||||
// gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
// gpio_function = <0>;
|
||||
// };
|
||||
// };
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7m0_xfer>;
|
||||
pinctrl-0 = <&uart7m1_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
@@ -223,6 +181,16 @@
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
|
||||
&can0 {
|
||||
assigned-clocks = <&cru CLK_CAN0>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0m0_pins>;
|
||||
|
||||
};
|
||||
|
||||
&can1 {
|
||||
assigned-clocks = <&cru CLK_CAN1>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
@@ -231,21 +199,31 @@
|
||||
pinctrl-0 = <&can1m1_pins>;
|
||||
};
|
||||
|
||||
&spi3 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
|
||||
// &can2 {
|
||||
// assigned-clocks = <&cru CLK_CAN2>;
|
||||
// assigned-clock-rates = <200000000>;
|
||||
// status = "okay";
|
||||
// pinctrl-names = "default";
|
||||
// pinctrl-0 = <&can2m1_pins>;
|
||||
// };
|
||||
|
||||
spi3_dev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <12000000>;
|
||||
spi-lsb-first;
|
||||
};
|
||||
};
|
||||
// &spi3 {
|
||||
// // status = "disabled";
|
||||
// status = "okay";
|
||||
// max-freq = <48000000>;
|
||||
// dev-port = <1>;
|
||||
// pinctrl-0 = <&spi3m1_cs1 &spi3m1_pins>;
|
||||
// spidev0: spidev@00 {
|
||||
// status = "okay";
|
||||
// compatible = "rockchip,spidev";
|
||||
// reg = <0x00>;
|
||||
// spi-max-frequency = <48000000>;
|
||||
// };
|
||||
// };
|
||||
|
||||
|
||||
&i2c4 {
|
||||
status = "disabled";
|
||||
status = "disable";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c4m1_xfer>;
|
||||
|
||||
@@ -264,6 +242,7 @@
|
||||
|
||||
};
|
||||
|
||||
|
||||
&sdmmc {
|
||||
status = "disabled";
|
||||
};
|
||||
@@ -272,31 +251,15 @@
|
||||
rockchip,baudrate = <115200>;
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
|
||||
clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
|
||||
};
|
||||
// &display_subsystem {
|
||||
// clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
|
||||
// clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
|
||||
// };
|
||||
|
||||
&hdptxphy_hdmi_clk0 {
|
||||
status = "okay";
|
||||
};
|
||||
// &hdptxphy_hdmi_clk0 {
|
||||
// status = "okay";
|
||||
// };
|
||||
|
||||
&hdptxphy_hdmi_clk1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
status = "okay";
|
||||
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm0m2_pins>; // 选择 PWM1 的引脚复用
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
|
||||
&pwm13 {
|
||||
status = "okay";
|
||||
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm13m2_pins>; // 选择 PWM1 的引脚复用和UART1 M1引脚冲突了
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
// &hdptxphy_hdmi_clk1 {
|
||||
// status = "okay";
|
||||
// };
|
||||
|
||||
@@ -39,27 +39,10 @@
|
||||
|
||||
|
||||
&usbhost3_0 {
|
||||
status = "okay";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbhost_dwc3_0 {
|
||||
status = "okay";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_0 {
|
||||
extcon=<&u2phy0>;
|
||||
status="okay";
|
||||
};
|
||||
|
||||
&u2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_1 {
|
||||
extcon=<&u2phy1>;
|
||||
status="okay";
|
||||
};
|
||||
|
||||
&u2phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
Reference in New Issue
Block a user