取消一些不用的串口、添加SPI3

This commit is contained in:
zhangpeng 2025-06-18 16:57:01 +08:00
parent d0ceaee5c9
commit d93093af17
3 changed files with 29 additions and 167 deletions

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@ -14770,72 +14770,6 @@
# 162 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart7 {
status = "okay";
pinctrl-names = "default";
@ -14856,17 +14790,6 @@
dma-names = "tx", "rx";
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&can0 {
assigned-clocks = <&cru 112>;
@ -14884,7 +14807,22 @@
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
# 301 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 210 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
&spi3 {
status = "okay";
max-freq = <48000000>;
dev-port = <1>;
pinctrl-0 = <&spi3m1_cs1 &spi3m1_pins>;
spidev0: spidev@00 {
status = "okay";
compatible = "rockchip,spidev";
reg = <0x00>;
spi-max-frequency = <48000000>;
};
};
&i2c4 {
status = "disable";
pinctrl-names = "default";

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@ -161,72 +161,6 @@
// };
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart7 {
status = "okay";
pinctrl-names = "default";
@ -247,17 +181,6 @@
dma-names = "tx", "rx";
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&can0 {
assigned-clocks = <&cru CLK_CAN0>;
@ -284,18 +207,19 @@
// pinctrl-0 = <&can2m1_pins>;
// };
// &spi2 {
// // status = "disabled";
// status = "okay";
// max-freq = <48000000>;
// dev-port = <1>;
// spidev0: spidev@00 {
// status = "okay";
// compatible = "rockchip,spidev";
// reg = <0x00>;
// spi-max-frequency = <48000000>;
// };
// };
&spi3 {
// status = "disabled";
status = "okay";
max-freq = <48000000>;
dev-port = <1>;
pinctrl-0 = <&spi3m1_cs1 &spi3m1_pins>;
spidev0: spidev@00 {
status = "okay";
compatible = "rockchip,spidev";
reg = <0x00>;
spi-max-frequency = <48000000>;
};
};
&i2c4 {