注释掉了hdmirx

rk3588/.dr4-rk3588.dtb.cmd

@@ -32,10 +32,26 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
   scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
   arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
   arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
   arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
-  arch/arm64/boot/dts/rockchip/rk3588/zkzg-mipi.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
-  arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
   arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
+  arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
 
 arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)
 

rk3588/.dr4-rk3588.dtb.d.pre.tmp

@@ -28,7 +28,23 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
  scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
  arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
  arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
  arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
- arch/arm64/boot/dts/rockchip/rk3588/zkzg-mipi.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
- arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
- arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi
+ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
+ arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi

rk3588/dr4-rk3588.dts

@@ -2,33 +2,29 @@
 //#include "../rk3588-evb4-lp4-v10-linux.dts"
 #include "rp-rk3588-board.dtsi"
 
-// #include "rp-tp-i2c6-gt911.dtsi"
+#include "rp-tp-i2c6-gt911.dtsi"
-// #include "rd-rk3588-lcd-gpio.dtsi"
+#include "rd-rk3588-lcd-gpio.dtsi"
 
 #include "rpdzkj_config.dtsi"
 
 /* usb */
-// #include "rp-usb-typec-rk3588.dtsi"
+#include "rp-usb-typec-rk3588.dtsi"
-// #include "rp-usb-host.dtsi"
+#include "rp-usb-host.dtsi"
-
-/* mipi */
-#include "zkzg_mipi.dtsi"
 
 /* ethernet */
-// #include "rp-eth-pcie2gmac-rk3588.dtsi"
+#include "rp-eth-pcie2gmac-rk3588.dtsi"
-#include "rp-eth-gmac0.dtsi"
 #include "rp-eth-gmac1.dtsi"
 
 /* pcie */
-// #include "rp-pcie-power-rk3588.dtsi"
+#include "rp-pcie-power-rk3588.dtsi"
-// #include "rp-pcie3.dtsi" //need comment when use board of  make it youself,and remove the pcie function
+#include "rp-pcie3.dtsi" //need comment when use board of  make it youself,and remove the pcie function
-// #include "rp-pcie-5g.dtsi"
+#include "rp-pcie-5g.dtsi"
 
 /* audio */
-// #include "rp-audio-rt5640.dtsi"
+#include "rp-audio-rt5640.dtsi"
 
 /* wifi/bt */
-// #include "rp-wifi-bt-ap6275p-rk3588.dtsi"
+#include "rp-wifi-bt-ap6275p-rk3588.dtsi"
 
 /* hdmi rx */
 // #include "rp-hdmirx.dtsi"
@@ -37,9 +33,9 @@
 /***********all camera config********/
 
 //#include "rp-camera-dcphy0.dtsi"
-// #include "rp-camera-dcphy1.dtsi"
+#include "rp-camera-dcphy1.dtsi"
-// #include "rp-camera-dphy0.dtsi"
+#include "rp-camera-dphy0.dtsi"
-// #include "rp-camera-dphy1.dtsi"
+#include "rp-camera-dphy1.dtsi"
 
 //#include "rp-camera-dcphy0-ov13855.dtsi"
 //#include "rp-camera-dcphy1-ov13855.dtsi"
@@ -63,10 +59,10 @@
 //#include "rp-camera-dphy0-imx415.dtsi"
 /******************************************/
 
-// #include "rp-lcd-hdmi0.dtsi"        //batch ignore
+//#include "rp-lcd-hdmi0.dtsi"        //batch ignore
-// #include "rp-lcd-hdmi1.dtsi"        //batch ignore
+//#include "rp-lcd-hdmi1.dtsi"        //batch ignore
 //#include "rp-lcd-typec-dp0.dtsi"    //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore 
-// #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
+#include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
 
 /* lcd */
 // #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
@@ -118,7 +114,7 @@
             thermal-zone = "soc-thermal";
             threshold-temp = <60000>; //60C
             running-time = <10000>; //10s
-            status = "disabled";
+            status = "okay";
         };
 
         rp_power{
@@ -137,24 +133,24 @@
                 //        gpio_function = <4>;
                 //};
 
-                // led {
+                led {
-                //         gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
+                        gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
-                //         gpio_function = <3>;
+                        gpio_function = <3>;
-                // };
+                };
 
                 usb-host-power {
                         gpio_num = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
                         gpio_function = <4>;
                 };
 
-                // usb-hub-reset {
+                usb-hub-reset {
-                //         gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
+                        gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
-                //         gpio_function = <4>;
+                        gpio_function = <4>;
-                // };
+                };
     };
 
         rp_gpio{
-                status = "disabled";
+                status = "okay";
                 compatible = "rp_gpio";
 
                 gpio3c7 {
@@ -164,101 +160,49 @@
         };
 };
 
-&uart1 {
-	status = "disabled";
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart1m1_xfer>;
-	fifo-depth =<4096>;	
-	rx-fifo-depth =<2048>;
-	tx-fifo-depth =<2048>;
-		dma-names = "tx", "rx";
-};
 
-&uart3 {
+&uart0 {
-	status = "okay";
+    status = "okay";
-	pinctrl-names = "default";
+    pinctrl-names = "default";
-	pinctrl-0 = <&uart3m0_xfer>;
+    pinctrl-0 = <&uart0m0_xfer>;
-	fifo-depth =<4096>;	
-	rx-fifo-depth =<2048>;
-	tx-fifo-depth =<2048>;
-		dma-names = "tx", "rx";
-};
-
-&uart4 {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart4m1_xfer>;
-	fifo-depth =<4096>;	
-	rx-fifo-depth =<2048>;
-	tx-fifo-depth =<2048>;
-		dma-names = "tx", "rx";
-	
-};
-
-&uart5 {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&uart5m0_xfer>;
-	fifo-depth =<4096>;	
-	rx-fifo-depth =<2048>;
-	tx-fifo-depth =<2048>;
-		dma-names = "tx", "rx";
-	
 };
 
 &uart6 {
-	status = "okay";
+    status = "okay";
-	pinctrl-names = "default";
+    pinctrl-names = "default";
-	pinctrl-0 = <&uart6m1_xfer>;
+    pinctrl-0 = <&uart6m0_xfer>;
-	fifo-depth =<4096>;	
-	rx-fifo-depth =<2048>;
-	tx-fifo-depth =<2048>;
-	dma-names = "tx", "rx";
 };
 
 &uart7 {
-	status = "okay";
+    status = "okay";
-	pinctrl-names = "default";
+    pinctrl-names = "default";
-	pinctrl-0 = <&uart7m0_xfer>;
+    pinctrl-0 = <&uart7m1_xfer>;
-	fifo-depth =<4096>;	
-	rx-fifo-depth =<2048>;
-	tx-fifo-depth =<2048>;
-	dma-names = "tx", "rx";
 };
 
 &uart8 {
-	status = "disabled";
+    status = "okay";
-	pinctrl-names = "default";
+    pinctrl-names = "default";
-	pinctrl-0 = <&uart8m0_xfer>;
+    pinctrl-0 = <&uart8m0_xfer>;
-	fifo-depth =<4096>;	
+};
-	rx-fifo-depth =<2048>;
+
-	tx-fifo-depth =<2048>;
+&can0 {
-	dma-names = "tx", "rx";
+    assigned-clocks = <&cru CLK_CAN0>;
+    assigned-clock-rates = <200000000>;
+    status = "okay";
+    pinctrl-names = "default";
+    pinctrl-0 = <&can0m0_pins>;
 };
 
 &can1 {
-	assigned-clocks = <&cru CLK_CAN1>;
+    assigned-clocks = <&cru CLK_CAN1>;
-	assigned-clock-rates = <200000000>;
+    assigned-clock-rates = <200000000>;
-	status = "disabled";
+    status = "okay";
-	pinctrl-names = "default";
+    pinctrl-names = "default";
-	pinctrl-0 = <&can1m1_pins>;
+    pinctrl-0 = <&can1m1_pins>;
-}; 
-
-&spi3 {
-    status = "disabled";
-    pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
-    
-    spi3_dev@0 {
-        compatible = "rockchip,spidev";
-        reg = <0>;
-        spi-max-frequency = <12000000>;
-        spi-lsb-first;
-    };
 };
 
-
 &i2c4 {
-    status = "disabled";
+    status = "okay";
     pinctrl-names = "default";
     pinctrl-0 = <&i2c4m1_xfer>;
 
@@ -277,8 +221,9 @@
 
 };
 
+
 &sdmmc {
-    status = "disabled";
+    status = "okay";
 };
 
 &fiq_debugger {
@@ -286,58 +231,14 @@
 };
 
 &display_subsystem {
-    clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
+clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
-    clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
+clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
 };
 
 &hdptxphy_hdmi_clk0 {
-            status = "disabled";
+            status = "okay";
 };
 
 &hdptxphy_hdmi_clk1 {
-            status = "disabled";
+            status = "okay";
 };
-
-&pwm14 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm14m1_pins>;  // 选择 PWM1 的引脚复用
-    #pwm-cells = <3>;
-};
-
-&pwm15 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm15m1_pins>;  // 选择 PWM1 的引脚复用
-    #pwm-cells = <3>;
-};
-
-&pwm11 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm11m1_pins>; 
-    #pwm-cells = <3>;
-};
-
-&pwm13 {
-    status = "okay";
-    compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
-    pinctrl-names = "active";
-    pinctrl-0 = <&pwm13m1_pins>; 
-    #pwm-cells = <3>;
-};
-
-&i2c1 {
-  status = "okay";                    // 启用 I2C1 总线
-  pinctrl-names = "default";          // 引脚控制状态名称
-  pinctrl-0 = <&i2c1m2_xfer>;         // 使用 i2c1m2_xfer 引脚配置
-};
-
-&i2c2 {
-  status = "okay";                    // 启用 I2C2 总线
-  pinctrl-names = "default";          // 引脚控制状态名称
-  pinctrl-0 = <&i2c2m3_xfer>;         // 使用 i2c2m3_xfer 引脚配置
-};

rk3588/rp-eth-gmac0.dtsi

@@ -9,9 +9,9 @@
 &gmac0 {
     // Use rgmii-rxid mode to disable rx delay inside Soc
     phy-mode = "rgmii-rxid";
-    clock_in_out = "input";
+    clock_in_out = "output";
 
-    snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+    snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
     snps,reset-active-low;
     // Reset time is 20ms, 100ms for rtl8211f 
     snps,reset-delays-us = <0 20000 100000>;
@@ -21,9 +21,7 @@
              &gmac0_tx_bus2
              &gmac0_rx_bus2
              &gmac0_rgmii_clk
-             &gmac0_rgmii_bus
+             &gmac0_rgmii_bus>;
-            &gmac0_clkinout
-            &eth0_pins>;
 
     tx_delay = <0x44>;
     // rx_delay = <0x4f>; 

rk3588/rp-eth-gmac1.dtsi

@@ -12,7 +12,7 @@
     phy-mode = "rgmii-rxid";
     clock_in_out = "input";
 
-    snps,reset-gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_LOW>;
+    snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
     snps,reset-active-low;
     // Reset time is 20ms, 100ms for rtl8211f 
     snps,reset-delays-us = <0 20000 100000>;
@@ -23,8 +23,8 @@
              &gmac1_rx_bus2
              &gmac1_rgmii_clk
              &gmac1_rgmii_bus
-            &gmac1_clkinout>;
+            &gmac1_clkinout
-            // &eth1_pins>;
+            &eth1_pins>;
 
     tx_delay = <0x44>;
     // rx_delay = <0x4f>;

rk3588/rp-usb-host.dtsi

@@ -39,27 +39,10 @@
 
 
 &usbhost3_0 {
-    status = "okay";
+    status = "disabled";
 };
 
 &usbhost_dwc3_0 {
-    status = "okay";
+    status = "disabled";
 };
 
-&usbdrd_dwc3_0 {
-     extcon=<&u2phy0>;
-     status="okay";
-};
-  
-&u2phy0 {
-     status = "okay";
-};
-
-&usbdrd_dwc3_1 {
-     extcon=<&u2phy1>;
-     status="okay";
-};
-  
-&u2phy1 {
-     status = "okay";
-};

rk3588/zkzg-mipi.dtsi

@@ -1,133 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- *
- */
-
-&mipi_dcphy0 {
-	status = "okay";
-};
-
-&csi2_dcphy0 {
-	status = "okay";
-
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		port@0 {
-			reg = <0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			mipidcphy0_in_ucam0: endpoint@0 {
-				reg = <0>;
-				remote-endpoint = <&mvcam_out4>;
-				// 修改为 4 lane
-				data-lanes = <1 2 3 4>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			csidcphy0_out: endpoint@0 {
-				reg = <0>;
-				remote-endpoint = <&mipi0_csi2_input>;
-			};
-		};
-	};
-};
-
-&i2c7 {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c7m0_xfer>;
-
-	mvcam_4: mvcam@3b{
-		status = "okay";
-		compatible = "veye,mvcam";
-		reg = <0x3b>;
-		// 电源控制引脚
-		pwdn-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
-		// 新增复位引脚
-		reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>;
-		rockchip,camera-module-index = <0>;
-		rockchip,camera-module-facing = "back";
-		rockchip,camera-module-name = "NC";
-		rockchip,camera-module-lens-name = "NC";
-		port {
-			mvcam_out4: endpoint {
-				remote-endpoint = <&mipidcphy0_in_ucam0>;
-				// 修改为 4 lane
-				data-lanes = <1 2 3 4>;
-			};
-		};
-	};
-};
-
-&mipi0_csi2 {
-	status = "okay";
-
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			mipi0_csi2_input: endpoint@1 {
-				reg = <1>;
-				remote-endpoint = <&csidcphy0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			mipi0_csi2_output: endpoint@0 {
-				reg = <0>;
-				remote-endpoint = <&cif_mipi_in0>;
-			};
-		};
-	};
-};
-
-&rkcif_mipi_lvds {
-	status = "okay";
-
-	port {
-		cif_mipi_in0: endpoint {
-			remote-endpoint = <&mipi0_csi2_output>;
-		};
-	};
-};
-
-&rkcif_mipi_lvds_sditf {
-	status = "disabled";
-
-	port {
-		mipi_lvds_sditf: endpoint {
-			remote-endpoint = <&isp1_in1>;
-		};
-	};
-};
-
-&rkisp1_vir0 {
-	status = "disabled";
-
-	port {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		isp1_in1: endpoint@0 {
-			reg = <0>;
-			remote-endpoint = <&mipi_lvds_sditf>;
-		};
-	};
-};

rk3588/zkzg_mipi.dtsi

@@ -1,129 +0,0 @@
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
- *
- */
-
-&csi2_dcphy0 {
-	status = "okay";
-
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-		port@0 {
-			reg = <0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			mipidcphy0_in_ucam0: endpoint@0 {
-				reg = <0>;
-				remote-endpoint = <&mvcam_out4>;
-				data-lanes = <1 2 3 4>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			csidcphy0_out: endpoint@0 {
-				reg = <0>;
-				remote-endpoint = <&mipi0_csi2_input>;
-			};
-		};
-	};
-};
-
-&i2c7 {
-	status = "okay";
-	pinctrl-names = "default";
-	pinctrl-0 = <&i2c7m0_xfer>;
-
-	mvcam_4: mvcam@3b{
-		status = "okay";
-        compatible = "veye,mvcam";
-        reg = <0x3b>;
-		clocks = <&cru CLK_MIPI_CAMARAOUT_M2>;
-		clock-names = "xvclk";
-		power-domains = <&power RK3588_PD_VI>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&mipim0_camera2_clk>;
-		rockchip,grf = <&sys_grf>;
-		reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>;
-		pwdn-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
-		rockchip,camera-module-index = <0>;
-		rockchip,camera-module-facing = "back";
-		rockchip,camera-module-name = "NC";
-		rockchip,camera-module-lens-name = "NC";
-		port {
-			mvcam_out4: endpoint {
-				remote-endpoint = <&mipidcphy0_in_ucam0>;
-				data-lanes = <1 2 3 4>;
-			};
-		};
-	};
-};
-
-&mipi_dcphy0 {
-	status = "okay";
-};
-
-&mipi0_csi2 {
-	status = "okay";
-
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			// 修正这里：endpoint@0 和 reg = <0>
-			mipi0_csi2_input: endpoint@0 {
-				reg = <0>;
-				remote-endpoint = <&csidcphy0_out>;
-			};
-		};
-
-		port@1 {
-			reg = <1>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-
-			mipi0_csi2_output: endpoint@0 {
-				reg = <0>;
-				remote-endpoint = <&cif_mipi_in0>;
-			};
-		};
-	};
-};
-
-&rkcif {
-	status = "okay";
-};
-
-&rkcif_mmu {
-	status = "okay";
-};
-
-&rkcif_mipi_lvds {
-	status = "okay";
-
-	port {
-		cif_mipi_in0: endpoint {
-			remote-endpoint = <&mipi0_csi2_output>;
-		};
-	};
-};
-
-// 以下ISP相关配置可以保持disabled，先确保基础链路通
-&rkcif_mipi_lvds_sditf {
-	status = "disabled";
-};
-
-&rkisp1_vir0 {
-	status = "disabled";
-};