rockchip
This commit is contained in:
zhangpeng
854
rk3588-evb7-lp4.dtsi
Normal file
854
rk3588-evb7-lp4.dtsi
Normal file
@@ -0,0 +1,854 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
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*
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*/
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#include "dt-bindings/usb/pd.h"
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#include "rk3588.dtsi"
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#include "rk3588-evb.dtsi"
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#include "rk3588-rk806-single.dtsi"
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/ {
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/* If hdmirx node is disabled, delete the reserved-memory node here. */
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* Reserve 128MB memory for hdmirx-controller@fdee0000 */
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cma {
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compatible = "shared-dma-pool";
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reusable;
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reg = <0x0 (256 * 0x100000) 0x0 (128 * 0x100000)>;
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linux,cma-default;
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};
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};
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es8388_sound: es8388-sound {
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status = "okay";
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compatible = "rockchip,multicodecs-card";
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rockchip,card-name = "rockchip-es8388";
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hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
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io-channels = <&saradc 3>;
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io-channel-names = "adc-detect";
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keyup-threshold-microvolt = <1800000>;
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poll-interval = <100>;
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spk-con-gpio = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
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hp-con-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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rockchip,format = "i2s";
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rockchip,mclk-fs = <256>;
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rockchip,cpu = <&i2s0_8ch>;
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rockchip,codec = <&es8388>;
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rockchip,audio-routing =
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"Headphone", "LOUT1",
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"Headphone", "ROUT1",
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"Speaker", "LOUT2",
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"Speaker", "ROUT2",
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"Headphone", "Headphone Power",
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"Headphone", "Headphone Power",
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"Speaker", "Speaker Power",
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"Speaker", "Speaker Power",
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"LINPUT1", "Main Mic",
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"LINPUT2", "Main Mic",
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"RINPUT1", "Headset Mic",
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"RINPUT2", "Headset Mic";
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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play-pause-key {
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label = "playpause";
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linux,code = <KEY_PLAYPAUSE>;
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press-threshold-microvolt = <2000>;
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};
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};
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fan: pwm-fan {
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compatible = "pwm-fan";
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#cooling-cells = <2>;
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pwms = <&pwm3 0 50000 0>;
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cooling-levels = <0 50 100 150 200 255>;
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rockchip,temp-trips = <
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50000 1
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55000 2
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60000 3
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65000 4
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70000 5
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>;
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};
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hdmiin-sound {
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compatible = "rockchip,hdmi";
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rockchip,mclk-fs = <128>;
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rockchip,format = "i2s";
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rockchip,bitclock-master = <&hdmirx_ctrler>;
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rockchip,frame-master = <&hdmirx_ctrler>;
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rockchip,card-name = "rockchip,hdmiin";
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rockchip,cpu = <&i2s7_8ch>;
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rockchip,codec = <&hdmirx_ctrler 0>;
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rockchip,jack-det;
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};
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pcie20_avdd0v85: pcie20-avdd0v85 {
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compatible = "regulator-fixed";
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regulator-name = "pcie20_avdd0v85";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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vin-supply = <&vdd_0v85_s0>;
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};
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pcie20_avdd1v8: pcie20-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie20_avdd1v8";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&avcc_1v8_s0>;
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};
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pcie30_avdd0v75: pcie30-avdd0v75 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd0v75";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <750000>;
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vin-supply = <&avdd_0v75_s0>;
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};
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pcie30_avdd1v8: pcie30-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie30_avdd1v8";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&avcc_1v8_s0>;
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};
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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clocks = <&hym8563>;
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clock-names = "ext_clock";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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post-power-on-delay-ms = <200>;
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reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>;
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};
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rk_headset: rk-headset {
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status = "disabled";
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compatible = "rockchip_headset";
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headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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io-channels = <&saradc 3>;
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};
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vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v1_nldo_s3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1100000>;
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc5v0_sys>;
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};
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vcc3v3_lcd_n: vcc3v3-lcd0-n {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_lcd0_n";
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc_1v8_s0>;
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};
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vcc3v3_pcie30: vcc3v3-pcie30 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie30";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc5v0_host: vcc5v0-host {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_usb>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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};
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vcc_mipicsi0: vcc-mipicsi0-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipicsi0_pwr>;
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regulator-name = "vcc_mipicsi0";
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enable-active-high;
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};
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vcc_mipicsi1: vcc-mipicsi1-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipicsi1_pwr>;
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regulator-name = "vcc_mipicsi1";
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enable-active-high;
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};
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vcc_mipidcphy0: vcc-mipidcphy0-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipidcphy0_pwr>;
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regulator-name = "vcc_mipidcphy0";
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enable-active-high;
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};
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vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&sd_s0_pwr>;
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regulator-name = "vcc_3v3_sd_s0";
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enable-active-high;
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};
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wireless_bluetooth: wireless-bluetooth {
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compatible = "bluetooth-platdata";
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clocks = <&hym8563>;
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clock-names = "ext_clock";
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uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
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pinctrl-1 = <&uart9_gpios>;
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BT,reset_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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wifi_chip_type = "ap6398s";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>;
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WIFI,poweren_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&backlight {
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pwms = <&pwm1 0 25000 0>;
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status = "okay";
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};
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_ps {
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status = "okay";
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};
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&combphy2_psu {
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status = "okay";
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};
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&dp0 {
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pinctrl-names = "default";
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pinctrl-0 = <&vga_hpdin_l>;
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hpd-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&dp0_in_vp2 {
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status = "okay";
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};
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&dp1 {
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pinctrl-names = "default";
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pinctrl-0 = <&dp1m0_pins>;
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status = "okay";
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};
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&dp1_in_vp2 {
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status = "okay";
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};
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/*
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* mipi_dcphy0 needs to be enabled
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* when dsi0 is enabled
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*/
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&dsi0 {
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status = "okay";
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};
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&dsi0_in_vp2 {
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status = "disabled";
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};
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&dsi0_in_vp3 {
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status = "okay";
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};
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&dsi0_panel {
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power-supply = <&vcc3v3_lcd_n>;
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reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_rst_gpio>;
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};
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/*
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* mipi_dcphy1 needs to be enabled
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* when dsi1 is enabled
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*/
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&dsi1 {
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status = "disabled";
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};
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&dsi1_in_vp2 {
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status = "disabled";
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};
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&dsi1_in_vp3 {
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status = "disabled";
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};
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&dsi1_panel {
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power-supply = <&vcc3v3_lcd_n>;
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/*
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* because in hardware, the two screens share the reset pin,
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* so reset-gpios need only in dsi1 enable and dsi0 disabled
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* case.
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*/
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||||
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||||
//reset-gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
|
||||
//pinctrl-names = "default";
|
||||
//pinctrl-0 = <&lcd_rst_gpio>;
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||||
};
|
||||
|
||||
&gmac1 {
|
||||
/* Use rgmii-rxid mode to disable rx delay inside Soc */
|
||||
phy-mode = "rgmii-rxid";
|
||||
clock_in_out = "output";
|
||||
|
||||
snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
|
||||
snps,reset-active-low;
|
||||
/* Reset time is 20ms, 100ms for rtl8211f */
|
||||
snps,reset-delays-us = <0 20000 100000>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gmac1_miim
|
||||
&gmac1_tx_bus2
|
||||
&gmac1_rx_bus2
|
||||
&gmac1_rgmii_clk
|
||||
&gmac1_rgmii_bus>;
|
||||
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||||
tx_delay = <0x43>;
|
||||
/* rx_delay = <0x3f>; */
|
||||
|
||||
phy-handle = <&rgmii_phy>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi0 {
|
||||
enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi0_in_vp0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi0_sound {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi1 {
|
||||
enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi1_in_vp1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdmi1_sound {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* Should work with at least 128MB cma reserved above. */
|
||||
&hdmirx_ctrler {
|
||||
status = "okay";
|
||||
|
||||
#sound-dai-cells = <1>;
|
||||
/* Effective level used to trigger HPD: 0-low, 1-high */
|
||||
hpd-trigger-level = <1>;
|
||||
hdmirx-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmim1_rx &hdmirx_det>;
|
||||
};
|
||||
|
||||
&hdptxphy_hdmi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&hdptxphy_hdmi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0m2_xfer>;
|
||||
|
||||
vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 {
|
||||
compatible = "rockchip,rk8602";
|
||||
reg = <0x42>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
regulator-compatible = "rk860x-reg";
|
||||
regulator-name = "vdd_cpu_big0_s0";
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
rockchip,suspend-voltage-selector = <1>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
|
||||
vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 {
|
||||
compatible = "rockchip,rk8603";
|
||||
reg = <0x43>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
regulator-compatible = "rk860x-reg";
|
||||
regulator-name = "vdd_cpu_big1_s0";
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <1050000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
rockchip,suspend-voltage-selector = <1>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1m2_xfer>;
|
||||
|
||||
vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 {
|
||||
compatible = "rockchip,rk8602";
|
||||
reg = <0x42>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
regulator-compatible = "rk860x-reg";
|
||||
regulator-name = "vdd_npu_s0";
|
||||
regulator-min-microvolt = <550000>;
|
||||
regulator-max-microvolt = <950000>;
|
||||
regulator-ramp-delay = <2300>;
|
||||
rockchip,suspend-voltage-selector = <1>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-state-mem {
|
||||
regulator-off-in-suspend;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&i2c4m1_xfer>;
|
||||
|
||||
ls_stk3332: light@47 {
|
||||
compatible = "ls_stk3332";
|
||||
status = "disabled";
|
||||
reg = <0x47>;
|
||||
type = <SENSOR_TYPE_LIGHT>;
|
||||
irq_enable = <0>;
|
||||
als_threshold_high = <100>;
|
||||
als_threshold_low = <10>;
|
||||
als_ctrl_gain = <2>; /* 0:x1 1:x4 2:x16 3:x64 */
|
||||
poll_delay_ms = <100>;
|
||||
};
|
||||
|
||||
ps_stk3332: proximity@47 {
|
||||
compatible = "ps_stk3332";
|
||||
status = "disabled";
|
||||
reg = <0x47>;
|
||||
type = <SENSOR_TYPE_PROXIMITY>;
|
||||
//pinctrl-names = "default";
|
||||
//pinctrl-0 = <&gpio3_c6>;
|
||||
//irq-gpio = <&gpio3 RK_PC6 IRQ_TYPE_LEVEL_LOW>;
|
||||
//irq_enable = <1>;
|
||||
ps_threshold_high = <0x200>;
|
||||
ps_threshold_low = <0x100>;
|
||||
ps_ctrl_gain = <3>; /* 0:x1 1:x2 2:x5 3:x8 */
|
||||
ps_led_current = <4>; /* 0:3.125mA 1:6.25mA 2:12.5mA 3:25mA 4:50mA 5:100mA*/
|
||||
poll_delay_ms = <100>;
|
||||
};
|
||||
|
||||
icm42607_acc: icm_acc@68 {
|
||||
status = "okay";
|
||||
compatible = "icm42607_acc";
|
||||
reg = <0x68>;
|
||||
irq-gpio = <&gpio4 RK_PC2 IRQ_TYPE_EDGE_RISING>;
|
||||
irq_enable = <0>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_ACCEL>;
|
||||
layout = <0>;
|
||||
};
|
||||
|
||||
icm42607_gyro: icm_gyro@68 {
|
||||
status = "okay";
|
||||
compatible = "icm42607_gyro";
|
||||
reg = <0x68>;
|
||||
poll_delay_ms = <30>;
|
||||
type = <SENSOR_TYPE_GYROSCOPE>;
|
||||
layout = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
gt1x: gt1x@14 {
|
||||
compatible = "goodix,gt1x";
|
||||
reg = <0x14>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&touch_gpio>;
|
||||
goodix,rst-gpio = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
goodix,irq-gpio = <&gpio3 RK_PC0 IRQ_TYPE_LEVEL_LOW>;
|
||||
power-supply = <&vcc3v3_lcd_n>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
|
||||
hym8563: hym8563@51 {
|
||||
compatible = "haoyu,hym8563";
|
||||
reg = <0x51>;
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "hym8563";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hym8563_int>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
|
||||
wakeup-source;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
es8388: es8388@11 {
|
||||
status = "okay";
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "everest,es8388", "everest,es8323";
|
||||
reg = <0x11>;
|
||||
clocks = <&mclkout_i2s0>;
|
||||
clock-names = "mclk";
|
||||
assigned-clocks = <&mclkout_i2s0>;
|
||||
assigned-clock-rates = <12288000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2s0_mclk>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2s2_2ch {
|
||||
pinctrl-0 = <&i2s2m0_sclk &i2s2m0_lrck &i2s2m0_sdi &i2s2m0_sdo>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&i2s5_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s6_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2s7_8ch {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rgmii_phy: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
&mipi_dcphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mipi_dcphy1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie2x1l0 {
|
||||
reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x4 {
|
||||
reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pcie30x4_clkreqn_m1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
cam {
|
||||
mipicsi0_pwr: mipicsi0-pwr {
|
||||
rockchip,pins =
|
||||
/* camera power en */
|
||||
<1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
mipicsi1_pwr: mipicsi1-pwr {
|
||||
rockchip,pins =
|
||||
/* camera power en */
|
||||
<1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
mipidcphy0_pwr: mipidcphy0-pwr {
|
||||
rockchip,pins =
|
||||
/* camera power en */
|
||||
<2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
vga {
|
||||
vga_hpdin_l: vga-hpdin-l {
|
||||
rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
hdmi {
|
||||
hdmirx_det: hdmirx-det {
|
||||
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
headphone {
|
||||
hp_det: hp-det {
|
||||
rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
hym8563 {
|
||||
hym8563_int: hym8563-int {
|
||||
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd {
|
||||
lcd_rst_gpio: lcd-rst-gpio {
|
||||
rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
pcie30x4 {
|
||||
pcie30x4_clkreqn_m1: pcie30x4-clkreqn-m1 {
|
||||
rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
sdmmc {
|
||||
sd_s0_pwr: sd-s0-pwr {
|
||||
rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
touch {
|
||||
touch_gpio: touch-gpio {
|
||||
rockchip,pins =
|
||||
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>,
|
||||
<3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
};
|
||||
|
||||
usb {
|
||||
vcc5v0_host_en: vcc5v0-host-en {
|
||||
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
wireless-bluetooth {
|
||||
uart9_gpios: uart9-gpios {
|
||||
rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
bt_reset_gpio: bt-reset-gpio {
|
||||
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
bt_wake_gpio: bt-wake-gpio {
|
||||
rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
bt_irq_gpio: bt-irq-gpio {
|
||||
rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m1_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&route_dsi0 {
|
||||
status = "okay";
|
||||
connect = <&vp3_out_dsi0>;
|
||||
};
|
||||
|
||||
&route_dsi1 {
|
||||
status = "disabled";
|
||||
connect = <&vp3_out_dsi1>;
|
||||
};
|
||||
|
||||
&route_hdmi0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&route_hdmi1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sata0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdio {
|
||||
max-frequency = <150000000>;
|
||||
no-sd;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdiom0_pins>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vcc_3v3_sd_s0>;
|
||||
};
|
||||
|
||||
&uart9 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>;
|
||||
};
|
||||
|
||||
&u2phy0_otg {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy1_otg {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
};
|
||||
|
||||
&u2phy2_host {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
};
|
||||
|
||||
&u2phy3_host {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
};
|
||||
|
||||
&usbdp_phy0 {
|
||||
rockchip,dp-lane-mux = <2 3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy0_dp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy0_u3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy1 {
|
||||
rockchip,dp-lane-mux = <3 2 1 0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy1_dp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdp_phy1_u3 {
|
||||
maximum-speed = "high-speed";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_0 {
|
||||
dr_mode = "otg";
|
||||
extcon = <&u2phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_1 {
|
||||
dr_mode = "host";
|
||||
maximum-speed = "high-speed";
|
||||
status = "okay";
|
||||
};
|
||||
Reference in New Issue
Block a user