rockchip

2025-04-28 11:36:59 +08:00
commit 5dd7a8972b
945 changed files with 332963 additions and 0 deletions
--- a/rk3588/rp-camera-dcphy1-mipi-xs9922b.dtsi
+++ b/rk3588/rp-camera-dcphy1-mipi-xs9922b.dtsi
@@ -0,0 +1,152 @@
+
+&i2c2 {
+        status = "okay";
+        pinctrl-names = "default";
+        pinctrl-0 = <&i2c2m4_xfer>;
+
+
+        xs9922_1: xs9922@30 {
+                compatible = "xs9922";
+                status = "okay";
+                reg = <0x30>;
+                clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
+                clock-names = "xvclk";
+                power-domains = <&power RK3588_PD_VI>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&xs9922_pwr_1>;
+                reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+                power-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
+                //avdd-supply = <&vcc_avdd>;
+                //dovdd-supply = <&vcc_dovdd>;
+                //dvdd-supply = <&vcc_dvdd>;
+                rockchip,camera-module-index = <0>;
+                rockchip,camera-module-facing = "back";
+                rockchip,camera-module-name = "default";
+                rockchip,camera-module-lens-name = "default";
+                rockchip,default_rect= <1280 720>; 
+                port {
+                        ucam_out1: endpoint {
+                                remote-endpoint = <&mipi_in_ucam1>;
+                                data-lanes = <1 2 3 4>;
+                        };
+                };
+        };
+};
+
+&pinctrl {
+        xs9922 {
+                xs9922_pwr_1: camera-pwr_1 {
+                        rockchip,pins =
+                            <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
+                            <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
+                };
+        };
+};
+
+&mipi_dcphy1 {
+    status = "okay";
+};
+
+&csi2_dcphy1 {
+    status = "okay";
+
+    ports {
+        #address-cells = <1>;
+        #size-cells = <0>;
+    port@0 {
+            reg = <0>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            mipi_in_ucam1: endpoint@1 {
+                reg = <1>;
+                remote-endpoint = <&ucam_out1>;
+        data-lanes = <1 2 3 4>;
+            };
+        };
+
+        port@1 {
+            reg = <1>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            csidcphy1_out: endpoint@0 {
+                reg = <0>;
+                remote-endpoint = <&mipi1_csi2_input>;
+            };
+        };
+    };
+};
+
+&mipi1_csi2 {
+    status = "okay";
+
+    ports {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        port@0 {
+            reg = <0>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            mipi1_csi2_input: endpoint@0 {
+                reg = <0>;
+                remote-endpoint = <&csidcphy1_out>;
+            };
+        };
+
+        port@1 {
+            reg = <1>;
+            #address-cells = <1>;
+            #size-cells = <0>;
+
+            mipi1_csi2_output: endpoint@1 {
+                reg = <1>;
+                remote-endpoint = <&cif_mipi_in1>;
+            };
+        };
+    };
+};
+
+&rkcif_mipi_lvds1 {
+    status = "okay";
+
+    port {
+        cif_mipi_in1: endpoint {
+            remote-endpoint = <&mipi1_csi2_output>;
+        };
+    };
+};
+
+&rkcif_mipi_lvds1_sditf {
+    status = "okay";
+
+    port {
+        mipi_lvds1_sditf: endpoint {
+            remote-endpoint = <&isp1_vir0>;
+        };
+    };
+};
+
+&rkisp1 {
+    status = "okay";
+};
+
+&isp1_mmu {
+    status = "okay";
+};
+
+&rkisp1_vir0 {
+    status = "okay";
+    port {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        isp1_vir0: endpoint@0 {
+            reg = <0>;
+            remote-endpoint = <&mipi_lvds1_sditf>;
+        };
+    };
+};
+