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rockchip

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zhangpeng
2025-04-28 11:36:59 +08:00
commit 5dd7a8972b
945 changed files with 332963 additions and 0 deletions
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162
rk356x/rp-lcd-mipi0-10-1200-1920.dtsi Executable file
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#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <1000>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
// reset-delay-ms = <60>;
// init-delay-ms = <60>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
// unprepare-delay-ms = <60>;
// disable-delay-ms = <60>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
//MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <130000000>;
hactive = <1200>;
vactive = <1920>;
hback-porch = <30>;
hfront-porch = <60>;
vback-porch = <16>;
vfront-porch = <16>;
hsync-len = <10>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt9xx {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
gtp_resolution_x = <1200>;
gtp_resolution_y = <1920>;
gtp_int_tarigger = <1>;
gtp_change_x2y = <0>;
gtp_overturn_x = <0>;
gtp_overturn_y = <0>;
gtp_send_cfg = <1>;
gtp_touch_wakeup = <1>;
/**
* goodix_rst_gpio = <>;
* goodix_irq_gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
goodix,cfg-group0 = [
49 20 03 00 05 0A 35 00 01 06 23 08
37 2D 03 05 00 00 00 00 00 00 04 17
19 1D 14 90 30 AA 53 55 0C 08 00 00
00 01 03 1C 00 00 00 00 00 00 00 00
00 00 00 3C 78 94 D0 42 00 08 00 04
8E 40 00 85 4A 00 7F 55 00 7B 61 00
7A 70 00 7B 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04 01 00
FF FF FF FF FF FF FF FF FF FF 00 02
04 06 07 08 0A 0C 0D 0E 0F 10 11 12
13 14 2A 29 28 27 26 25 24 23 22 21
20 1F 1E 1C 1B 19 FF FF FF FF FF FF
FF FF FF FF 24 01
];
goodix,cfg-group2 = [
49 20 03 00 05 0A 35 00 01 06 23 08
37 2D 03 05 00 00 00 00 00 00 04 17
19 1D 14 90 30 AA 53 55 0C 08 00 00
00 01 03 1C 00 00 00 00 00 00 00 00
00 00 00 3C 78 94 D0 42 00 08 00 04
8E 40 00 85 4A 00 7F 55 00 7B 61 00
7A 70 00 7B 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 19 18 17 16 15 14 11 10
0F 0E 0D 0C 09 08 07 06 05 04 01 00
FF FF FF FF FF FF FF FF FF FF 00 02
04 06 07 08 0A 0C 0D 0E 0F 10 11 12
13 14 2A 29 28 27 26 25 24 23 22 21
20 1F 1E 1C 1B 19 FF FF FF FF FF FF
FF FF FF FF 24 01
];
};