rockchip
This commit is contained in:
zhangpeng
510
rk356x/nano-rk3566.dts
Executable file
510
rk356x/nano-rk3566.dts
Executable file
@@ -0,0 +1,510 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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//rk3566-evb1-ddr4-v10
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//#include "rk3566-evb1-ddr4-v10.dtsi"
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//#include "rk3566-base-no-rk809.dtsi"
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#include "rk3566-evb-rpdzkj-pwm-pwm.dtsi"
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#include "../rk3568-linux.dtsi"
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/*************************adc key***********************/
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#include "rp-adc-key.dtsi"
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/***************************************************/
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/*************************gmac***********************/
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#include "rp-gmac1-m0-pro-rk3566.dtsi"
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/***************************************************/
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/*************************pcie***********************/
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#include "rk3568-pcie2x1.dtsi"
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/***************************************************/
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#include "rp-audio-es8311.dtsi"
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/***************** SINGLE LCD (LCD + HDMI) ****************/
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#include "lcd-gpio-nano-rk3566.dtsi"
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/* HDMI only */
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//#include "rp-lcd-hdmi.dtsi"
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/** MIPI DSI0 */
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//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
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#include "rp-lcd-mipi0-7-720-1280.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
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/** MIPI1toLVDS + HDMI */
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//#include "rp-lcd-mipi1tolvds-gm8775c-10-1024-600-raw.dtsi"
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//#include "rp-lcd-mipi1tolvds-gm8775c-1920-1080.dtsi"
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/** LVDS + HDMI */
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//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
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//#include "rp-lcd-lvds-10-1280-800.dtsi"
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/** EDP */
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//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
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/ {
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model = "nano-rk3566";
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compatible = "rpdzkj,nano-rk3566", "rockchip,rk3566";
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fan_gpio_control {
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compatible = "fan_gpio_control";
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gpio-pin = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
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thermal-zone = "soc-thermal";
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threshold-temp = <60000>; //60C
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running-time = <10000>; //10s
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status = "okay";
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};
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rp_power{
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status = "okay";
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compatible = "rp_power";
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rp_not_deep_sleep = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&led_pin &fan_pin &usb_pins>;
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//#define GPIO_FUNCTION_OUTPUT 0
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//#define GPIO_FUNCTION_INPUT 1
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//#define GPIO_FUNCTION_IRQ 2
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//#define GPIO_FUNCTION_FLASH 3
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//#define GPIO_FUNCTION_OUTPUT_CTRL 4
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/**
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* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
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* gpio_num = <>; // gpio you want ot control
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* gpio_function = <>; // function of current gpio, refer to above define.
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* };
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*/
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/******* sytem power en pin, donnot change it only if you know what you are doing */
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led { //system led
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gpio_num = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
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gpio_function = <3>;
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};
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//fan { //fan en
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// gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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//};
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otg_power { //usb otg power
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gpio_num = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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hub_rst { //usb hub
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gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb3_pwr { //usb3 power en
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gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb2_vdd0 { //usb2.0_vdd0 power en
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gpio_num = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb2_vdd1 { //usb2.0_vdd1 power en
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gpio_num = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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vdd_4g { //4g enable
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gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_en { //spk enable
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gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_mute { //spk mute
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gpio_num = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
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gpio_function = <4>;
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};
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};
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rp_gpio{
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status = "okay";
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compatible = "rp_gpio";
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gpio3d3 {
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gpio_num = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio3d4 {
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gpio_num = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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/***** gpio, add you want to control as blow */
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};
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rp-keys {
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compatible = "rp-keys";
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status = "disabled";
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name = "rp-keys";
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gpio3d3 {
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gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
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};
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gpio3d4 {
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label = "gpiokey3d4";
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gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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debounce_interval = <10>;
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wakeup;
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press_type = <0>;
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code = <KEY_ENTER>;
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};
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};
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stm706 {
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status = "okay";
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compatible = "stm706";
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reset_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
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wdt_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
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};
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/** 24M osc clock to mcp2515 */
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osc_24m: osc24m {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <24000000>;
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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};
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/** stm706 watchdog pinctrl clash **/
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&rk_headset {
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status = "disabled";
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};
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&vcc3v3_sd {
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_sd_pin>;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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};
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&vcc5v0_sys {
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enable-active-high;
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gpio = <&gpio3 RK_PD0 GPIO_ACTIVE_HIGH>;
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pinctrl-0 = <&vcc5v0_pin>;
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};
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&pwm7 {
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/** disable for used to be led control */
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status = "disabled";
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};
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/*
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* There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7].
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* 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured;
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* 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages
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* must be consistent with the software configuration correspondingly
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* a/ When the hardware IO level is connected to 1.8V, the software voltage configuration
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* should also be configured to 1.8V accordingly;
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* b/ When the hardware IO level is connected to 3.3V, the software voltage configuration
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* should also be configured to 3.3V accordingly;
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* 3/ VCCIO2 voltage control selection (0xFDC20140)
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* BIT[0]: 0x0: from GPIO_0A7 (default)
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* BIT[0]: 0x1: from GRF
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* Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7:
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* L:VCCIO2 must supply 3.3V
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* H:VCCIO2 must supply 1.8V
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*/
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&pmu_io_domains {
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status = "okay";
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pmuio2-supply = <&vcc3v3_pmu>;
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vccio1-supply = <&vcc_3v3>;
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vccio3-supply = <&vccio_sd>;
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vccio4-supply = <&vccio_wl>;
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vccio5-supply = <&vcc_3v3>;
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vccio6-supply = <&vcc_1v8>;
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vccio7-supply = <&vcc_3v3>;
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};
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&i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_xfer>;
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rtc@51 {
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status = "okay";
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compatible = "rtc,hym8563";
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reg = <0x51>;
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// irq_gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
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};
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};
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&i2c1 {
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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&i2c5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5m0_xfer>;
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};
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&gmac1 {
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status = "okay";
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snps,reset-gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus
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&gmac1m1_clkinout
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ð1m1_pins>;
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tx_delay = <0x49>;
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rx_delay = <0x2d>;
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};
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&uart0 {
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status = "disbled";
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};
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&uart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart3m1_xfer>;
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};
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&uart4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart4m1_xfer>;
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};
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&uart5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart5m1_xfer>;
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};
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&uart7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m1_xfer>;
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};
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&spi0 {
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status = "okay";
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/* rewrite pinctrl, for cs1 used to be gpio */
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pinctrl-0 = <&spi0m0_cs0 &spi0m0_pins>;
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pinctrl-1 = <&spi0m0_cs0 &spi0m0_pins_hs>;
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spi0_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&spi3 {
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status = "okay";
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/* rewrite pinctrl for cs1 used to be camera clk */
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pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>;
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pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>;
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spi3can: mcp2515@0 {
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status = "okay";
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compatible = "microchip,mcp2515";
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reg = <0>;
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clocks = <&osc_24m>;
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interrupt-parent = <&gpio4>;
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interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
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// vdd-supply = <®5v0>;
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// xceiver-supply = <®5v0>;
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spi-max-frequency = <10000000>;
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};
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};
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/***************************************************/
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&dmc {
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status = "disabled";
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};
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&dfi {
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status = "disabled";
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};
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/** LCD backlight
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* By default, we all use backlight4 node whether it is mipi, lvds or edp,
|
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*/
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/** LCD configuration */
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#if defined(RP_SINGLE_LCD)
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#if defined(RP_MIPI12LVDS)
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&backlight4 {
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pwms = <&pwm5 0 25000 1>;
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};
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#if defined(RP_DUALLVDS)
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&backlight4 {
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pwms = <&pwm5 0 25000 0>;
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};
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#endif
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#endif
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#endif
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/** wifi/bt config */
|
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&sdio_pwrseq {
|
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pinctrl-0 = <&wifi_enable_h>;
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reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
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||||
&sdmmc2 {
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status = "disabled";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
max-frequency = <150000000>;
|
||||
supports-sdio;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&wireless_wlan {
|
||||
assigned-clocks = <&pmucru CLK_WIFI>;
|
||||
assigned-clock-rates = <24000000>;
|
||||
clocks = <&pmucru CLK_WIFI>;
|
||||
clock-names = "soc_24M";
|
||||
pinctrl-0 = <&wifi_host_wake_irq &clk32k_out1>;
|
||||
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&wireless_bluetooth {
|
||||
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-0 = <&uart1m0_rtsn>;
|
||||
pinctrl-1 = <&uart1_gpios>;
|
||||
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
|
||||
/** pcie2x1 configuration */
|
||||
&pcie2x1 {
|
||||
status = "okay";
|
||||
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
|
||||
&pinctrl {
|
||||
power_pins {
|
||||
vcc3v3_sd_pin: vcc3v3_sd_pin {
|
||||
rockchip,pins =
|
||||
<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
vcc5v0_pin: vcc5v0-pin {
|
||||
rockchip,pins =
|
||||
<3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
led_pin: led-pin {
|
||||
rockchip,pins =
|
||||
<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
fan_pin: fan-pin {
|
||||
rockchip,pins =
|
||||
<0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
usb_pins: usb-pins {
|
||||
rockchip,pins =
|
||||
/* otg power en */
|
||||
<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
/* hub reset pin */
|
||||
<3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
/* usb3.0 power en */
|
||||
<0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
/* usb2.0 vdd0 en */
|
||||
<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
|
||||
/* usb2.0 vdd1 en */
|
||||
<0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq { //redefine sdio power pin
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan { //redefine wlaD4wake host pin
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <2 RK_PB2 0 &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <2 RK_PB5 0 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Reference in New Issue
Block a user