rockchip
This commit is contained in:
361
rk356x/mini-pc-rk3566.dts
Executable file
361
rk356x/mini-pc-rk3566.dts
Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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//rk3566-evb1-ddr4-v10
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//#include "rk3566-evb1-ddr4-v10.dtsi"
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#include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi"
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#include "../rk3568-linux.dtsi"
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/*************************camera***********************/
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#include "rp-mipi-camera-gc2093-rk3566.dtsi"
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/***************************************************/
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/*************************adc key***********************/
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#include "rp-adc-key.dtsi"
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/***************************************************/
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/*************************gmac***********************/
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#include "rp-gmac1-m0-pro-rk3566.dtsi"
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/***************************************************/
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/****************** SINGLE LCD ***************/
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#include "pro-rk3566-single-lcd-gpio.dtsi"
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/* HDMI */
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#include "rp-lcd-hdmi.dtsi"
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/* MIPI0 */
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//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
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//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
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//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
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//#include "rp-lcd-mipi0-7-1024-600.dtsi"
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//#include "rp-lcd-mipi0-7-720-1280.dtsi"
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//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
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/* MIPI1 */
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//#include "rp-lcd-mipi1-7-1024-600.dtsi"
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/* LVDS */
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//#include "rp-lcd-lvds-10-1024-600.dtsi"
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//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
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//#include "rp-lcd-lvds-10-1280-800.dtsi"
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/* EDP */
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//#include "rp-lcd-edp-13-1920-1080.dtsi"
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/ {
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model = "mini-pc-rk3566";
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compatible = "rpdzkj,mini-pc-rk3566", "rockchip,rk3566";
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rp_power{
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status = "okay";
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compatible = "rp_power";
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rp_not_deep_sleep = <1>;
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//#define GPIO_FUNCTION_OUTPUT 0
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//#define GPIO_FUNCTION_INPUT 1
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//#define GPIO_FUNCTION_IRQ 2
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//#define GPIO_FUNCTION_FLASH 3
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//#define GPIO_FUNCTION_OUTPUT_CTRL 4
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led { //system led
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gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
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gpio_function = <3>;
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};
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usb_pwr { //usb host power and otg power
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gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb_otg_pwr { //
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gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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gpio_function = <4>;
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};
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};
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rp_gpio{
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status = "okay";
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compatible = "rp_gpio";
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io4_c4 { //
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gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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test-power {
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/** disable for use rk809-battery */
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status = "okay";
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};
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};
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&pmu_io_domains {
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status = "okay";
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pmuio2-supply = <&vcc3v3_pmu>;
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vccio1-supply = <&vccio_acodec>;
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vccio3-supply = <&vccio_sd>;
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vccio4-supply = <&vcc_3v3>;
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vccio5-supply = <&vcc_3v3>;
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vccio6-supply = <&vcc_1v8>;
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vccio7-supply = <&vcc_3v3>;
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};
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&cpu0_opp_table {
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opp-408000000 {
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opp-hz = /bits/ 64 <408000000>;
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opp-microvolt = <825000 825000 1150000>;
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opp-microvolt-L0 = <825000 825000 1150000>;
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opp-microvolt-L1 = <800000 800000 1150000>;
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opp-microvolt-L2 = <800000 800000 1150000>;
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clock-latency-ns = <40000>;
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};
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opp-600000000 {
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opp-hz = /bits/ 64 <600000000>;
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opp-microvolt = <850000 850000 1150000>;
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opp-microvolt-L0 = <850000 850000 1150000>;
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opp-microvolt-L1 = <825000 825000 1150000>;
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opp-microvolt-L2 = <825000 825000 1150000>;
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clock-latency-ns = <40000>;
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};
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opp-816000000 {
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opp-hz = /bits/ 64 <816000000>;
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opp-microvolt = <900000 900000 1150000>;
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opp-microvolt-L0 = <900000 900000 1150000>;
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opp-microvolt-L1 = <875000 875000 1150000>;
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opp-microvolt-L2 = <850000 850000 1150000>;
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clock-latency-ns = <40000>;
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opp-suspend;
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};
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opp-1104000000 {
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opp-hz = /bits/ 64 <1104000000>;
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opp-microvolt = <950000 950000 1150000>;
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opp-microvolt-L0 = <950000 950000 1150000>;
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opp-microvolt-L1 = <925000 925000 1150000>;
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opp-microvolt-L2 = <900000 900000 1150000>;
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clock-latency-ns = <40000>;
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};
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opp-1416000000 {
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opp-hz = /bits/ 64 <1416000000>;
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opp-microvolt = <1000000 1000000 1150000>;
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opp-microvolt-L0 = <1000000 1000000 1150000>;
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opp-microvolt-L1 = <975000 975000 1150000>;
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opp-microvolt-L2 = <950000 950000 1150000>;
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clock-latency-ns = <40000>;
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};
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opp-1608000000 {
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opp-hz = /bits/ 64 <1608000000>;
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opp-microvolt = <1050000 1050000 1150000>;
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opp-microvolt-L0 = <1050000 1050000 1150000>;
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opp-microvolt-L1 = <1025000 1025000 1150000>;
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opp-microvolt-L2 = <1025000 1025000 1150000>;
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clock-latency-ns = <40000>;
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};
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opp-1800000000 {
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opp-hz = /bits/ 64 <1800000000>;
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opp-microvolt = <1100000 1100000 1150000>;
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opp-microvolt-L0 = <1100000 1100000 1150000>;
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opp-microvolt-L1 = <1075000 1075000 1150000>;
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opp-microvolt-L2 = <1075000 1075000 1150000>;
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clock-latency-ns = <40000>;
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};
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};
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&i2c1 {
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status = "okay";
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};
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&i2c4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m1_xfer>;
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rtc@51 {
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status = "okay";
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compatible = "rtc,hym8563";
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reg = <0x51>;
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};
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};
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&uart6 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart6m0_xfer>;
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};
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&uart7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m0_xfer>;
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};
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&uart9 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart9m0_xfer>;
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};
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&spi1 {
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status = "okay";
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spi1_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&spi2 {
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status = "okay";
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spi2_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&spi3 {
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status = "okay";
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pinctrl-names = "default", "high_speed";
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pinctrl-0 = <&spi3m1_cs0 /*&spi3m1_cs1*/ &spi3m1_pins>;
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pinctrl-1 = <&spi3m1_cs0 /*&spi3m1_cs1*/ &spi3m1_pins_hs>;
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spi3_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&edp {
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/** delete hdp gpio that pro3566 donot use */
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/delete-property/ hpd-gpios;
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};
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&dmc {
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status = "disabled";
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};
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&dfi {
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status = "disabled";
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};
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&sdmmc2 {
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max-frequency = <150000000>;
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supports-sdio;
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bus-width = <4>;
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disable-wp;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
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sd-uhs-sdr104;
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status = "okay";
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
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};
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&wireless_bluetooth {
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uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default", "rts_gpio";
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pinctrl-0 = <&uart1m1_rtsn>;
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pinctrl-1 = <&uart1_gpios>;
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BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&wireless_wlan {
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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};
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&rk_headset {
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status = "okay";
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headset_force_flag = <1>;
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};
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&pinctrl {
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wireless-wlan {
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wifi_host_wake_irq: wifi-host-wake-irq {
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rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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wireless-bluetooth {
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uart1_gpios: uart1-gpios {
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rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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