rockchip
This commit is contained in:
zhangpeng
424
rk356x/lga-rk3568.dts
Executable file
424
rk356x/lga-rk3568.dts
Executable file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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//rk3568-evb1-ddr4-v10
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//#include "rk3568-evb1-ddr4-v10.dtsi"
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#include "rk3568-evb-rpdzkj-rk809-syr837.dtsi"
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#include "../rk3568-linux.dtsi"
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/*************************camera***********************/
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//#include "rp-mipi-camera-gc2093-rk3568.dtsi"
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#include "rp-mipi-camera-gc2093-imx334-imx415-rk3568.dtsi"
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/***************************************************/
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/*************************adc key***********************/
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#include "rp-adc-key.dtsi"
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/***************************************************/
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/*************************gmac***********************/
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#include "rp-gmac0-pro-rk3568.dtsi"
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#include "rp-gmac1-m1-pro-rk3568.dtsi"
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/***************************************************/
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/*************************CAN**********************/
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#include "rp-can1-m1-rk3568.dtsi"
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#include "rp-can2-m0-rk3568.dtsi"
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/**************************************************/
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/*********************PCIE**************************/
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#include "rk3568-pcie3x1x1.dtsi"
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/*************************SATA***********************/
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#include "rk3568-sata2.dtsi"
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/***************************************************/
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/***************** SINGLE LCD (LCD + HDMI) ****************/
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#include "lga-rk3568-single-lcd-gpio.dtsi" // gpio config of lcd
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/* HDMI */
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//#include "rp-lcd-hdmi.dtsi"
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/* MIPI DSI0 */
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//#include "rp-lcd-mipi0-5-720-1280.dtsi"
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//#include "rp-lcd-mipi0-5-720-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
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//#include "rp-lcd-mipi0-5.5-720-1280.dtsi"
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//#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-5.5-1080-1920.dtsi"
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#include "rp-lcd-mipi0-7-1024-600.dtsi"
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//#include "rp-lcd-mipi0-7-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280-v2.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-10-1920-1200.dtsi"
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/* MIPI DSI1 */
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//#include "rp-lcd-mipi1-7-1024-600.dtsi"
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//#include "rp-lcd-mipi1-7-1200-1920.dtsi"
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/* LVDS */
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//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
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//#include "rp-lcd-lvds-10-1024-600.dtsi"
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/* EDP */
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//#include "rp-lcd-edp-13-1920-1080.dtsi"
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//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
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/{
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model = "lga-rk3568";
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compatible = "rpdzkj,lga-rk3568-v10", "rockchip,rk3568";
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fan_gpio_control {
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compatible = "fan_gpio_control";
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gpio-pin = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
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thermal-zone = "soc-thermal";
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threshold-temp = <60000>; //60C
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running-time = <10000>; //10s
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status = "okay";
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};
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vcc3v3_pi6c: vcc3v3_pi6c { //pcie3 clk enable for m.2
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pi6c";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_clk_control>;
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};
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rp_power{
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status = "okay";
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compatible = "rp_power";
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rp_not_deep_sleep = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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pinctrl-1 = <&vcc5v0_otg_en>;
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//#define GPIO_FUNCTION_OUTPUT 0
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//#define GPIO_FUNCTION_INPUT 1
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//#define GPIO_FUNCTION_IRQ 2
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//#define GPIO_FUNCTION_FLASH 3
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//#define GPIO_FUNCTION_OUTPUT_CTRL 4
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led { //system led
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gpio_num = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>;
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gpio_function = <3>;
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};
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/*
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fan { //fan
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gpio_num = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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*/
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usb_pwr { //usb power
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gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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hub_rst { //usb hub
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gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
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gpio_function = <4>;
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};
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otg_mode { //OTG SWITCH
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gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>;
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gpio_function = <0>;
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};
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otg_power { //usb otg power
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gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_en { //spk enable
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gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_mute { //spk mute
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gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>;
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gpio_function = <4>;
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};
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vdd_4g { //4g power
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gpio_num = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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};
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rp_gpio{
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status = "okay";
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compatible = "rp_gpio";
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gpio0b0 {
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gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio0b7 {
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gpio_num = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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};
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&pmu_io_domains {
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status = "okay";
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pmuio2-supply = <&vcc3v3_pmu>;
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vccio1-supply = <&vccio_acodec>;
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vccio3-supply = <&vccio_sd>;
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vccio4-supply = <&vcc_1v8>;
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vccio5-supply = <&vcc_3v3>;
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vccio6-supply = <&vcc_1v8>;
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vccio7-supply = <&vcc_3v3>;
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};
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&pwm0 {
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status = "okay";
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pinctrl-names = "active";
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};
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&i2c1 {
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status = "okay";
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};
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&i2c3 {
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status = "okay";
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};
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&i2c5 {
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status = "okay";
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rtc@51 {
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status = "okay";
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compatible = "rtc,hym8563";
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reg = <0x51>;
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};
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};
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&uart0 {
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status = "okay";
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};
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&uart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart3m1_xfer>;
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};
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&uart4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart4m1_xfer>;
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};
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&uart7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m1_xfer>;
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};
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&uart8 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
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};
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&uart9 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart9m1_xfer>;
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};
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&spi0 {
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status = "okay";
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spi0_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&spi1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
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spi1_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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&can1 {
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assigned-clocks = <&cru CLK_CAN1>;
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assigned-clock-rates = <150000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&can1m1_pins>;
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status = "okay";
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};
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&can2 {
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assigned-clocks = <&cru CLK_CAN2>;
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assigned-clock-rates = <150000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&can2m0_pins>;
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status = "okay";
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};
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&video_phy1 {
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status = "okay";
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};
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/******** must be close,if not system no run ******/
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&dmc {
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status = "disabled";
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};
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&dfi {
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status = "disabled";
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};
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/*********************************************/
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&pwm7 {
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/****** disable for gpio used to be spi0_cs0 */
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status = "disabled";
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};
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/**
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* when single mipi1 or edp ports used, pwm need the pwm5,
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* and if mutiple lcd used, we just reference the backlight5.
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*/
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#if (defined(RP_MIPI1_USED) || defined(RP_EDP_USED)) && defined(RP_SINGLE_LCD)
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&backlight4 {
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pwms = <&pwm5 0 25000 0>;
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};
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#endif
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/**********************pcie***************************/
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&vcc3v3_pcie3 {
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gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
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};
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/******* pcie3x1x1 -m..2*****/
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&pcie3x1 {
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status = "okay";
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reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>;
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};
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/*************************wifi bt***********************/
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&wireless_wlan {
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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};
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&wireless_bluetooth {
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BT,reset_gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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/******************************************************/
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&rk_headset {
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pinctrl-names = "default";
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pinctrl-0 = <&hp_det>;
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headset_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>;
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};
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&pinctrl {
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headphone {
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hp_det: hp-det {
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rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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usb {
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vcc5v0_host_en: vcc5v0-host-en {
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rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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vcc5v0_otg_en: vcc5v0-otg-en {
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rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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wireless-wlan {
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wifi_host_wake_irq: wifi-host-wake-irq {
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rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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wireless-bluetooth {
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uart8_gpios: uart8-gpios {
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rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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pcie3_control{
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pcie_clk_control: pcie-clk-control {
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rockchip,pins =
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<0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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&rk809_codec {
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mic-in-differential;
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};
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