rockchip
This commit is contained in:
zhangpeng
641
rk3568-pcie-ep-lp4x-v10-linux.dts
Normal file
641
rk3568-pcie-ep-lp4x-v10-linux.dts
Normal file
@@ -0,0 +1,641 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/rk-input.h>
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#include "rk3568.dtsi"
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/ {
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model = "Rockchip RK3568 PCIe EP LP4X V10 Board";
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compatible = "rockchip,rk3568-pcie-ep-lp4x-v10", "rockchip,rk3568";
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adc_keys: adc-keys {
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compatible = "adc-keys";
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io-channels = <&saradc 0>;
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io-channel-names = "buttons";
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keyup-threshold-microvolt = <1800000>;
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poll-interval = <100>;
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vol-up-key {
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label = "volume up";
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linux,code = <KEY_VOLUMEUP>;
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press-threshold-microvolt = <1750>;
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};
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};
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait default_hugepagesz=32M hugepagesz=32M hugepages=1";
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};
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dc_12v: dc-12v {
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compatible = "regulator-fixed";
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regulator-name = "dc_12v";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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hdmi_sound: hdmi-sound {
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <128>;
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simple-audio-card,name = "rockchip,hdmi";
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status = "disabled";
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&hdmi>;
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};
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};
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leds: leds {
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compatible = "gpio-leds";
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work_led: work {
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gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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bar0_region: bar0-region@0x3c000000 {
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reg = <0x0 0x3c000000 0x0 0x00400000>;
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};
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bar2_region: bar2-region@0x40000000 {
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reg = <0x0 0x40000000 0x0 0x04000000>;
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};
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};
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test-power {
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status = "okay";
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};
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vcc3v3_pcie: gpio-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <5000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_sys: vcc5v0-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <&dc_12v>;
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};
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vcc5v0_host: vcc5v0-host-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_host";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_host_en>;
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};
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vcc5v0_otg: vcc5v0-otg-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc5v0_otg";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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enable-active-high;
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gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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vin-supply = <&vcc5v0_sys>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_otg_en>;
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};
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vcc3v3_sys: vcc3v3-sys {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_sys";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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vin-supply = <&dc_12v>;
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};
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vccio_1v8: vccio-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vccio_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&vcc3v3_sys>;
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};
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vccio_3v3: vccio-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vccio_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_gpu: vdd-gpu {
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compatible = "pwm-regulator";
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pwms = <&pwm0 0 5000 1>;
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regulator-name = "vdd_gpu";
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regulator-min-microvolt = <810000>;
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regulator-max-microvolt = <1100000>;
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regulator-init-microvolt = <920000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc3v3_sys>;
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status = "okay";
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};
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vdd_logic: vdd-logic {
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compatible = "pwm-regulator";
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pwms = <&pwm1 0 5000 1>;
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regulator-name = "vdd_logic";
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regulator-min-microvolt = <810000>;
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regulator-max-microvolt = <1000000>;
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regulator-init-microvolt = <920000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc3v3_sys>;
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status = "okay";
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};
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vdd_npu: vdd-npu {
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compatible = "pwm-regulator";
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pwms = <&pwm2 0 5000 1>;
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regulator-name = "vdd_npu";
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regulator-min-microvolt = <810000>;
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regulator-max-microvolt = <1100000>;
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regulator-init-microvolt = <920000>;
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regulator-always-on;
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regulator-boot-on;
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regulator-settling-time-up-us = <250>;
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pwm-supply = <&vcc3v3_sys>;
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status = "okay";
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};
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};
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&bus_npu {
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bus-supply = <&vdd_logic>;
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pvtm-supply = <&vdd_cpu>;
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status = "okay";
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};
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&can1 {
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assigned-clocks = <&cru CLK_CAN0>;
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assigned-clock-rates = <150000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&can1m0_pins>;
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status = "okay";
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};
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&combphy0_us {
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status = "okay";
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};
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&combphy1_usq {
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status = "okay";
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};
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&combphy2_psq {
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status = "okay";
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};
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&cpu0 {
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cpu-supply = <&vdd_cpu>;
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};
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&dfi {
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status = "okay";
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};
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&dmc {
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center-supply = <&vdd_logic>;
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status = "okay";
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};
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&display_subsystem {
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status = "okay";
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};
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&gmac0 {
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phy-mode = "rgmii";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac0_miim
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&gmac0_tx_bus2
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&gmac0_rx_bus2
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&gmac0_rgmii_clk
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&gmac0_rgmii_bus>;
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tx_delay = <0x3c>;
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rx_delay = <0x2f>;
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phy-handle = <&rgmii_phy0>;
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status = "okay";
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};
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&gmac1 {
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phy-mode = "rgmii";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio4 RK_PC0 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus>;
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tx_delay = <0x4f>;
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rx_delay = <0x26>;
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phy-handle = <&rgmii_phy1>;
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status = "okay";
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};
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&gpu {
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mali-supply = <&vdd_gpu>;
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status = "okay";
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};
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&hdmi {
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status = "okay";
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rockchip,phy-table =
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<92812500 0x8009 0x0000 0x0270>,
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<165000000 0x800b 0x0000 0x026d>,
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<185625000 0x800b 0x0000 0x01ed>,
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<297000000 0x800b 0x0000 0x01ad>,
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<594000000 0x8029 0x0000 0x0088>,
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<000000000 0x0000 0x0000 0x0000>;
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};
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&hdmi_in_vp0 {
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status = "okay";
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};
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&hdmi_sound {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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vdd_cpu: rk8600@40 {
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compatible = "rockchip,rk8600";
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reg = <0x40>;
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vin-supply = <&vcc3v3_sys>;
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regulator-compatible = "rk860x-reg";
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regulator-name = "vdd_cpu";
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1500000>;
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regulator-ramp-delay = <2300>;
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rockchip,suspend-voltage-selector = <1>;
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regulator-boot-on;
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regulator-always-on;
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regulator-state-mem {
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regulator-off-in-suspend;
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};
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};
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};
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&i2c2 {
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status = "okay";
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||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2m1_xfer>;
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};
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||||
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&i2c3 {
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status = "okay";
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||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3m1_xfer>;
|
||||
};
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||||
|
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&i2s0_8ch {
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||||
status = "okay";
|
||||
};
|
||||
|
||||
&iep {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&iep_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&jpegd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&jpegd_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mdio0 {
|
||||
rgmii_phy0: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdio1 {
|
||||
rgmii_phy1: phy@1 {
|
||||
compatible = "ethernet-phy-ieee802.3-c22";
|
||||
reg = <0x1>;
|
||||
};
|
||||
};
|
||||
|
||||
&mpp_srv {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x2 {
|
||||
compatible = "rockchip,rk3568-pcie-std-ep";
|
||||
memory-region = <&bar0_region>, <&bar2_region>;
|
||||
memory-region-names = "bar0", "bar2";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
usb {
|
||||
vcc5v0_host_en: vcc5v0-host-en {
|
||||
rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
|
||||
vcc5v0_otg_en: vcc5v0-otg-en {
|
||||
rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_io_domains {
|
||||
status = "okay";
|
||||
pmuio2-supply = <&vccio_3v3>;
|
||||
vccio1-supply = <&vccio_3v3>;
|
||||
vccio3-supply = <&vccio_3v3>;
|
||||
vccio4-supply = <&vccio_3v3>;
|
||||
vccio5-supply = <&vccio_3v3>;
|
||||
vccio6-supply = <&vccio_3v3>;
|
||||
vccio7-supply = <&vccio_3v3>;
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rk_rga {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvdec {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvdec_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvenc {
|
||||
venc-supply = <&vdd_logic>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkvenc_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rknpu {
|
||||
rknpu-supply = <&vdd_npu>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rknpu_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&saradc {
|
||||
status = "okay";
|
||||
vref-supply = <&vccio_1v8>;
|
||||
};
|
||||
|
||||
&sdhci {
|
||||
bus-width = <8>;
|
||||
no-sdio;
|
||||
no-sd;
|
||||
non-removable;
|
||||
max-frequency = <200000000>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc0 {
|
||||
max-frequency = <150000000>;
|
||||
no-sdio;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
cap-mmc-highspeed;
|
||||
cap-sd-highspeed;
|
||||
disable-wp;
|
||||
sd-uhs-sdr104;
|
||||
vmmc-supply = <&vccio_3v3>;
|
||||
vqmmc-supply = <&vccio_3v3>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdmmc2 {
|
||||
max-frequency = <150000000>;
|
||||
no-sd;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
//mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sfc {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <75000000>;
|
||||
spi-rx-bus-width = <4>;
|
||||
spi-tx-bus-width = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "high_speed";
|
||||
pinctrl-0 = <&spi0m1_cs0 &spi0m1_pins>;
|
||||
pinctrl-1 = <&spi0m1_cs0 &spi0m1_pins_hs>;
|
||||
};
|
||||
|
||||
&spi2 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "high_speed";
|
||||
pinctrl-0 = <&spi2m1_cs0 &spi2m1_cs1 &spi2m1_pins>;
|
||||
pinctrl-1 = <&spi2m1_cs0 &spi2m1_cs1 &spi2m1_pins_hs>;
|
||||
};
|
||||
|
||||
&tsadc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3m1_xfer>;
|
||||
};
|
||||
|
||||
/* RS485 */
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4m0_xfer &uart4m0_ctsn &uart4m0_rtsn>;
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7m1_xfer>;
|
||||
};
|
||||
|
||||
&u2phy0_host {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy0_otg {
|
||||
status = "okay";
|
||||
vbus-supply = <&vcc5v0_otg>;
|
||||
};
|
||||
|
||||
&usb2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
dr_mode = "otg";
|
||||
extcon = <&usb2phy0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd30 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost_dwc3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost30 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vdpu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vdpu_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vepu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vepu_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
|
||||
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
|
||||
};
|
||||
|
||||
&vop_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
Reference in New Issue
Block a user