rockchip
This commit is contained in:
47
rk3568-iotest-ddr3-v10.dts
Normal file
47
rk3568-iotest-ddr3-v10.dts
Normal file
@@ -0,0 +1,47 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "rk3568.dtsi"
|
||||
#include "rk3568-evb.dtsi"
|
||||
#include "rk3568-android.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Rockchip RK3568 IOTEST DDR3 V10 Board";
|
||||
compatible = "rockchip,rk3568-iotest-ddr3-v10", "rockchip,rk3568";
|
||||
};
|
||||
|
||||
&usb_host0_ehci {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3 {
|
||||
phys = <&u2phy0_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
maximum-speed = "high-speed";
|
||||
snps,dis_u2_susphy_quirk;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost_dwc3 {
|
||||
phys = <&u2phy1_otg>;
|
||||
phy-names = "usb2-phy";
|
||||
maximum-speed = "high-speed";
|
||||
status = "okay";
|
||||
};
|
||||
Reference in New Issue
Block a user