rockchip
This commit is contained in:
zhangpeng
616
rk3566-evb2-lp4x-v10.dtsi
Normal file
616
rk3566-evb2-lp4x-v10.dtsi
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@@ -0,0 +1,616 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/display/media-bus-format.h>
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#include <dt-bindings/pinctrl/rockchip.h>
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#include "rk3566.dtsi"
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#include "rk3566-evb.dtsi"
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/ {
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model = "Rockchip RK3566 EVB2 LP4X V10 Board";
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compatible = "rockchip,rk3566-evb2-lp4x-v10", "rockchip,rk3566";
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vcc_camera: vcc-camera-regulator {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&camera_pwr>;
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regulator-name = "vcc_camera";
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enable-active-high;
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regulator-always-on;
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regulator-boot-on;
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};
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vcc3v3_pcie: gpio-regulator {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <5000>;
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vin-supply = <&dc_12v>;
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};
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};
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&bt_sound {
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status = "disabled";
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simple-audio-card,cpu {
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sound-dai = <&i2s2_2ch>;
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};
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};
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&combphy1_usq {
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status = "okay";
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};
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&combphy2_psq {
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status = "okay";
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};
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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/*
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* dphy0 only used for full mode,
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* full mode and split mode are mutually exclusive
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*/
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy0_in: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&gc8034_out>;
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data-lanes = <1 2 3 4>;
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};
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mipi_in_ucam1: endpoint@2 {
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reg = <2>;
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remote-endpoint = <&ov5695_out>;
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data-lanes = <1 2>;
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};
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mipi_in_ucam2: endpoint@3 {
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reg = <3>;
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remote-endpoint = <&gc5025_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy0_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&isp0_in_dphy0>;
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};
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};
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};
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};
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&csi2_dphy1 {
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status = "disabled";
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/*
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* dphy1 only used for split mode,
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* can be used concurrently with dphy2
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* full mode and split mode are mutually exclusive
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*/
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy1_in: endpoint@1 {
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reg = <1>;
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//remote-endpoint = <&ov5695_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy1_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&isp0_in>;
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};
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};
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};
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};
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&csi2_dphy2 {
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status = "disabled";
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/*
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* dphy2 only used for split mode,
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* can be used concurrently with dphy1
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* full mode and split mode are mutually exclusive
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*/
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy2_in: endpoint@1 {
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reg = <1>;
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//remote-endpoint = <&gc5025_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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dphy2_out: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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/*
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* video_phy0 needs to be enabled
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* when dsi0 is enabled
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*/
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&dsi0 {
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status = "okay";
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};
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&dsi0_in_vp0 {
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status = "disabled";
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};
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&dsi0_in_vp1 {
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status = "okay";
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};
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&dsi0_panel {
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power-supply = <&vcc3v3_lcd0_n>;
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reset-gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd0_rst_gpio>;
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};
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/*
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* video_phy1 needs to be enabled
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* when dsi1 is enabled
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*/
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&dsi1 {
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status = "disabled";
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};
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&dsi1_in_vp0 {
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status = "disabled";
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};
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&dsi1_in_vp1 {
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status = "disabled";
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};
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&dsi1_panel {
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power-supply = <&vcc3v3_lcd1_n>;
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reset-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&lcd1_rst_gpio>;
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};
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&gmac1 {
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phy-mode = "rgmii";
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clock_in_out = "output";
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snps,reset-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
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snps,reset-active-low;
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/* Reset time is 20ms, 100ms for rtl8211f */
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snps,reset-delays-us = <0 20000 100000>;
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assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
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assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
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assigned-clock-rates = <0>, <125000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&gmac1m1_miim
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&gmac1m1_tx_bus2
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&gmac1m1_rx_bus2
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&gmac1m1_rgmii_clk
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&gmac1m1_rgmii_bus>;
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tx_delay = <0x4f>;
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rx_delay = <0x25>;
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phy-handle = <&rgmii_phy0>;
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status = "okay";
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};
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&i2c2 {
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status = "okay";
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pinctrl-0 = <&i2c2m1_xfer>;
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/* split mode: lane0/1 */
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ov5695: ov5695@36 {
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status = "okay";
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compatible = "ovti,ov5695";
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reg = <0x36>;
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clocks = <&cru CLK_CIF_OUT>;
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clock-names = "xvclk";
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power-domains = <&power RK3568_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&cif_clk>;
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reset-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
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pwdn-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>;
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/*power-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;*/
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "TongJu";
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rockchip,camera-module-lens-name = "CHT842-MD";
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port {
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ov5695_out: endpoint {
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remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2>;
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};
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};
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};
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/* split mode: lane:2/3 */
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gc5025: gc5025@37 {
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status = "okay";
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compatible = "galaxycore,gc5025";
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reg = <0x37>;
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clocks = <&pmucru CLK_WIFI>;
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clock-names = "xvclk";
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pinctrl-names = "default";
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pinctrl-0 = <&refclk_pins>;
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reset-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
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pwdn-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
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power-domains = <&power RK3568_PD_VI>;
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/*power-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;*/
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "TongJu";
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rockchip,camera-module-lens-name = "CHT842-MD";
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port {
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gc5025_out: endpoint {
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remote-endpoint = <&mipi_in_ucam2>;
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data-lanes = <1 2>;
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};
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};
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};
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/* full mode: lane0-3 */
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gc8034: gc8034@37 {
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compatible = "galaxycore,gc8034";
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status = "okay";
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reg = <0x37>;
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clocks = <&cru CLK_CIF_OUT>;
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clock-names = "xvclk";
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power-domains = <&power RK3568_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&cif_clk>;
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reset-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;
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pwdn-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "RK-CMK-8M-2-v1";
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rockchip,camera-module-lens-name = "CK8401";
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port {
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gc8034_out: endpoint {
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remote-endpoint = <&dphy0_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&i2c4 {
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/* i2c4 sda conflict with camera pwdn */
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status = "disabled";
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/*
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* gc2145 needs to be disabled,
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* when gmac1 is enabled;
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* pinctrl conflicts;
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*/
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gc2145: gc2145@3c {
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status = "disabled";
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compatible = "galaxycore,gc2145";
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reg = <0x3c>;
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clocks = <&cru CLK_CIF_OUT>;
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clock-names = "xvclk";
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power-domains = <&power RK3568_PD_VI>;
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pinctrl-names = "default";
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/* conflict with gmac1m1_rgmii_pins & cif_clk*/
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pinctrl-0 = <&cif_clk &cif_dvp_clk &cif_dvp_bus16>;
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/*avdd-supply = <&vcc2v8_dvp>;*/
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/*dovdd-supply = <&vcc1v8_dvp>;*/
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/*dvdd-supply = <&vcc1v8_dvp>;*/
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/*reset-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;*/
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pwdn-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CameraKing";
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rockchip,camera-module-lens-name = "Largan";
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port {
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gc2145_out: endpoint {
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remote-endpoint = <&dvp_in_bcam>;
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};
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};
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};
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};
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&i2s2_2ch {
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pinctrl-0 = <&i2s2m0_sclktx &i2s2m0_lrcktx &i2s2m0_sdi &i2s2m0_sdo>;
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rockchip,bclk-fs = <32>;
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status = "disabled";
|
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};
|
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&mdio1 {
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||||
rgmii_phy0: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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||||
reg = <0x0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* power-supply should switche to vcc3v3_lcd1_n
|
||||
* when mipi panel is connected to dsi1.
|
||||
*/
|
||||
>1x {
|
||||
power-supply = <&vcc3v3_lcd0_n>;
|
||||
};
|
||||
|
||||
&mipi_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&dphy2_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi_in>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&video_phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&video_phy1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie2x1 {
|
||||
reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
cam {
|
||||
camera_pwr: camera-pwr {
|
||||
rockchip,pins =
|
||||
/* camera power en */
|
||||
<0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
sdio-pwrseq {
|
||||
wifi_enable_h: wifi-enable-h {
|
||||
rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-wlan {
|
||||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||||
rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
|
||||
};
|
||||
};
|
||||
|
||||
wireless-bluetooth {
|
||||
uart1_gpios: uart1-gpios {
|
||||
rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd0 {
|
||||
lcd0_rst_gpio: lcd0-rst-gpio {
|
||||
rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
lcd1 {
|
||||
lcd1_rst_gpio: lcd1-rst-gpio {
|
||||
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkcif_dvp {
|
||||
status = "disabled";
|
||||
|
||||
port {
|
||||
/* Parallel bus endpoint */
|
||||
dvp_in_bcam: endpoint {
|
||||
remote-endpoint = <&gc2145_out>;
|
||||
bus-width = <8>;
|
||||
vsync-active = <0>;
|
||||
hsync-active = <1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
cif_mipi_in: endpoint {
|
||||
remote-endpoint = <&mipi_csi2_output>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rkisp_vir0 {
|
||||
status = "okay";
|
||||
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
isp0_in: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&dphy1_out>;
|
||||
};
|
||||
isp0_in_dphy0: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&dphy0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&route_dsi0 {
|
||||
status = "okay";
|
||||
connect = <&vp1_out_dsi0>;
|
||||
};
|
||||
|
||||
&sdmmc2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sdmmc1 {
|
||||
max-frequency = <150000000>;
|
||||
no-sd;
|
||||
no-mmc;
|
||||
bus-width = <4>;
|
||||
disable-wp;
|
||||
cap-sd-highspeed;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
mmc-pwrseq = <&sdio_pwrseq>;
|
||||
non-removable;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
|
||||
sd-uhs-sdr104;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sdio_pwrseq {
|
||||
reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
&spdif_8ch {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spdifm1_tx>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
|
||||
};
|
||||
|
||||
&vcc3v3_lcd0_n {
|
||||
gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
&vcc3v3_lcd1_n {
|
||||
gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
};
|
||||
&wireless_wlan {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wifi_host_wake_irq>;
|
||||
WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
WIFI,poweren_gpio = <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&work_led {
|
||||
gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
|
||||
&wireless_bluetooth {
|
||||
compatible = "bluetooth-platdata";
|
||||
clocks = <&rk809 1>;
|
||||
clock-names = "ext_clock";
|
||||
//wifi-bt-power-toggle;
|
||||
uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default", "rts_gpio";
|
||||
pinctrl-0 = <&uart1m0_rtsn>;
|
||||
pinctrl-1 = <&uart1_gpios>;
|
||||
BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
|
||||
status = "okay";
|
||||
};
|
||||
Reference in New Issue
Block a user