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rockchip

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zhangpeng
2025-04-28 11:36:59 +08:00
commit 5dd7a8972b
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rk3562-evb1-cam.dtsi Normal file
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
*
*/
/ {
vcc_mipicsi0: vcc-mipicsi0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipicsi0_pwr>;
regulator-name = "vcc_mipicsi0";
enable-active-high;
};
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&gc8034_out0>;
data-lanes = <1 2 3 4>;
};
mipi_in_ucam1: endpoint@2 {
reg = <2>;
remote-endpoint = <&ov5695_out0>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidcphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&i2c4 {
status = "okay";
dw9714: dw9714@c {
compatible = "dongwoon,dw9714";
status = "okay";
reg = <0x0c>;
avdd-supply = <&vcc2v8_dvp>;
rockchip,vcm-start-current = <10>;
rockchip,vcm-rated-current = <85>;
rockchip,vcm-step-mode = <5>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
};
gc8034: gc8034@37 {
compatible = "galaxycore,gc8034";
reg = <0x37>;
clocks = <&cru CLK_CAM0_OUT2IO>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&camm0_clk0_out>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>;
avdd-supply = <&vcc2v8_dvp>;
dovdd-supply = <&vcc1v8_dvp>;
dvdd-supply = <&vcc_mipicsi0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "RK-CMK-8M-2-v1";
rockchip,camera-module-lens-name = "CK8401";
lens-focus = <&dw9714>;
port {
gc8034_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2 3 4>;
};
};
};
ov5695: ov5695@36 {
compatible = "ovti,ov5695";
reg = <0x36>;
clocks = <&cru CLK_CAM0_OUT2IO>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&camm0_clk0_out>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
pwdn-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>;
avdd-supply = <&vcc2v8_dvp>;
dovdd-supply = <&vcc1v8_dvp>;
dvdd-supply = <&vcc_mipicsi0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "TongJu";
rockchip,camera-module-lens-name = "CHT842-MD";
port {
ov5695_out0: endpoint {
remote-endpoint = <&mipi_in_ucam1>;
data-lanes = <1 2>;
};
};
};
};
&csi2_dphy0_hw {
status = "okay";
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidcphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in0>;
};
};
};
};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds {
status = "okay";
port {
cif_mipi_in0: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp_vir0>;
};
};
};
&rkcif_mmu {
status = "okay";
};
&rkisp {
status = "okay";
};
&rkisp_mmu {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp_vir0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
&pinctrl {
cam {
mipicsi0_pwr: mipicsi0-pwr {
rockchip,pins =
/* camera power en */
<4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};