rockchip
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88
rk3528-linux.dtsi
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88
rk3528-linux.dtsi
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*
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*/
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/ {
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chosen: chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff9f0000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rw rootwait";
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <0>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <1500000>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart0m0_xfer>;
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status = "okay";
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};
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firmware {
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optee {
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compatible = "linaro,optee-tz";
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method = "smc";
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};
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};
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reserved_memory: reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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drm_logo: drm-logo@00000000 {
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compatible = "rockchip,drm-logo";
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reg = <0x0 0x0 0x0 0x0>;
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};
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drm_cubic_lut: drm-cubic-lut@00000000 {
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compatible = "rockchip,drm-cubic-lut";
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reg = <0x0 0x0 0x0 0x0>;
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};
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ramoops: ramoops@110000 {
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compatible = "ramoops";
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/* 0x110000 to 0x1f0000 is for ramoops */
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reg = <0x0 0x110000 0x0 0xe0000>;
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boot-log-size = <0x8000>; /* do not change */
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boot-log-count = <0x1>; /* do not change */
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console-size = <0x80000>;
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pmsg-size = <0x30000>;
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ftrace-size = <0x00000>;
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record-size = <0x14000>;
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};
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};
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};
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&display_subsystem {
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memory-region = <&drm_logo>, <&drm_cubic_lut>;
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memory-region-names = "drm-logo", "drm-cubic-lut";
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/* devfreq = <&dmc>; */
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route {
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route_hdmi: route-hdmi {
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status = "okay";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vp0_out_hdmi>;
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};
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route_tve: route-tve {
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status = "okay";
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logo,uboot = "logo.bmp";
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logo,kernel = "logo_kernel.bmp";
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logo,mode = "center";
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charge_logo,mode = "center";
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connect = <&vp1_out_tve>;
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};
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};
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};
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&rng {
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status = "okay";
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};
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