rockchip

2025-04-28 11:36:59 +08:00
commit 5dd7a8972b
945 changed files with 332963 additions and 0 deletions
--- a/rk3399/rp-hdmiin.dtsi
+++ b/rk3399/rp-hdmiin.dtsi
@@ -0,0 +1,103 @@
+
+/ {
+        ext_cam_clk: external-camera-clock {
+                compatible = "fixed-clock";
+                clock-frequency = <27000000>;
+                clock-output-names = "CLK_CAMERA_27MHZ";
+                #clock-cells = <0>;
+        };
+
+
+};
+
+
+&rkisp1_0 {
+        status = "okay";
+
+        port {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                isp0_mipi_in: endpoint@0 {
+                        reg = <0>;
+                        remote-endpoint = <&dphy_rx0_out>;
+                };
+        };
+};
+&mipi_dphy_rx0 {
+        status = "okay";
+
+        ports {
+                #address-cells = <1>;
+                #size-cells = <0>;
+
+                port@0 {
+                        reg = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        mipi_in_ucam0: endpoint@1 {
+                                reg = <1>;
+                                remote-endpoint = <&ucam_out0>;
+                                data-lanes = <1 2>;
+                        };
+                };
+
+                port@1 {
+                        reg = <1>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+
+                        dphy_rx0_out: endpoint@0 {
+                                reg = <0>;
+                                remote-endpoint = <&isp0_mipi_in>;
+                        };
+                };
+        };
+};
+
+&isp0_mmu {
+        status = "okay";
+};
+
+
+&i2c1 {
+        status = "okay";
+
+        tc358749x: tc358749x@f {
+                status = "disabled";
+                compatible = "toshiba,tc358749";
+                reg = <0xf>;
+                clocks = <&ext_cam_clk>;
+                clock-names = "refclk";
+                reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
+                interrupt-parent = <&gpio2>;
+                interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&hdmiin_gpios>;
+                port {
+                        hdmiin_out0: endpoint {
+                                // Unlinked mipi dphy rx0 
+                               // remote-endpoint = <&mipi_in_ucam0>;
+                                data-lanes = <1 2 3 4>;
+                                clock-noncontinuous;
+                                link-frequencies =
+                                        /bits/ 64 <297000000>;
+                        };
+                };
+        };
+};
+&pinctrl {
+        hdmiin {
+                hdmiin_gpios: hdmiin-gpios {
+                        rockchip,pins =
+                                <2 RK_PA5 RK_FUNC_GPIO &pcfg_output_high>,
+                                <2 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>,
+                                <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>,
+                                <2 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>,
+                                <2 RK_PB1 RK_FUNC_GPIO &pcfg_output_high>,
+                                <2 RK_PB2 RK_FUNC_GPIO &pcfg_output_low>,
+                                <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+                };
+        };
+};