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只使用串口pcie

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zhangpeng
2025-10-16 17:00:39 +08:00
parent 77d62eaa60
commit 591fa0c3f9
3 changed files with 12 additions and 12 deletions
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16
rk3588/.dr4-rk3588.dtb.dts.tmp
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@@ -1,6 +1,6 @@
# 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" # 0 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "<built-in>" # 0 "<built-in>"
# 1 "<command-line>" # 0 "<command-line>"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" # 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
@@ -10674,7 +10674,7 @@
}; };
}; };
}; };
# 6887 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2 # 6888 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2
# 8 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588.dtsi" 2 # 8 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588.dtsi" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588-vccio3-pinctrl.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588-vccio3-pinctrl.dtsi" 1
@@ -14691,20 +14691,20 @@
phys = <&combphy1_ps 2>; phys = <&combphy1_ps 2>;
reset-gpios = <&gpio4 5 0>; reset-gpios = <&gpio4 5 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };
&pcie2x1l1 { &pcie2x1l1 {
phys = <&combphy2_psu 2>; phys = <&combphy2_psu 2>;
reset-gpios = <&gpio4 2 0>; reset-gpios = <&gpio4 2 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };
&pcie2x1l2 { &pcie2x1l2 {
reset-gpios = <&gpio4 17 0>; reset-gpios = <&gpio4 17 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };
&pcie30phy { &pcie30phy {
@@ -14722,7 +14722,7 @@
num-lanes = <2>; num-lanes = <2>;
reset-gpios = <&gpio4 14 0>; reset-gpios = <&gpio4 14 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };
# 22 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 22 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 68 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" # 68 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"

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rk3588/dr4-rk3588.dtb
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8
rk3588/zkzg-pcie.dtsi
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@@ -27,20 +27,20 @@
phys = <&combphy1_ps PHY_TYPE_PCIE>; phys = <&combphy1_ps PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };
&pcie2x1l1 { &pcie2x1l1 {
phys = <&combphy2_psu PHY_TYPE_PCIE>; phys = <&combphy2_psu PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };
&pcie2x1l2 { &pcie2x1l2 {
reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };
&pcie30phy { &pcie30phy {
@@ -58,5 +58,5 @@
num-lanes = <2>; num-lanes = <2>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>; vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "disabled";
}; };