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修改rkcif

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zhangpeng
2025-11-07 16:55:39 +08:00
parent 440be3e956
commit 13f99ce0e8
6 changed files with 160 additions and 21 deletions
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2
rk3588/.dr4-rk3588.dtb.cmd
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@@ -33,7 +33,7 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg_mipi.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-mipi.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \

2
rk3588/.dr4-rk3588.dtb.d.pre.tmp
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@@ -29,6 +29,6 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg_mipi.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-mipi.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi

31
rk3588/.dr4-rk3588.dtb.dts.tmp
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@@ -1,6 +1,6 @@
# 0 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "<built-in>"
# 1 "<command-line>"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
@@ -10674,7 +10674,7 @@
};
};
};
# 6888 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2
# 6887 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2
# 8 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588.dtsi" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588-vccio3-pinctrl.dtsi" 1
@@ -14548,13 +14548,17 @@
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg_mipi.dtsi" 1
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-mipi.dtsi" 1
&mipi_dcphy0 {
status = "okay";
};
&csi2_dcphy0 {
status = "okay";
@@ -14569,6 +14573,7 @@
mipidcphy0_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mvcam_out4>;
data-lanes = <1 2 3 4>;
};
};
@@ -14595,14 +14600,10 @@
status = "okay";
compatible = "veye,mvcam";
reg = <0x3b>;
clocks = <&cru 257>;
clock-names = "xvclk";
power-domains = <&power 27>;
pinctrl-names = "default";
pinctrl-0 = <&mipim0_camera2_clk>;
rockchip,grf = <&sys_grf>;
reset-gpios = <&gpio1 3 0>;
pwdn-gpios = <&gpio1 5 0>;
reset-gpios = <&gpio1 3 1>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
@@ -14610,15 +14611,11 @@
port {
mvcam_out4: endpoint {
remote-endpoint = <&mipidcphy0_in_ucam0>;
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi_dcphy0 {
status = "okay";
};
&mipi0_csi2 {

BIN
rk3588/dr4-rk3588.dtb
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Binary file not shown.

133
rk3588/zkzg-mipi.dtsi Normal file
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@@ -0,0 +1,133 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&mipi_dcphy0 {
status = "okay";
};
&csi2_dcphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipidcphy0_in_ucam0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mvcam_out4>;
// 修改为 4 lane
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidcphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&i2c7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c7m0_xfer>;
mvcam_4: mvcam@3b{
status = "okay";
compatible = "veye,mvcam";
reg = <0x3b>;
// 电源控制引脚
pwdn-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
// 新增复位引脚
reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "NC";
rockchip,camera-module-lens-name = "NC";
port {
mvcam_out4: endpoint {
remote-endpoint = <&mipidcphy0_in_ucam0>;
// 修改为 4 lane
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidcphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in0>;
};
};
};
};
&rkcif_mipi_lvds {
status = "okay";
port {
cif_mipi_in0: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
};
};
};
&rkcif_mipi_lvds_sditf {
status = "disabled";
port {
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp1_in1>;
};
};
};
&rkisp1_vir0 {
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
isp1_in1: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};

9
rk3588/zkzg_mipi.dtsi
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@@ -101,6 +101,15 @@
};
};
&rkcif {
status = "okay";
// memory-region = <&cif_reserved>;
};
&rkcif_mmu {
status = "okay";
};
&rkcif_mipi_lvds {
status = "okay";