rockchip/rk356x/rp-lcd-mipi0-5.5-720-1280-v2.dtsi
2025-04-28 11:36:59 +08:00

146 lines
4.0 KiB
Plaintext
Executable File

#include "rp-lcd-hdmi.dtsi"
#define RP_SINGLE_LCD
&dsi0 {
status = "okay";
rockchip,lane-rate = <480>;
dsi0_panel: panel@0 {
status = "okay";
compatible = "simple-panel-dsi";
reg = <0>;
reset-delay-ms = <20>;
init-delay-ms = <20>;
enable-delay-ms = <120>;
prepare-delay-ms = <120>;
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
dsi,format = <MIPI_DSI_FMT_RGB888>;
dsi,lanes = <4>;
/**
* power-supply = <>;
* reset-gpios = <>;
*
* lcd reset pin and power supply
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
panel-init-sequence = [
39 00 04 B9 F1 12 83
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37
39 00 05 B8 26 22 20 03
39 00 04 BF 02 11 00
39 00 0B B3 0C 10 0A 50 03 FF 00 00 00 00
39 00 0A C0 73 73 50 50 00 00 08 70 00
39 00 02 BC 46
39 00 02 CC 0B
39 00 02 B4 80
39 00 04 B2 C8 12 30
39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 00 C0 10
39 00 0D C1 53 00 1E 1E 77 C1 FF FF AF AF 7F 7F
39 00 03 B5 07 07
39 00 03 B6 70 70
39 00 07 C6 00 00 FF FF 01 FF
39 00 40 E9 C2 10 05 04 FE 02 81 12 31 45 3F 83 12 91 3B 2A 08 05 00 00 00 00 08 05 00 00 00 00 FF 02 46 02 48 68 88 88 88 80 88 FF 13 57 13 58 78 88 88 88 81 88 00 00 00 00 00 12 B1 3B 00 00 00 00 00
39 00 3E EA 00 1A 00 00 00 00 00 00 00 00 00 00 FF 31 75 31 18 78 88 88 88 85 88 FF 20 64 20 08 68 88 88 88 84 88 20 10 00 00 54 00 00 00 00 00 00 00 C0 00 00 0C 00 00 00 00 30 02 A1 00 00 00 00
39 00 23 E0 00 05 07 1A 39 3F 33 2C 06 0B 0D 11 13 12 14 10 1A 00 05 07 1A 39 3F 33 2C 06 0B 0D 11 13 12 14 10 1A
05 ff 01 11
05 78 01 29
];
panel-exit-sequence = [
05 00 01 28
05 78 01 10
];
disp_timings0: display-timings {
native-mode = <&dsi0_timing0>;
dsi0_timing0: timing0 {
clock-frequency = <60000000>;
hactive = <720>;
vactive = <1280>;
hback-porch = <42>;
hfront-porch = <44>;
vback-porch = <10>;
vfront-porch = <14>;
hsync-len = <2>;
vsync-len = <2>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
panel_in_dsi: endpoint {
remote-endpoint = <&dsi_out_panel>;
};
};
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi_out_panel: endpoint {
remote-endpoint = <&panel_in_dsi>;
};
};
};
};
&dsi0_in_vp0 {
status = "disabled";
};
&dsi0_in_vp1 {
status = "okay";
};
&video_phy0 {
status = "okay";
};
&route_dsi0 {
status = "okay";
connect = <&vp1_out_dsi0>;
};
&gt1x {
status = "okay";
compatible = "goodix,gt1x";
reg = <0x5d>;
/**
* goodix,rst-gpio = <>;
* goodix,irq-gpio = <>;
*
* touch panel interrupt and reset pin
* please refer to ***-lcd-gpio.dtsi
* that included in main dts.
*/
};