1093 lines
18 KiB
Plaintext
1093 lines
18 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#include <dt-bindings/display/media-bus-format.h>
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/ {
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aliases {
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pinctrl0 = &pinctrl;
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};
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backlight {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c2_max96755f_backlight: backlight@0 {
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compatible = "pwm-backlight";
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reg = <0>;
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pwms = <&pwm0 0 1000000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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i2c4_max96745_backlight: backlight@1 {
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compatible = "pwm-backlight";
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reg = <1>;
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pwms = <&pwm10 0 1000000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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i2c5_max96745_backlight: backlight@2 {
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compatible = "pwm-backlight";
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reg = <2>;
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pwms = <&pwm7 0 1000000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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i2c6_max96755f_backlight: backlight@3 {
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compatible = "pwm-backlight";
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reg = <3>;
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pwms = <&pwm13 0 1000000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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i2c7_max96745_backlight: backlight@4 {
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compatible = "pwm-backlight";
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reg = <4>;
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pwms = <&pwm11 0 1000000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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i2c8_max96745_backlight: backlight@5 {
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compatible = "pwm-backlight";
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reg = <5>;
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pwms = <&pwm14 0 1000000 0>;
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brightness-levels = <0 4 8 16 32 64 128 255>;
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default-brightness-level = <6>;
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};
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};
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};
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&dp0 {
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//split-mode;
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force-hpd;
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status = "okay";
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};
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&dp0_in_vp0 {
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status = "okay";
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};
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&dp0_out {
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link-frequencies = /bits/ 64 <2700000000>;
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remote-endpoint = <&i2c4_max96745_in>;
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};
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&usbdp_phy0 {
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rockchip,dp-lane-mux = <0 1 2 3>;
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status = "okay";
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};
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&usbdp_phy0_dp {
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status = "okay";
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};
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&route_dp0 {
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connect = <&vp0_out_dp0>;
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status = "okay";
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};
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&dp1 {
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force-hpd;
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status = "disabled";
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};
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&dp1_out {
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link-frequencies = /bits/ 64 <2700000000>;
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remote-endpoint = <&i2c8_max96745_in>;
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};
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&usbdp_phy1 {
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rockchip,dp-lane-mux = <0 1 2 3>;
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status = "okay";
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};
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&usbdp_phy1_dp {
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status = "okay";
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};
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&dsi0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi0_out: endpoint {
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remote-endpoint = <&i2c2_max96755f_in>;
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};
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};
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};
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};
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&mipi_dcphy0 {
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status = "okay";
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};
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&dsi0_in_vp2 {
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status = "okay";
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};
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&route_dsi0 {
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connect = <&vp2_out_dsi0>;
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status = "disabled";
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};
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&dsi1 {
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status = "disabled";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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dsi1_out: endpoint {
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remote-endpoint = <&i2c6_max96755f_in>;
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};
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};
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};
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};
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&mipi_dcphy1 {
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status = "okay";
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};
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&dsi1_in_vp3 {
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status = "okay";
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};
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&route_dsi1 {
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connect = <&vp3_out_dsi1>;
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status = "disabled";
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};
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&edp0 {
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//split-mode;
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force-hpd;
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status = "okay";
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};
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&edp0_out {
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link-frequencies = /bits/ 64 <2700000000>;
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remote-endpoint = <&i2c5_max96745_in>;
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};
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&hdptxphy0 {
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status = "okay";
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};
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&edp0_in_vp1 {
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status = "okay";
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};
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&route_edp0 {
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connect = <&vp1_out_edp0>;
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status = "okay";
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};
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&edp1 {
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force-hpd;
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status = "disabled";
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};
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&edp1_out {
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link-frequencies = /bits/ 64 <2700000000>;
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remote-endpoint = <&i2c7_max96745_in>;
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};
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&hdptxphy1 {
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status = "okay";
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};
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&hdmi0 {
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status = "disabled";
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};
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&hdmi1 {
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status = "disabled";
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};
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&hdptxphy_hdmi0 {
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status = "disabled";
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};
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&hdptxphy_hdmi1 {
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status = "disabled";
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};
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&i2c2 {
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pinctrl-0 = <&i2c2m4_xfer>;
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clock-frequency = <400000>;
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status = "okay";
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max96755@40 {
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compatible = "maxim,max96755";
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reg = <0x40>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_serdes_pins>;
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lock-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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sel-mipi;
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status = "okay";
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serdes-init-sequence = [
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0001 0008
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0002 0053
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0003 0040
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0010 0031
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0013 00ca
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0010 0000
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02be 001c
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02bf 0040
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02c0 0020
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0311 0057
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0331 0033
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0332 004e
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03a4 0000
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0385 0000
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0386 0000
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0387 0000
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005b 0012
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0053 0010
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];
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i2c2_max96755f_pinctrl: i2c2-max96755f-pinctrl {
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compatible = "maxim,max96755-pinctrl";
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status = "okay";
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i2c2_max96755f_pinctrl_hog: hog {
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i2c {
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groups = "MAX96755_I2C";
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function = "MAX96755_I2C";
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};
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};
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i2c2_max96755f_panel_pins: panel-pins {
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bl-pwm {
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pins = "MAX96755_MFP0";
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function = "DES_GPIO0_OUTPUT";
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};
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};
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i2c2_max96755f_gpio: i2c2-max96755f-gpio {
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compatible = "maxim,max96755-gpio";
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status = "okay";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&i2c2_max96755f_pinctrl 0 160 24>;
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};
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};
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i2c2_max96755f_bridge: i2c2-max96755f-bridge {
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compatible = "maxim,max96755-bridge";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_max96755f_pinctrl_hog>;
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status = "okay";
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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i2c2_max96755f_in: endpoint {
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remote-endpoint = <&dsi0_out>;
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};
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};
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port@1 {
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reg = <1>;
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i2c2_max96755f_out: endpoint {
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remote-endpoint = <&i2c2_max96755f_panel_in>;
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};
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};
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};
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};
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max96772@48 {
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compatible = "maxim,max96772";
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reg = <0x48>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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serdes-init-sequence = [
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0001 0002
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0010 0011
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0050 0000
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07f0 0001
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e791 0000
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e793 0000
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e794 0000
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e795 000a
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e796 007a
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e797 0000
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e798 003c
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e799 0000
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e79a 003c
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e79b 0000
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e79c 00a0
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e79d 0005
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e79e 0054
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e79f 0001
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e7a0 0002
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e7a1 0000
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e7a2 0014
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e7a3 0000
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e7a4 00fc
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e7a5 000e
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e7a6 0055
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e7a7 0055
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e7a8 0000
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e7a9 0080
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e7aa 0040
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e7ab 0000
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e7ac 0003
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e7ad 0000
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e7b0 0000
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e7b1 0000
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e7b2 0050
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e7b3 0000
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e7b4 0000
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e7b5 0040
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e7b6 006c
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e7b7 0020
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e7b8 0007
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e7b9 0000
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e7ba 0001
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e7bb 0000
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e7bc 0000
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e7bd 0000
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e7be 0052
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e7bf 0000
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];
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i2c2_max96772_pinctrl: i2c2-max96772-pinctrl {
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compatible = "maxim,max96772-pinctrl";
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status = "okay";
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i2c2_max96772_gpio: i2c2-max96772-gpio {
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compatible = "maxim,max96772-gpio";
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status = "okay";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&i2c2_max96772_pinctrl 0 185 24>;
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};
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};
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i2c2_max96772_panel: i2c2-max96772-panel {
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compatible = "maxim,max96772-panel";
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backlight = <&i2c2_max96755f_backlight>;
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panel-timing {
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clock-frequency = <180000000>;
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hactive = <2560>;
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vactive = <1440>;
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hfront-porch = <122>;
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hsync-len = <60>;
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hback-porch = <60>;
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vfront-porch = <340>;
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vsync-len = <2>;
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vback-porch = <20>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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port {
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i2c2_max96755f_panel_in: endpoint {
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remote-endpoint = <&i2c2_max96755f_out>;
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};
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};
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};
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};
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ts@30 {
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compatible = "gac,gac_ts";
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reg = <0x30>;
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gac,max_x = <2560>;
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gac,max_y = <1440>;
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};
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};
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&i2c4 {
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pinctrl-0 = <&i2c4m2_xfer>;
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clock-frequency = <400000>;
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status = "okay";
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max96745@42 {
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compatible = "maxim,max96745";
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reg = <0x42>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4_serdes_pins>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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serdes-init-sequence = [
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0070 0016
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0005 00c0
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0107 0042
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0027 0022
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0026 0022
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002a 0007
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641a 00f0
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];
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i2c4_max96745_pinctrl: i2c4-max96745-pinctrl {
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compatible = "maxim,max96745-pinctrl";
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status = "okay";
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i2c4_max96745_gpio: i2c4-max96745-gpio {
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compatible = "maxim,max96745-gpio";
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status = "okay";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&i2c4_max96745_pinctrl 0 210 25>;
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};
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};
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i2c4_max96745_bridge: i2c4-max96745-bridge {
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compatible = "maxim,max96745-bridge";
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lock-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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i2c4_max96745_in: endpoint {
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remote-endpoint = <&dp0_out>;
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};
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};
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port@1 {
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reg = <1>;
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i2c4_max96745_out: endpoint {
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remote-endpoint = <&i2c4_max96745_panel_in>;
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};
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};
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};
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};
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max96752@48 {
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compatible = "maxim,max96752";
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reg = <0x48>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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serdes-init-sequence = [
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0001 0002
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0002 0043
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0140 0020
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01ce 005e
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0200 0084
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020e 0040
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020c 0084
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0207 00a1
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0206 0083
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0215 0090
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0227 0090
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020f 0090
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0221 0090
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0212 0090
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0209 0090
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];
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i2c4_max96752_pinctrl: i2c4-max96752-pinctrl {
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compatible = "maxim,max96752-pinctrl";
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status = "okay";
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i2c4_max96752_gpio: i2c4-max96752-gpio {
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compatible = "maxim,max96752-gpio";
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status = "okay";
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gpio-controller;
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#gpio-cells = <2>;
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gpio-ranges = <&i2c4_max96752_pinctrl 0 236 25>;
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};
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};
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i2c4_max96752_panel: i2c4-max96752-panel {
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compatible = "maxim,max96752-panel";
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reg = <0x48>;
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backlight = <&i2c4_max96745_backlight>;
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panel-timing {
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clock-frequency = <148500000>;
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hactive = <1920>;
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vactive = <1080>;
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hfront-porch = <20>;
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hsync-len = <20>;
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hback-porch = <20>;
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vfront-porch = <250>;
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vsync-len = <2>;
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vback-porch = <8>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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port {
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i2c4_max96745_panel_in: endpoint {
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remote-endpoint = <&i2c4_max96745_out>;
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};
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};
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};
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};
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};
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&i2c5 {
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clock-frequency = <400000>;
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status = "okay";
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max96745@42 {
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compatible = "maxim,max96745";
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reg = <0x42>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_serdes_pins>;
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lock-gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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serdes-init-sequence = [
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0070 0016
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0005 00c0
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0107 0042
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0027 0022
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0026 0022
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002a 0007
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641a 00f0
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];
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i2c5_max96745_pinctrl: i2c5-max96745-pinctrl {
|
|
compatible = "maxim,max96745-pinctrl";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c5_max96745_pinctrl_hog>, <&i2c5_max96745_panel_pins>;
|
|
status = "okay";
|
|
|
|
i2c5_max96745_pinctrl_hog: hog {
|
|
i2c {
|
|
groups = "MAX96745_I2C";
|
|
function = "MAX96745_I2C";
|
|
};
|
|
};
|
|
|
|
i2c5_max96745_panel_pins: panel-pins {
|
|
bl-pwm {
|
|
pins = "MAX96745_MFP0";
|
|
function = "DES_GPIO0_OUTPUT_A";
|
|
};
|
|
};
|
|
|
|
i2c5_max96745_gpio: i2c5-max96745-gpio {
|
|
compatible = "maxim,max96745-gpio";
|
|
status = "okay";
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
gpio-ranges = <&i2c5_max96745_pinctrl 0 262 25>;
|
|
};
|
|
};
|
|
|
|
i2c5_max96745_bridge: i2c5-max96745-bridge {
|
|
compatible = "maxim,max96745-bridge";
|
|
status = "okay";
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
i2c5_max96745_in: endpoint {
|
|
remote-endpoint = <&edp0_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
i2c5_max96745_out: endpoint {
|
|
remote-endpoint = <&i2c5_max96745_panel_in>;
|
|
};
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
|
|
max96752@48 {
|
|
compatible = "maxim,max96752";
|
|
reg = <0x48>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
serdes-init-sequence = [
|
|
0001 0002
|
|
0002 0043
|
|
0140 0020
|
|
01ce 005e
|
|
0200 0084
|
|
020e 0040
|
|
020c 0084
|
|
0207 00a1
|
|
0206 0083
|
|
0215 0090
|
|
0227 0090
|
|
020f 0090
|
|
0221 0090
|
|
0212 0090
|
|
0209 0090
|
|
];
|
|
|
|
i2c5_max96752_pinctrl: i2c5-max96752-pinctrl {
|
|
compatible = "maxim,max96752-pinctrl";
|
|
status = "okay";
|
|
|
|
i2c5_max96752_gpio: i2c5-max96752-gpio {
|
|
compatible = "maxim,max96752-gpio";
|
|
status = "okay";
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
gpio-ranges = <&i2c5_max96752_pinctrl 0 288 25>;
|
|
};
|
|
};
|
|
|
|
i2c5_max96752_panel: i2c5-max96752-panel {
|
|
compatible = "maxim,max96752-panel";
|
|
reg = <0x48>;
|
|
backlight = <&i2c5_max96745_backlight>;
|
|
panel-size= <346 194>;
|
|
|
|
panel-timing {
|
|
clock-frequency = <148500000>;
|
|
hactive = <1920>;
|
|
vactive = <1080>;
|
|
hfront-porch = <20>;
|
|
hsync-len = <20>;
|
|
hback-porch = <20>;
|
|
vfront-porch = <250>;
|
|
vsync-len = <2>;
|
|
vback-porch = <8>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
|
|
port {
|
|
i2c5_max96745_panel_in: endpoint {
|
|
remote-endpoint = <&i2c5_max96745_out>;
|
|
};
|
|
};
|
|
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c6 {
|
|
pinctrl-0 = <&i2c6m3_xfer>;
|
|
clock-frequency = <400000>;
|
|
status = "okay";
|
|
|
|
max96755f@40 {
|
|
compatible = "maxim,max96755f";
|
|
reg = <0x40>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c6_serdes_pins>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
|
|
|
|
pinctrl {
|
|
compatible = "maxim,max96755f-pinctrl";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c6_max96755f_pinctrl_hog>;
|
|
|
|
i2c6_max96755f_pinctrl_hog: hog {
|
|
i2c {
|
|
groups = "I2C";
|
|
function = "I2C";
|
|
};
|
|
};
|
|
|
|
|
|
i2c6_max96755f_panel_pins: panel-pins {
|
|
bl-pwm {
|
|
pins = "MFP18";
|
|
function = "GPIO_TX_0";
|
|
};
|
|
};
|
|
};
|
|
|
|
bridge {
|
|
compatible = "maxim,max96755f-bridge";
|
|
lock-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
i2c6_max96755f_in: endpoint {
|
|
remote-endpoint = <&dsi1_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
i2c6_max96755f_out: endpoint {
|
|
remote-endpoint = <&i2c6_max96755f_panel_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
gmsl@0 {
|
|
reg = <0>;
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
panel@48 {
|
|
compatible = "boe,av156fht-l83";
|
|
reg = <0x48>;
|
|
backlight = <&i2c6_max96755f_backlight>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c6_max96755f_panel_pins>;
|
|
|
|
panel-timing {
|
|
clock-frequency = <148500000>;
|
|
hactive = <1920>;
|
|
vactive = <1080>;
|
|
hfront-porch = <20>;
|
|
hsync-len = <20>;
|
|
hback-porch = <20>;
|
|
vfront-porch = <250>;
|
|
vsync-len = <2>;
|
|
vback-porch = <8>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
|
|
port {
|
|
i2c6_max96755f_panel_in: endpoint {
|
|
remote-endpoint = <&i2c6_max96755f_out>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c7 {
|
|
pinctrl-0 = <&i2c7m3_xfer>;
|
|
clock-frequency = <400000>;
|
|
status = "disabled";
|
|
|
|
max96745@42 {
|
|
compatible = "maxim,max96745";
|
|
reg = <0x42>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c7_serdes_pins>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
|
|
|
|
pinctrl {
|
|
compatible = "maxim,max96745-pinctrl";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c7_max96745_pinctrl_hog>;
|
|
|
|
i2c7_max96745_pinctrl_hog: hog {
|
|
i2c {
|
|
groups = "I2C";
|
|
function = "I2C";
|
|
};
|
|
};
|
|
|
|
i2c7_max96745_panel_pins: panel-pins {
|
|
bl-pwm {
|
|
pins = "MFP0";
|
|
function = "GPIO_TX_A_0";
|
|
};
|
|
};
|
|
};
|
|
|
|
bridge {
|
|
compatible = "maxim,max96745-bridge";
|
|
lock-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
i2c7_max96745_in: endpoint {
|
|
remote-endpoint = <&edp1_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
i2c7_max96745_out: endpoint {
|
|
remote-endpoint = <&i2c7_max96745_panel_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
gmsl@0 {
|
|
reg = <0>;
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
panel@48 {
|
|
compatible = "boe,av156fht-l83";
|
|
reg = <0x48>;
|
|
backlight = <&i2c7_max96745_backlight>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c7_max96745_panel_pins>;
|
|
|
|
panel-timing {
|
|
clock-frequency = <148500000>;
|
|
hactive = <1920>;
|
|
vactive = <1080>;
|
|
hfront-porch = <20>;
|
|
hsync-len = <20>;
|
|
hback-porch = <20>;
|
|
vfront-porch = <250>;
|
|
vsync-len = <2>;
|
|
vback-porch = <8>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
|
|
port {
|
|
i2c7_max96745_panel_in: endpoint {
|
|
remote-endpoint = <&i2c7_max96745_out>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&i2c8 {
|
|
pinctrl-0 = <&i2c8m2_xfer>;
|
|
clock-frequency = <400000>;
|
|
status = "disabled";
|
|
|
|
max96745@42 {
|
|
compatible = "maxim,max96745";
|
|
reg = <0x42>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c8_serdes_pins>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
|
|
|
|
pinctrl {
|
|
compatible = "maxim,max96745-pinctrl";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c8_max96745_pinctrl_hog>;
|
|
|
|
i2c8_max96745_pinctrl_hog: hog {
|
|
i2c {
|
|
groups = "I2C";
|
|
function = "I2C";
|
|
};
|
|
};
|
|
|
|
i2c8_max96745_panel_pins: panel-pins {
|
|
bl-pwm {
|
|
pins = "MFP0";
|
|
function = "GPIO_TX_A_0";
|
|
};
|
|
};
|
|
};
|
|
|
|
bridge {
|
|
compatible = "maxim,max96745-bridge";
|
|
lock-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
i2c8_max96745_in: endpoint {
|
|
remote-endpoint = <&dp1_out>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
i2c8_max96745_out: endpoint {
|
|
remote-endpoint = <&i2c8_max96745_panel_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
gmsl@0 {
|
|
reg = <0>;
|
|
clock-frequency = <400000>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
panel@48 {
|
|
compatible = "boe,av156fht-l83";
|
|
reg = <0x48>;
|
|
backlight = <&i2c8_max96745_backlight>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&i2c8_max96745_panel_pins>;
|
|
|
|
panel-timing {
|
|
clock-frequency = <148500000>;
|
|
hactive = <1920>;
|
|
vactive = <1080>;
|
|
hfront-porch = <20>;
|
|
hsync-len = <20>;
|
|
hback-porch = <20>;
|
|
vfront-porch = <250>;
|
|
vsync-len = <2>;
|
|
vback-porch = <8>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
|
|
port {
|
|
i2c8_max96745_panel_in: endpoint {
|
|
remote-endpoint = <&i2c8_max96745_out>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pinctrl {
|
|
serdes {
|
|
i2c2_serdes_pins: i2c2-serdes-pins {
|
|
rockchip,pins =
|
|
<1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
i2c4_serdes_pins: i2c4-serdes-pins {
|
|
rockchip,pins =
|
|
<3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
i2c5_serdes_pins: i2c5-serdes-pins {
|
|
rockchip,pins =
|
|
<0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
i2c6_serdes_pins: i2c6-serdes-pins {
|
|
rockchip,pins =
|
|
<1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
i2c7_serdes_pins: i2c7-serdes-pins {
|
|
rockchip,pins =
|
|
<4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
|
|
i2c8_serdes_pins: i2c8-serdes-pins {
|
|
rockchip,pins =
|
|
<3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm0 {
|
|
pinctrl-0 = <&pwm0m2_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm10 {
|
|
pinctrl-0 = <&pwm10m2_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm11 {
|
|
pinctrl-0 = <&pwm11m3_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm7 {
|
|
pinctrl-0 = <&pwm7m0_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm13 {
|
|
pinctrl-0 = <&pwm13m1_pins>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm14 {
|
|
pinctrl-0 = <&pwm14m0_pins>;
|
|
status = "okay";
|
|
};
|