557 lines
15 KiB
Plaintext
Executable File
557 lines
15 KiB
Plaintext
Executable File
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*
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*/
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/dts-v1/;
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//rk3568-evb1-ddr4-v10
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// #include "rk3568-evb1-ddr4-v10.dtsi"
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//#include "rk3568-base-no-rk809.dtsi"
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#include "rk3568-evb-rpdzkj-pwm-pwm-syr837.dtsi"
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#include "../rk3568-linux.dtsi"
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/*************************camera***********************/
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#include "rp-camera-mipi-gc2093-single-2lane.dtsi"
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/***************************************************/
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/*************************adc key***********************/
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#include "rp-adc-key.dtsi"
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/***************************************************/
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/*************************CAN**********************/
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#include "rp-can1-m1-rk3568.dtsi"
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/**************************************************/
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/*********************PCIE**************************/
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#include "rk3568-pcie2x1.dtsi"
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#include "rk3568-pcie3x1x1.dtsi"
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#include "rk3568-pcie3x2.dtsi"
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/***************************************************/
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/*************************SATA***********************/
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//#include "rk3568-sata2.dtsi"
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/***************************************************/
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/* audio */
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#include "rp-audio-es8311.dtsi"
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#include "lcd-gpio-nano-rk3568.dtsi" //gpio config for lcd
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/****** LCD config reference **/
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/** single HDMI */
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//#include "rp-lcd-hdmi.dtsi"
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/** mipi0 +hdmi */
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//#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
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//#include "rp-lcd-mipi0-7-720-1280.dtsi"
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#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
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//#include "rp-lcd-mipi0-10-800-1280-v3.dtsi"
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//#include "rp-lcd-mipi0-10-1200-1920.dtsi"
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/** MIPI1toLVDS + HDMI */
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//#include "rp-lcd-mipi1tolvds-gm8775c-10-1024-600-raw.dtsi"
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//#include "rp-lcd-mipi1tolvds-gm8775c-1920-1080.dtsi"
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/** LVDS + HDMI */
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//#include "rp-lcd-lvds-7-1024-600-v2.dtsi"
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//#include "rp-lcd-lvds-10-1280-800.dtsi"
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/** EDP + HDMI */
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//#include "rp-lcd-edp-13-1920-1080.dtsi"
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//#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi"
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/{
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model = "nano-rk3568";
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compatible = "rpdzkj,nano-rk3568", "rockchip,rk3568";
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fan_gpio_control {
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compatible = "fan_gpio_control";
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gpio-pin = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
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thermal-zone = "soc-thermal";
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threshold-temp = <60000>; //60C
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running-time = <10000>; //10s
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status = "okay";
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};
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rp_power{
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status = "okay";
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compatible = "rp_power";
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rp_not_deep_sleep = <1>;
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pinctrl-names = "default";
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pinctrl-0 = <&led_pin &fan_pin &usb_pins>;
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//#define GPIO_FUNCTION_OUTPUT 0
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//#define GPIO_FUNCTION_INPUT 1
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//#define GPIO_FUNCTION_IRQ 2
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//#define GPIO_FUNCTION_FLASH 3
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//#define GPIO_FUNCTION_OUTPUT_CTRL 4
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/**
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* gpioxxx { // the node name will display on /proc/rp_power, you can define any character string
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* gpio_num = <>; // gpio you want ot control
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* gpio_function = <>; // function of current gpio, refer to above define.
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* };
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*/
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led { //system led
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gpio_num = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
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gpio_function = <3>;
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};
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//fan { //fan
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// gpio_num = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
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// gpio_function = <4>;
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//};
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otg_power { //usb otg power
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gpio_num = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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hub_rst { //usb hub
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gpio_num = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb3_pwr { //usb3 power en
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gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb2_vdd0 { //usb2.0_vdd0 power en
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gpio_num = <&gpio4 RK_PB7 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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usb2_vdd1 { //usb2.0_vdd1 power en
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gpio_num = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_en { //spk enable
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gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
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gpio_function = <4>;
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};
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spk_mute { //spk mute
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gpio_num = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>;
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gpio_function = <4>;
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};
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};
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rp_gpio{
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status = "okay";
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compatible = "rp_gpio";
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/**
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* gpioxxx { // the node name will display on /proc/rp_gpio, you can define any character string
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* gpio_num = <>; // gpio you want ot control
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* gpio_function = <>; // function of current gpio： 0 output, 1 input, 3 blink
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* gpio_event = <KEY_F14>; // optional property used to define gpio report event such as KEY_F14, only works incase of gpio_function = <1>;
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* };
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*/
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/*
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gpio3_a7 {
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gpio_num = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio3_b0 {
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gpio_num = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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*/
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gpio4_a0 {
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gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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gpio4_a1 {
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gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>;
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gpio_function = <0>;
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};
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};
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stm706 {
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status = "okay";
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compatible = "stm706";
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reset_gpio = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
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wdt_gpio = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>;
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};
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vcc3v3_pi6c: vcc3v3_pi6c { //pcie3 clk enable for m.2
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pi6c";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&pcie_clk_control>;
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};
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vdd3v3_m2: vdd3v3_m2 { //m.2 power enable
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compatible = "regulator-fixed";
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regulator-name = "vdd3v3_m2";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vdd_m2_control>;
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};
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fiq-debugger {
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compatible = "rockchip,fiq-debugger";
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rockchip,serial-id = <2>;
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rockchip,wake-irq = <0>;
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/* If enable uart uses irq instead of fiq */
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rockchip,irq-mode-enable = <1>;
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rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */
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interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2m0_xfer>;
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status = "okay";
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};
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};
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&vcc5v0_sys {
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enable-active-high;
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gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&vcc5v0_pin>;
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};
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&vdd_3v3 {
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enable-active-high;
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pinctrl-names = "default";
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pinctrl-0 = <&vdd3v3_pin>;
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gpio = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>;
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};
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&vcc3v3_sd {
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// enable-active-high; //active low
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pinctrl-names = "default";
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pinctrl-0 = <&vcc3v3_sd_pin>;
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gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
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};
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&vdd_cpu {
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pinctrl-names = "default";
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pinctrl-0 = <&vsel1_gpio>;
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vsel-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>;
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};
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&pmu_io_domains {
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status = "okay";
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pmuio2-supply = <&vcc3v3_pmu>;
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vccio1-supply = <&vcc_3v3>;
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vccio3-supply = <&vcc_3v3>;
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vccio4-supply = <&vcc_3v3>;
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vccio5-supply = <&vcc_3v3>;
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vccio6-supply = <&vcc_1v8>;
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vccio7-supply = <&vcc_3v3>;
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};
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&i2c1 {
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status = "okay";
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rtc@51 {
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status = "okay";
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compatible = "rtc,hym8563";
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reg = <0x51>;
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// irq_gpio = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
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};
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};
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&i2c2
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{
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2m1_xfer>;
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};
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&i2c4
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{
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m0_xfer>;
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};
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&i2c5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5m0_xfer>;
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};
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&uart0 {
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status = "disabled";
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};
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&uart3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart3m1_xfer>;
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};
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&uart4 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart4m0_xfer>;
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};
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&uart5 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart5m1_xfer>;
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};
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&uart7 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart7m1_xfer>;
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};
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&spi2 {
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status = "okay";
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pinctrl-0 = <&spi2m1_cs0 &spi2m1_pins>;
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pinctrl-1 = <&spi2m1_cs0 &spi2m1_pins_hs>;
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spi_dev@0 {
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compatible = "rockchip,spidev";
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reg = <0>;
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spi-max-frequency = <12000000>;
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spi-lsb-first;
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};
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};
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/******** must be close,if not system no run ******/
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&dmc {
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status = "disabled";
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};
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&dfi {
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status = "disabled";
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};
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/*********************************************/
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&pwm1 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm1m0_pins>;
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};
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&pwm2 {
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status = "okay";
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pinctrl-names = "active";
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pinctrl-0 = <&pwm2m0_pins>;
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};
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&pwm12{
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status = "disabled";
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pinctrl-0 = <&pwm12m1_pins>;
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pinctrl-names = "active";
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};
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&pwm13{
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status = "disabled";
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pinctrl-0 = <&pwm13m1_pins>;
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pinctrl-names = "active";
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};
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/** LCD backlight
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* By default, we all use backlight5 node whether it is mipi, lvds or edp,
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*/
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/** LCD configuration */
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#if defined(RP_SINGLE_LCD)
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#if defined(RP_MIPI12LVDS)
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&backlight5 {
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pwms = <&pwm8 0 25000 1>;
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};
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#if defined(RP_DUALLVDS)
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&backlight5 {
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pwms = <&pwm8 0 25000 0>;
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};
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#endif
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#endif
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#endif
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/** headphone detect pin */
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&rk_headset {
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status = "disabled";
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pinctrl-0 = <&hp_det>;
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};
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/** wifi/bt config */
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&sdio_pwrseq {
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pinctrl-0 = <&wifi_enable_h>;
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reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>;
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};
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&sdmmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
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status = "okay";
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};
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&sdmmc1 {
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status = "disabled";
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};
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&wireless_wlan {
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
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};
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&wireless_bluetooth {
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uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>;
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pinctrl-0 = <&uart1m1_rtsn>;
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pinctrl-1 = <&uart1_gpios>;
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BT,reset_gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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BT,wake_gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>;
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};
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&uart8 {
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status = "disabled";
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};
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/** pcie2x1 */
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&vcc3v3_pcie {
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/**
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* delete for gpio used to be bt_wake_host
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* and the vcc3v3_pcie need not control on our board.
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*/
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/delete-property/ gpio;
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};
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/******* pcie2x1x1 -rtl8111hs*****/
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&pcie2x1 {
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status = "okay";
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reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
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};
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/******* pcie3x1x1 -rtl8111hs*****/
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&pcie3x1 {
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status = "okay";
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reset-gpios = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
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};
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/******* pcie3x2x1 -m.2*****/
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&pcie3x2 {
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status = "okay";
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reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>;
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};
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&pinctrl {
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pmic {
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vsel1_gpio: vsel1-gpio {
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rockchip,pins =
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<0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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power_pins {
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vdd3v3_pin: vdd3v3-pin {
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rockchip,pins =
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<4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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vcc5v0_pin: vcc5v0-pin {
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rockchip,pins =
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<4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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vcc3v3_sd_pin: vcc3v3-sd-pin {
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rockchip,pins =
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<0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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led_pin: led-pin {
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rockchip,pins =
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<0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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fan_pin: fan-pin {
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rockchip,pins =
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<4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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usb_pins: usb-pins {
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rockchip,pins =
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/* otg power en */
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<4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>,
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/* hub reset pin */
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<3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>,
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/* usb3.0 power en */
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<4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
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/* usb2.0 vdd0 en */
|
||
<4 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
|
||
/* usb2.0 vdd1 en */
|
||
<3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
};
|
||
};
|
||
|
||
headphone { //redefine hp detect pin
|
||
hp_det: hp-det {
|
||
rockchip,pins =
|
||
<2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_down>;
|
||
};
|
||
};
|
||
|
||
sdio-pwrseq { //redefine sdio power pin
|
||
wifi_enable_h: wifi-enable-h {
|
||
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
|
||
};
|
||
};
|
||
wireless-wlan { //redefine wlaD4wake host pin
|
||
wifi_host_wake_irq: wifi-host-wake-irq {
|
||
rockchip,pins = <3 RK_PD4 0 &pcfg_pull_down>;
|
||
};
|
||
};
|
||
wireless-bluetooth {
|
||
uart1_gpios: uart1-gpios {
|
||
rockchip,pins = <4 RK_PB6 0 &pcfg_pull_none>;
|
||
};
|
||
};
|
||
|
||
pcie3_control{
|
||
pcie_clk_control: pcie_clk_control {
|
||
rockchip,pins =
|
||
<4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
};
|
||
vdd_m2_control: vdd_m2_control {
|
||
rockchip,pins =
|
||
<4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
|
||
};
|
||
};
|
||
};
|
||
|