546 lines
18 KiB
Plaintext
Executable File
546 lines
18 KiB
Plaintext
Executable File
/ {
|
|
|
|
backlight: backlight {
|
|
status = "okay";
|
|
compatible = "pwm-backlight";
|
|
pwms = <&pwm0 0 25000 0>;
|
|
brightness-levels = <
|
|
0 1 2 3 4 5 6 7
|
|
8 9 10 11 12 13 14 15
|
|
16 17 18 19 20 21 22 23
|
|
24 25 26 27 28 29 30 31
|
|
32 33 34 35 36 37 38 39
|
|
40 41 42 43 44 45 46 47
|
|
48 49 50 51 52 53 54 55
|
|
56 57 58 59 60 61 62 63
|
|
64 65 66 67 68 69 70 71
|
|
72 73 74 75 76 77 78 79
|
|
80 81 82 83 84 85 86 87
|
|
88 89 90 91 92 93 94 95
|
|
96 97 98 99 100 101 102 103
|
|
104 105 106 107 108 109 110 111
|
|
112 113 114 115 116 117 118 119
|
|
120 121 122 123 124 125 126 127
|
|
128 129 130 131 132 133 134 135
|
|
136 137 138 139 140 141 142 143
|
|
144 145 146 147 148 149 150 151
|
|
152 153 154 155 156 157 158 159
|
|
160 161 162 163 164 165 166 167
|
|
168 169 170 171 172 173 174 175
|
|
176 177 178 179 180 181 182 183
|
|
184 185 186 187 188 189 190 191
|
|
192 193 194 195 196 197 198 199
|
|
200 201 202 203 204 205 206 207
|
|
208 209 210 211 212 213 214 215
|
|
216 217 218 219 220 221 222 223
|
|
224 225 226 227 228 229 230 231
|
|
232 233 234 235 236 237 238 239
|
|
240 241 242 243 244 245 246 247
|
|
248 249 250 251 252 253 254 255>;
|
|
default-brightness-level = <255>;
|
|
};
|
|
};
|
|
|
|
|
|
&hdmi {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
#sound-dai-cells = <0>;
|
|
ddc-i2c-scl-high-time-ns = <9625>;
|
|
ddc-i2c-scl-low-time-ns = <10000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm0 {
|
|
status = "okay";
|
|
};
|
|
|
|
|
|
&display_subsystem {
|
|
status = "okay";
|
|
|
|
ports = <&vopb_out>, <&vopl_out>;
|
|
logo-memory-region = <&drm_logo>;
|
|
|
|
route {
|
|
route_hdmi: route-hdmi {
|
|
status = "okay";
|
|
logo,uboot = "logo.bmp";
|
|
logo,kernel = "logo_kernel.bmp";
|
|
logo,mode = "center";
|
|
charge_logo,mode = "center";
|
|
connect = <&vopl_out_hdmi>;
|
|
};
|
|
|
|
route_dsi: route-dsi {
|
|
|
|
status = "okay";
|
|
// status = "disabled";
|
|
logo,uboot = "logo.bmp";
|
|
logo,kernel = "logo_kernel.bmp";
|
|
logo,mode = "center";
|
|
charge_logo,mode = "center";
|
|
connect = <&vopb_out_dsi>;
|
|
};
|
|
|
|
route_dsi1: route-dsi1 {
|
|
status = "disabled";
|
|
logo,uboot = "logo.bmp";
|
|
logo,kernel = "logo_kernel.bmp";
|
|
logo,mode = "center";
|
|
charge_logo,mode = "center";
|
|
connect = <&vopl_out_dsi1>;
|
|
};
|
|
|
|
route_edp: route-edp {
|
|
status = "disabled";
|
|
logo,uboot = "logo.bmp";
|
|
logo,kernel = "logo_kernel.bmp";
|
|
logo,mode = "center";
|
|
charge_logo,mode = "center";
|
|
connect = <&vopb_out_edp>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&dsi {
|
|
status = "okay";
|
|
rockchip,lane-rate = <480>;
|
|
|
|
panel {
|
|
compatible ="simple-panel-dsi";
|
|
status = "okay";
|
|
reg = <0>;
|
|
power-supply = <&vcc3v3_sys>;
|
|
backlight = <&backlight>;
|
|
cmd_later_reset = <0>;
|
|
enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
|
|
reset-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
|
|
dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
|
|
// MIPI_DSI_MODE_VIDEO_SYNC_PULSE)>;
|
|
MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; /** 7inch 720x1280 must this mode */
|
|
dsi,format = <MIPI_DSI_FMT_RGB888>;
|
|
// bus-format = <MEDIA_BUS_FMT_RGB666_1X24>;
|
|
dsi,lanes = <4>;
|
|
reset-delay-ms = <100>;
|
|
init-delay-ms = <100>;
|
|
enable-delay-ms = <120>;
|
|
disable-delay-ms = <50>;
|
|
unprepare-delay-ms = <20>;
|
|
|
|
width-mm = <68>;
|
|
height-mm = <121>;
|
|
|
|
panel-init-sequence = [
|
|
39 00 02 E0 00
|
|
39 00 02 E1 93
|
|
39 00 02 E2 65
|
|
39 00 02 E3 F8
|
|
39 00 02 80 03
|
|
39 00 02 E0 04
|
|
39 00 02 2D 03
|
|
39 00 02 E0 00
|
|
39 00 02 70 10
|
|
39 00 02 71 13
|
|
39 00 02 72 06
|
|
39 00 02 75 03
|
|
|
|
39 00 02 E0 01
|
|
//39 00 02 4A 30
|
|
39 00 02 00 00
|
|
39 00 02 01 A0
|
|
39 00 02 03 00
|
|
39 00 02 04 A0
|
|
39 00 02 0A 07
|
|
39 00 02 0C 74
|
|
39 00 02 17 00
|
|
39 00 02 18 D7
|
|
39 00 02 19 01
|
|
39 00 02 1A 00
|
|
39 00 02 1B D7
|
|
39 00 02 1C 01
|
|
39 00 02 1F 74
|
|
39 00 02 20 19
|
|
39 00 02 21 19
|
|
39 00 02 22 0E
|
|
39 00 02 27 43
|
|
|
|
39 00 02 37 09
|
|
39 00 02 38 04
|
|
39 00 02 39 08
|
|
39 00 02 3A 18
|
|
39 00 02 3B 18
|
|
39 00 02 3C 72
|
|
39 00 02 3E FF
|
|
39 00 02 3E FF
|
|
39 00 02 3F FF
|
|
39 00 02 40 04
|
|
39 00 02 41 A0
|
|
39 00 02 43 08
|
|
39 00 02 44 07
|
|
39 00 02 45 30
|
|
39 00 02 55 01
|
|
39 00 02 56 01
|
|
39 00 02 57 65
|
|
39 00 02 58 0A
|
|
39 00 02 59 0A
|
|
39 00 02 5A 28
|
|
39 00 02 5B 0F
|
|
|
|
39 00 02 5D 7C
|
|
39 00 02 5E 5F
|
|
39 00 02 5F 4D
|
|
39 00 02 60 3F
|
|
39 00 02 61 39
|
|
39 00 02 62 29
|
|
39 00 02 63 2B
|
|
39 00 02 64 12
|
|
39 00 02 65 28
|
|
39 00 02 66 24
|
|
39 00 02 67 22
|
|
39 00 02 68 3E
|
|
39 00 02 69 2C
|
|
39 00 02 6A 33
|
|
39 00 02 6B 26
|
|
39 00 02 6C 23
|
|
39 00 02 6D 18
|
|
39 00 02 6E 09
|
|
39 00 02 6F 00
|
|
39 00 02 70 7C
|
|
39 00 02 71 5F
|
|
39 00 02 72 4D
|
|
39 00 02 73 3F
|
|
39 00 02 74 39
|
|
39 00 02 75 29
|
|
39 00 02 76 2B
|
|
39 00 02 77 12
|
|
39 00 02 78 28
|
|
39 00 02 79 24
|
|
39 00 02 7A 22
|
|
39 00 02 7B 3E
|
|
39 00 02 7C 2C
|
|
39 00 02 7D 33
|
|
39 00 02 7E 26
|
|
39 00 02 7F 23
|
|
39 00 02 80 18
|
|
39 00 02 81 09
|
|
39 00 02 82 00
|
|
|
|
39 00 02 E0 02
|
|
39 00 02 00 37
|
|
39 00 02 01 17
|
|
39 00 02 02 0A
|
|
39 00 02 03 06
|
|
39 00 02 04 08
|
|
39 00 02 05 04
|
|
39 00 02 06 00
|
|
39 00 02 07 1F
|
|
39 00 02 08 1F
|
|
39 00 02 09 1F
|
|
39 00 02 0A 1F
|
|
39 00 02 0B 1F
|
|
39 00 02 0C 1F
|
|
39 00 02 0D 1F
|
|
39 00 02 0E 1F
|
|
39 00 02 0F 1F
|
|
39 00 02 10 3F
|
|
39 00 02 11 1F
|
|
39 00 02 12 1F
|
|
39 00 02 13 1E
|
|
39 00 02 14 10
|
|
39 00 02 15 1F
|
|
|
|
39 00 02 16 37
|
|
39 00 02 17 17
|
|
39 00 02 18 0B
|
|
39 00 02 19 07
|
|
39 00 02 1A 09
|
|
39 00 02 1B 05
|
|
39 00 02 1C 01
|
|
39 00 02 1D 1F
|
|
39 00 02 1E 1F
|
|
39 00 02 1F 1F
|
|
39 00 02 20 1F
|
|
39 00 02 21 1F
|
|
39 00 02 22 1F
|
|
39 00 02 23 1F
|
|
39 00 02 24 1F
|
|
39 00 02 25 1F
|
|
39 00 02 26 1F
|
|
39 00 02 27 1F
|
|
39 00 02 28 1F
|
|
39 00 02 29 1E
|
|
39 00 02 2A 11
|
|
39 00 02 2B 1F
|
|
39 00 02 2C 37
|
|
39 00 02 2D 17
|
|
39 00 02 2E 05
|
|
39 00 02 2F 09
|
|
39 00 02 30 07
|
|
39 00 02 31 0B
|
|
39 00 02 32 11
|
|
39 00 02 33 1F
|
|
39 00 02 34 1F
|
|
39 00 02 35 1F
|
|
39 00 02 36 1F
|
|
39 00 02 37 1F
|
|
39 00 02 38 1F
|
|
39 00 02 39 1F
|
|
39 00 02 3A 1F
|
|
39 00 02 3B 1F
|
|
39 00 02 3C 3F
|
|
39 00 02 3D 1F
|
|
39 00 02 3E 1E
|
|
39 00 02 3F 1F
|
|
39 00 02 40 01
|
|
|
|
39 00 02 41 1F
|
|
39 00 02 42 38
|
|
39 00 02 43 18
|
|
39 00 02 44 04
|
|
39 00 02 45 08
|
|
39 00 02 46 06
|
|
39 00 02 47 0A
|
|
39 00 02 48 10
|
|
39 00 02 49 1F
|
|
39 00 02 4A 1F
|
|
39 00 02 4B 1F
|
|
39 00 02 4C 1F
|
|
39 00 02 4D 1F
|
|
39 00 02 4E 1F
|
|
39 00 02 4F 1F
|
|
39 00 02 50 1F
|
|
39 00 02 51 1F
|
|
39 00 02 52 1F
|
|
39 00 02 53 1F
|
|
39 00 02 54 1E
|
|
39 00 02 55 1F
|
|
39 00 02 56 00
|
|
39 00 02 57 1F
|
|
39 00 02 58 10
|
|
39 00 02 59 00
|
|
39 00 02 5A 00
|
|
39 00 02 5B 10
|
|
39 00 02 5C 01
|
|
39 00 02 5D 50
|
|
39 00 02 5E 01
|
|
39 00 02 5F 02
|
|
39 00 02 60 30
|
|
39 00 02 61 01
|
|
39 00 02 62 02
|
|
39 00 02 63 06
|
|
39 00 02 64 6A
|
|
39 00 02 65 55
|
|
39 00 02 66 08
|
|
39 00 02 67 73
|
|
39 00 02 68 05
|
|
39 00 02 69 08
|
|
39 00 02 6A 6E
|
|
39 00 02 6B 00
|
|
39 00 02 6C 00
|
|
39 00 02 6D 00
|
|
39 00 02 6E 00
|
|
39 00 02 6F 88
|
|
39 00 02 70 00
|
|
39 00 02 71 00
|
|
39 00 02 72 06
|
|
39 00 02 73 7B
|
|
39 00 02 74 00
|
|
39 00 02 75 80
|
|
39 00 02 76 00
|
|
39 00 02 77 0D
|
|
39 00 02 78 18
|
|
39 00 02 79 00
|
|
39 00 02 7A 00
|
|
39 00 02 7B 00
|
|
39 00 02 7C 00
|
|
39 00 02 7D 03
|
|
39 00 02 7E 7B
|
|
39 00 02 E0 04
|
|
39 00 02 04 01
|
|
39 00 02 0E 38
|
|
39 00 02 2B 2B
|
|
39 00 02 2E 44
|
|
39 00 02 E0 00
|
|
39 00 02 E6 02
|
|
39 00 02 E6 02
|
|
//39 00 02 36 00
|
|
39 C8 02 11 00
|
|
39 C8 02 29 00
|
|
05 78 01 11//delay 120MS
|
|
05 78 01 29
|
|
//39 C8 02 35 00
|
|
];
|
|
|
|
panel-exit-sequence = [
|
|
05 78 01 28
|
|
05 78 01 10
|
|
];
|
|
|
|
display-timings {
|
|
native-mode = <&timing0>;
|
|
timing0: timing0 {
|
|
clock-frequency = <70000000>;
|
|
hactive = <720>;
|
|
vactive = <1280>;
|
|
hback-porch = <34>;
|
|
hfront-porch = <34>;
|
|
vback-porch = <6>;
|
|
vfront-porch = <20>;
|
|
hsync-len = <24>;
|
|
vsync-len = <3>;
|
|
hsync-active = <0>;
|
|
vsync-active = <0>;
|
|
de-active = <0>;
|
|
pixelclk-active = <0>;
|
|
};
|
|
};
|
|
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
panel_in_dsi: endpoint {
|
|
remote-endpoint = <&dsi_out_panel>;
|
|
};
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
dsi_out_panel: endpoint {
|
|
remote-endpoint = <&panel_in_dsi>;
|
|
};
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
&vopb {
|
|
assigned-clocks = <&cru DCLK_VOP0_DIV>;
|
|
assigned-clock-parents = <&cru PLL_CPLL>;
|
|
//assigned-clock-parents = <&cru PLL_VPLL>;
|
|
status = "okay";
|
|
};
|
|
|
|
&vopb_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl {
|
|
assigned-clocks = <&cru DCLK_VOP1_DIV>;
|
|
assigned-clock-parents = <&cru PLL_VPLL>;
|
|
//assigned-clock-parents = <&cru PLL_CPLL>;
|
|
status = "okay";
|
|
};
|
|
|
|
&vopl_mmu {
|
|
status = "okay";
|
|
};
|
|
|
|
&dsi_in_vopl {
|
|
status = "disabled";
|
|
};
|
|
|
|
&dsi_in_vopb {
|
|
status = "okay";
|
|
};
|
|
|
|
&hdmi_in_vopb {
|
|
status = "disabled";
|
|
};
|
|
|
|
&hdmi_in_vopl {
|
|
status = "okay";
|
|
};
|
|
|
|
&edp_in_vopb {
|
|
status = "disabled";
|
|
};
|
|
&edp_in_vopl {
|
|
status = "disabled";
|
|
};
|
|
|
|
&dsi1_in_vopb {
|
|
status = "disabled";
|
|
};
|
|
&dsi1_in_vopl {
|
|
status = "disabled";
|
|
};
|
|
|
|
&route_hdmi {
|
|
status = "okay";
|
|
connect = <&vopl_out_hdmi>;
|
|
};
|
|
|
|
&route_dsi {
|
|
status = "okay";
|
|
connect = <&vopb_out_dsi>;
|
|
};
|
|
|
|
|
|
//TP
|
|
&i2c4 {
|
|
status = "okay";
|
|
goodix_ts@5d {
|
|
compatible = "goodix,gt9xx";
|
|
reg = <0x5d>;
|
|
gtp_resolution_x = <720>;
|
|
gtp_resolution_y = <1280>;
|
|
gtp_int_tarigger = <1>;
|
|
gtp_change_x2y = <0>;
|
|
gtp_overturn_x = <0>;
|
|
gtp_overturn_y = <0>;
|
|
gtp_send_cfg = <1>;
|
|
gtp_touch_wakeup = <1>;
|
|
goodix_rst_gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
|
|
goodix_irq_gpio = <&gpio1 22 IRQ_TYPE_EDGE_FALLING>;
|
|
|
|
goodix,cfg-group0 = [
|
|
57 58 02 00 04 05 35 00 01 08 32 0F
|
|
5A 32 03 05 00 00 00 00 02 00 00 18
|
|
1A 1E 14 8A 2A 0C 55 57 B5 06 00 00
|
|
00 20 33 1C 14 01 00 0F 00 2B FF 7F
|
|
19 46 32 3C 78 94 D5 02 08 00 00 04
|
|
98 40 00 8A 4A 00 80 55 00 77 61 00
|
|
6F 70 00 6F 00 00 00 00 F0 40 30 FF
|
|
FF 27 00 00 00 00 00 00 00 00 00 00
|
|
00 00 00 00 00 00 00 00 00 00 00 00
|
|
00 00 00 00 18 16 14 12 10 0E 0C 0A
|
|
08 06 04 02 FF FF FF FF FF FF FF FF
|
|
FF FF FF FF FF FF FF FF FF FF 24 22
|
|
21 20 1F 1E 1D 1C 18 16 00 02 04 06
|
|
08 0A 0F 10 12 13 FF FF FF FF FF FF
|
|
FF FF FF FF FF FF FF FF FF FF FF FF
|
|
FF FF FF FF 81 01];
|
|
|
|
goodix,cfg-group5 = [
|
|
57 58 02 00 04 05 35 00 01 08 32 0F
|
|
5A 32 03 05 00 00 00 00 02 00 00 18
|
|
1A 1E 14 8A 2A 0C 55 57 B5 06 00 00
|
|
00 20 33 1C 14 01 00 0F 00 2B FF 7F
|
|
19 46 32 3C 78 94 D5 02 08 00 00 04
|
|
98 40 00 8A 4A 00 80 55 00 77 61 00
|
|
6F 70 00 6F 00 00 00 00 F0 40 30 FF
|
|
FF 27 00 00 00 00 00 00 00 00 00 00
|
|
00 00 00 00 00 00 00 00 00 00 00 00
|
|
00 00 00 00 18 16 14 12 10 0E 0C 0A
|
|
08 06 04 02 FF FF FF FF FF FF FF FF
|
|
FF FF FF FF FF FF FF FF FF FF 24 22
|
|
21 20 1F 1E 1D 1C 18 16 00 02 04 06
|
|
08 0A 0F 10 12 13 FF FF FF FF FF FF
|
|
FF FF FF FF FF FF FF FF FF FF FF FF
|
|
FF FF FF FF 81 01];
|
|
|
|
};
|
|
};
|