/ { vcc_camera: vcc-camera-regulator { compatible = "regulator-fixed"; gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&camera_pwr>; regulator-name = "vcc_camera"; enable-active-high; regulator-always-on; regulator-boot-on; }; }; &i2c4 { status = "okay"; gc2093: gc2093@37 { compatible = "galaxycore,gc2093"; status = "okay"; reg = <0x37>; clocks = <&cru CLK_CIF_OUT>; clock-names = "xvclk"; power-domains = <&power RK3568_PD_VI>; pinctrl-names = "default"; pinctrl-0 = <&cif_clk>; pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; rockchip,camera-module-index = <0>; rockchip,camera-module-facing = "back"; rockchip,camera-module-name = "SIDB205300385-VA"; rockchip,camera-module-lens-name = "default"; port { ucam_out0: endpoint { remote-endpoint = <&mipi_in_ucam0>; data-lanes = <1 2>; }; }; }; }; &rkisp { status = "okay"; }; &rkisp_mmu { status = "okay"; }; &rkisp_vir0 { status = "okay"; port { #address-cells = <1>; #size-cells = <0>; isp0_in: endpoint@0 { reg = <0>; remote-endpoint = <&csidphy_out>; }; }; }; &csi2_dphy_hw { status = "okay"; }; &csi2_dphy1 { status = "okay"; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; mipi_in_ucam0: endpoint@1 { reg = <1>; remote-endpoint = <&ucam_out0>; data-lanes = <1 2>; }; }; port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; csidphy_out: endpoint@0 { reg = <0>; remote-endpoint = <&isp0_in>; }; }; }; }; &pinctrl { cam { camera_pwr: camera-pwr { rockchip,pins = /* camera power en */ <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; }; }; };