#include "rp-lcd-hdmi.dtsi" #define RP_SINGLE_LCD &dsi0 { status = "okay"; rockchip,lane-rate = <510>; dsi0_panel: panel@0 { status = "okay"; compatible = "simple-panel-dsi"; reg = <0>; reset-delay-ms = <60>; init-delay-ms = <60>; enable-delay-ms = <120>; prepare-delay-ms = <120>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; dsi,format = ; dsi,lanes = <4>; /** * power-supply = <>; * reset-gpios = <>; * * lcd reset pin and power supply * please refer to ***-lcd-gpio.dtsi * that included in main dts. */ panel-init-sequence = [ 15 00 02 E0 00 39 00 02 E1 93 39 00 02 E2 65 39 00 02 E3 F8 39 00 02 E0 00 39 00 02 70 10 39 00 02 71 13 39 00 02 72 06 39 00 02 80 03 39 00 02 E0 04 39 00 02 2D 03 39 00 02 E0 01 39 00 02 00 00 39 00 02 01 A0 39 00 02 03 00 39 00 02 04 A0 39 00 02 17 00 39 00 02 18 B1 39 00 02 19 01 39 00 02 1A 00 39 00 02 1B B1 39 00 02 1C 01 39 00 02 1F 3E 39 00 02 20 2D 39 00 02 21 2D 39 00 02 22 0E 39 00 02 37 19 39 00 02 38 05 39 00 02 39 08 39 00 02 3A 12 39 00 02 3C 78 39 00 02 3E 80 39 00 02 3F 80 39 00 02 40 06 39 00 02 41 A0 39 00 02 55 01 39 00 02 56 01 39 00 02 57 69 39 00 02 58 0A 39 00 02 59 0A 39 00 02 5A 28 39 00 02 5B 19 39 00 02 5D 7C 39 00 02 5E 65 39 00 02 5F 53 39 00 02 60 48 39 00 02 61 43 39 00 02 62 35 39 00 02 63 39 39 00 02 64 23 39 00 02 65 3D 39 00 02 66 3C 39 00 02 67 3D 39 00 02 68 5A 39 00 02 69 46 39 00 02 6A 57 39 00 02 6B 4B 39 00 02 6C 49 39 00 02 6D 2F 39 00 02 6E 03 39 00 02 6F 00 39 00 02 70 7C 39 00 02 71 65 39 00 02 72 53 39 00 02 73 48 39 00 02 74 43 39 00 02 75 35 39 00 02 76 39 39 00 02 77 23 39 00 02 78 3D 39 00 02 79 3C 39 00 02 7A 3D 39 00 02 7B 5A 39 00 02 7C 46 39 00 02 7D 57 39 00 02 7E 4B 39 00 02 7F 49 39 00 02 80 2F 39 00 02 81 03 39 00 02 82 00 39 00 02 E0 02 39 00 02 00 47 39 00 02 01 47 39 00 02 02 45 39 00 02 03 45 39 00 02 04 4B 39 00 02 05 4B 39 00 02 06 49 39 00 02 07 49 39 00 02 08 41 39 00 02 09 1F 39 00 02 0A 1F 39 00 02 0B 1F 39 00 02 0C 1F 39 00 02 0D 1F 39 00 02 0E 1F 39 00 02 0F 43 39 00 02 10 1F 39 00 02 11 1F 39 00 02 12 1F 39 00 02 13 1F 39 00 02 14 1F 39 00 02 15 1F 39 00 02 16 46 39 00 02 17 46 39 00 02 18 44 39 00 02 19 44 39 00 02 1A 4A 39 00 02 1B 4A 39 00 02 1C 48 39 00 02 1D 48 39 00 02 1E 40 39 00 02 1F 1F 39 00 02 20 1F 39 00 02 21 1F 39 00 02 22 1F 39 00 02 23 1F 39 00 02 24 1F 39 00 02 25 42 39 00 02 26 1F 39 00 02 27 1F 39 00 02 28 1F 39 00 02 29 1F 39 00 02 2A 1F 39 00 02 2B 1F 39 00 02 2C 11 39 00 02 2D 0F 39 00 02 2E 0D 39 00 02 2F 0B 39 00 02 30 09 39 00 02 31 07 39 00 02 32 05 39 00 02 33 18 39 00 02 34 17 39 00 02 35 1F 39 00 02 36 01 39 00 02 37 1F 39 00 02 38 1F 39 00 02 39 1F 39 00 02 3A 1F 39 00 02 3B 1F 39 00 02 3C 1F 39 00 02 3D 1F 39 00 02 3E 1F 39 00 02 3F 13 39 00 02 40 1F 39 00 02 41 1F 39 00 02 42 10 39 00 02 43 0E 39 00 02 44 0C 39 00 02 45 0A 39 00 02 46 08 39 00 02 47 06 39 00 02 48 04 39 00 02 49 18 39 00 02 4A 17 39 00 02 4B 1F 39 00 02 4C 00 39 00 02 4D 1F 39 00 02 4E 1F 39 00 02 4F 1F 39 00 02 50 1F 39 00 02 51 1F 39 00 02 52 1F 39 00 02 53 1F 39 00 02 54 1F 39 00 02 55 12 39 00 02 56 1F 39 00 02 57 1F 39 00 02 58 40 39 00 02 59 00 39 00 02 5A 00 39 00 02 5B 30 39 00 02 5C 03 39 00 02 5D 30 39 00 02 5E 01 39 00 02 5F 02 39 00 02 60 00 39 00 02 61 01 39 00 02 62 02 39 00 02 63 03 39 00 02 64 6B 39 00 02 65 00 39 00 02 66 00 39 00 02 67 73 39 00 02 68 05 39 00 02 69 06 39 00 02 6A 6B 39 00 02 6B 08 39 00 02 6C 00 39 00 02 6D 04 39 00 02 6E 04 39 00 02 6F 88 39 00 02 70 00 39 00 02 71 00 39 00 02 72 06 39 00 02 73 7B 39 00 02 74 00 39 00 02 75 07 39 00 02 76 00 39 00 02 77 5D 39 00 02 78 17 39 00 02 79 1F 39 00 02 7A 00 39 00 02 7B 00 39 00 02 7C 00 39 00 02 7D 03 39 00 02 7E 7B 39 00 02 E0 01 39 00 02 0E 01 39 00 02 E0 03 39 00 02 98 2F 39 00 02 E0 04 39 00 02 09 10 39 00 02 2B 2B 39 00 02 2E 44 39 00 02 E0 00 39 00 02 E6 02 39 00 02 E7 02 05 78 01 11 05 78 01 29 ]; panel-exit-sequence = [ 05 00 01 28 05 78 01 10 ]; disp_timings0: display-timings { native-mode = <&dsi0_timing0>; dsi0_timing0: timing0 { clock-frequency = <90000000>; hactive = <800>; vactive = <1280>; hback-porch = <96>; hfront-porch = <96>; vback-porch = <8>; vfront-porch = <8>; hsync-len = <6>; vsync-len = <4>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi: endpoint { remote-endpoint = <&dsi_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi_out_panel: endpoint { remote-endpoint = <&panel_in_dsi>; }; }; }; }; &dsi0_in_vp0 { status = "disabled"; }; &dsi0_in_vp1 { status = "okay"; }; &video_phy0 { status = "okay"; }; &route_dsi0 { status = "okay"; connect = <&vp1_out_dsi0>; }; >9xx { status = "okay"; compatible = "goodix,gt9xx"; reg = <0x5d>; gtp_resolution_x = <800>; gtp_resolution_y = <1280>; gtp_int_tarigger = <1>; gtp_change_x2y = <0>; gtp_overturn_x = <0>; gtp_overturn_y = <0>; gtp_send_cfg = <1>; gtp_touch_wakeup = <1>; /** * goodix_rst_gpio = <>; * goodix_irq_gpio = <>; * * touch panel interrupt and reset pin * please refer to ***-lcd-gpio.dtsi * that included in main dts. */ goodix,cfg-group0 = [ 45 20 03 00 05 05 35 00 01 C8 1E 0F 50 32 03 05 00 00 00 00 00 00 04 18 1A 1E 14 8C 2E 0E 1E 20 EB 04 00 00 00 BA 02 2D 00 00 00 00 00 03 00 00 00 00 00 0F 2D 94 D5 02 07 00 00 04 E6 10 00 BB 14 00 92 1A 00 78 20 00 61 28 00 61 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2A 29 28 26 24 22 21 20 1F 1E 1D 1C 18 16 00 02 04 06 08 0A 0C 0F 10 12 13 14 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 CB 01 ]; goodix,cfg-group5 = [ 00 20 03 00 05 0A 05 00 01 08 28 08 50 32 03 05 00 00 00 00 00 00 00 18 1A 1E 14 8C 2C 0E 17 15 31 0D 00 00 02 9B 04 1D 00 00 00 00 00 03 64 32 00 00 00 11 25 94 C5 02 07 00 00 04 60 12 00 5D 15 00 57 19 00 54 1D 00 4F 22 00 4F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 28 26 24 22 21 20 1F 1E 1D 1C 18 16 14 13 00 02 04 06 08 0A 0C 0F 10 12 FF FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2F 01]; };