#include "rp-lcd-hdmi.dtsi" #define RP_SINGLE_LCD &dsi0 { status = "okay"; rockchip,lane-rate = <480>; dsi0_panel: panel@0 { status = "okay"; compatible = "simple-panel-dsi"; reg = <0>; reset-delay-ms = <60>; init-delay-ms = <60>; enable-delay-ms = <120>; prepare-delay-ms = <120>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; dsi,format = ; dsi,lanes = <4>; /** * power-supply = <>; * reset-gpios = <>; * * lcd reset pin and power supply * please refer to ***-lcd-gpio.dtsi * that included in main dts. */ panel-init-sequence = [ 39 00 04 FF 98 81 03 39 00 02 01 00 39 00 02 02 00 39 00 02 03 57 //54 39 00 02 04 D3 //D4 39 00 02 05 00 39 00 02 06 11 39 00 02 07 08 //09 39 00 02 08 00 39 00 02 09 00 39 00 02 0a 3F //00 39 00 02 0b 00 39 00 02 0c 00 39 00 02 0d 00 39 00 02 0e 00 39 00 02 0f 3F //00 39 00 02 10 3F //00 39 00 02 11 00 39 00 02 12 00 39 00 02 13 00 39 00 02 14 00 39 00 02 15 00 39 00 02 16 00 39 00 02 17 00 39 00 02 18 00 39 00 02 19 00 39 00 02 1a 00 39 00 02 1b 00 39 00 02 1c 00 39 00 02 1d 00 39 00 02 1e 40 39 00 02 1f 80 39 00 02 20 06 39 00 02 21 01 39 00 02 22 00 39 00 02 23 00 39 00 02 24 00 39 00 02 25 00 39 00 02 26 00 39 00 02 27 00 39 00 02 28 33 39 00 02 29 33 39 00 02 2a 00 39 00 02 2b 00 39 00 02 2c 00 39 00 02 2d 00 39 00 02 2e 00 39 00 02 2f 00 39 00 02 30 00 39 00 02 31 00 39 00 02 32 00 39 00 02 33 00 39 00 02 34 00 39 00 02 35 00 39 00 02 36 00 39 00 02 37 00 39 00 02 38 78 39 00 02 39 00 39 00 02 3a 00 39 00 02 3b 00 39 00 02 3c 00 39 00 02 3d 00 39 00 02 3e 00 39 00 02 3f 00 39 00 02 40 00 39 00 02 41 00 39 00 02 42 00 39 00 02 43 00 //GCH/L 39 00 02 44 00 39 00 02 50 00 39 00 02 51 23 39 00 02 52 45 39 00 02 53 67 39 00 02 54 89 39 00 02 55 ab 39 00 02 56 01 39 00 02 57 23 39 00 02 58 45 39 00 02 59 67 39 00 02 5a 89 39 00 02 5b ab 39 00 02 5c cd 39 00 02 5d ef 39 00 02 5e 00 39 00 02 5f 0D //FW_CGOUT_L[1] 39 00 02 60 0D //FW_CGOUT_L[2] 39 00 02 61 0C //FW_CGOUT_L[3] 39 00 02 62 0C //FW_CGOUT_L[4] 39 00 02 63 0F //FW_CGOUT_L[5] 39 00 02 64 0F //FW_CGOUT_L[6] 39 00 02 65 0E //FW_CGOUT_L[7] 39 00 02 66 0E //FW_CGOUT_L[8] 39 00 02 67 08 //FW_CGOUT_L[9] 39 00 02 68 02 //FW_CGOUT_L[10] 39 00 02 69 02 //FW_CGOUT_L[11] 39 00 02 6a 02 //FW_CGOUT_L[12] 39 00 02 6b 02 //FW_CGOUT_L[13] 39 00 02 6c 02 //FW_CGOUT_L[14] 39 00 02 6d 02 //FW_CGOUT_L[15] 39 00 02 6e 02 //FW_CGOUT_L[16] 39 00 02 6f 02 //FW_CGOUT_L[17] 39 00 02 70 14 //FW_CGOUT_L[18] 39 00 02 71 15 //FW_CGOUT_L[19] 39 00 02 72 06 //FW_CGOUT_L[20] 39 00 02 73 02 //FW_CGOUT_L[21] 39 00 02 74 02 //FW_CGOUT_L[22] 39 00 02 75 0D //BW_CGOUT_L[1] 39 00 02 76 0D //BW_CGOUT_L[2] 39 00 02 77 0C //BW_CGOUT_L[3] 39 00 02 78 0C //BW_CGOUT_L[4] 39 00 02 79 0F //BW_CGOUT_L[5] 39 00 02 7a 0F //BW_CGOUT_L[6] 39 00 02 7b 0E //BW_CGOUT_L[7] 39 00 02 7c 0E //BW_CGOUT_L[8] 39 00 02 7d 08 //BW_CGOUT_L[9] 39 00 02 7e 02 //BW_CGOUT_L[10] 39 00 02 7f 02 //BW_CGOUT_L[11] 39 00 02 80 02 //BW_CGOUT_L[12] 39 00 02 81 02 //BW_CGOUT_L[13] 39 00 02 82 02 //BW_CGOUT_L[14] 39 00 02 83 02 //BW_CGOUT_L[15] 39 00 02 84 02 //BW_CGOUT_L[16] 39 00 02 85 02 //BW_CGOUT_L[17] 39 00 02 86 14 //BW_CGOUT_L[18] 39 00 02 87 15 //BW_CGOUT_L[19] 39 00 02 88 06 //BW_CGOUT_L[20] 39 00 02 89 02 //BW_CGOUT_L[21] 39 00 02 8A 02 //BW_CGOUT_L[22] 39 00 04 FF 98 81 04 39 00 02 6E 3B 39 00 02 6F 57 39 00 02 3A 24 39 00 02 8D 1F 39 00 02 87 BA 39 00 02 B2 D1 39 00 02 88 0B 39 00 02 38 01 39 00 02 39 00 39 00 02 B5 07 39 00 02 31 75 39 00 02 3B 98 39 00 04 FF 98 81 01 39 00 02 22 0A 39 00 02 31 09 39 00 02 35 07 39 00 02 53 87 39 00 02 55 84 39 00 02 50 86 39 00 02 51 82 39 00 02 60 10 39 00 02 62 00 39 00 02 A0 00 39 00 02 A1 12 39 00 02 A2 1F 39 00 02 A3 12 39 00 02 A4 16 39 00 02 A5 29 39 00 02 A6 1E 39 00 02 A7 1F 39 00 02 A8 7E 39 00 02 A9 1B 39 00 02 AA 28 39 00 02 AB 6D 39 00 02 AC 19 39 00 02 AD 18 39 00 02 AE 4C 39 00 02 AF 1E 39 00 02 B0 23 39 00 02 B1 52 39 00 02 B2 6D 39 00 02 B3 3F 39 00 02 C0 00 39 00 02 C1 12 39 00 02 C2 20 39 00 02 C3 10 39 00 02 C4 13 39 00 02 C5 27 39 00 02 C6 1B 39 00 02 C7 1D 39 00 02 C8 75 39 00 02 C9 1F 39 00 02 CA 28 39 00 02 CB 68 39 00 02 CC 1A 39 00 02 CD 18 39 00 02 CE 4D 39 00 02 CF 25 39 00 02 D0 2E 39 00 02 D1 53 39 00 02 D2 60 39 00 02 D3 3F 39 00 04 FF 98 81 00 39 00 02 35 00 05 80 01 11 05 20 01 29 ]; panel-exit-sequence = [ 05 00 01 28 05 78 01 10 ]; disp_timings0: display-timings { native-mode = <&dsi0_timing0>; dsi0_timing0: timing0 { clock-frequency = <76000000>; hactive = <800>; vactive = <1280>; hback-porch = <70>; hfront-porch = <70>; vback-porch = <22>; vfront-porch = <16>; hsync-len = <20>; vsync-len = <6>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi: endpoint { remote-endpoint = <&dsi_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi_out_panel: endpoint { remote-endpoint = <&panel_in_dsi>; }; }; }; }; &dsi0_in_vp0 { status = "disabled"; }; &dsi0_in_vp1 { status = "okay"; }; &video_phy0 { status = "okay"; }; &route_dsi0 { status = "okay"; connect = <&vp1_out_dsi0>; }; >9xx { status = "okay"; compatible = "goodix,gt9xx"; reg = <0x5d>; gtp_resolution_x = <800>; gtp_resolution_y = <1280>; gtp_int_tarigger = <1>; gtp_change_x2y = <0>; gtp_overturn_x = <0>; gtp_overturn_y = <0>; gtp_send_cfg = <1>; gtp_touch_wakeup = <1>; /** * goodix_rst_gpio = <>; * goodix_irq_gpio = <>; * * touch panel interrupt and reset pin * please refer to ***-lcd-gpio.dtsi * that included in main dts. */ goodix,cfg-group0 = [ 45 20 03 00 05 05 35 00 01 C8 1E 0F 50 32 03 05 00 00 00 00 00 00 04 18 1A 1E 14 8C 2E 0E 1E 20 EB 04 00 00 00 BA 02 2D 00 00 00 00 00 03 00 00 00 00 00 0F 2D 94 D5 02 07 00 00 04 E6 10 00 BB 14 00 92 1A 00 78 20 00 61 28 00 61 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2A 29 28 26 24 22 21 20 1F 1E 1D 1C 18 16 00 02 04 06 08 0A 0C 0F 10 12 13 14 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 CB 01 ]; /** jc */ goodix,cfg-group2 = [ 00 20 03 00 05 0A 05 00 01 08 28 05 50 32 03 05 00 00 00 00 00 00 00 00 00 00 00 8C 2C 0E 17 15 31 0D 00 00 01 BA 03 1D 00 00 00 00 00 03 64 32 00 00 00 0F 41 94 C5 02 07 00 00 04 99 11 00 77 17 00 5F 1F 00 4C 2A 00 41 38 00 41 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 28 26 24 22 21 20 1F 1E 1D 1C 18 16 00 02 04 06 08 0A 0C 0F 10 12 13 14 FF FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 FE 01 ]; goodix,cfg-group5 = [ 00 20 03 00 05 0A 05 00 01 08 28 08 50 32 03 05 00 00 00 00 00 00 00 18 1A 1E 14 8C 2C 0E 17 15 31 0D 00 00 02 9B 04 1D 00 00 00 00 00 03 64 32 00 00 00 11 25 94 C5 02 07 00 00 04 60 12 00 5D 15 00 57 19 00 54 1D 00 4F 22 00 4F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 1C 1A 18 16 14 12 10 0E 0C 0A 08 06 04 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 28 26 24 22 21 20 1F 1E 1D 1C 18 16 14 13 00 02 04 06 08 0A 0C 0F 10 12 FF FF 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 2F 01 ]; };