#ifndef RP_CAMERA_XS9922B
/{
	vcc_camera: vcc-camera-regulator {
                compatible = "regulator-fixed";
                gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
                pinctrl-names = "default";
                pinctrl-0 = <&camera_pwr>;
                regulator-name = "vcc_camera";
                enable-active-high;
                regulator-always-on;
                regulator-boot-on;
	};
};

	&pinctrl {
                camera_pwr: camera-pwr {
                        rockchip,pins =
                                /* camera power en */
                                <4 RK_PB0 3 &pcfg_pull_down>;
                };
        };
#endif

&i2c3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&i2c3m1_xfer>;

  
	imx415_2: imx415_2@1a {
		compatible = "sony,imx415";
		status = "okay";
		reg = <0x1a>;
		clocks = <&cru CLK_CIFOUT_OUT>;
		clock-names = "xvclk";
		power-domains = <&power RK3588_PD_VI>;
		pinctrl-names = "default";
		pinctrl-0 = <&cif_clk>;
		rockchip,grf = <&sys_grf>;
		pwdn-gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>;
		reset-gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>;
		rockchip,camera-module-index = <0>;
		rockchip,camera-module-facing = "BACK";
		rockchip,camera-module-name = "CMK-OT2022-PX1";
		rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20";
		port {
			imx415_out2: endpoint {
				remote-endpoint = <&mipi_in_ucam2>;
				data-lanes = <1 2 3 4>;
			};
		};
	};
};

&csi2_dphy0_hw {
	status = "okay";
};

&csi2_dphy0 {
	status = "okay";
	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
			mipi_in_ucam2: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&imx415_out2>;
				data-lanes = <1 2 3 4>;
			};
		};
		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			csidphy0_out: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&mipi2_csi2_input>;
			};
		};
	};
};

&mipi2_csi2 {
	status = "okay";
	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <0>;
			mipi2_csi2_input: endpoint@1 {
				reg = <1>;
				remote-endpoint = <&csidphy0_out>;
			};
		};
		port@1 {
			reg = <1>;
			#address-cells = <1>;
			#size-cells = <0>;
			mipi2_csi2_output: endpoint@0 {
				reg = <0>;
				remote-endpoint = <&cif_mipi_in2>;
			};
		};
	};
};

&rkcif_mipi_lvds2 {
	status = "okay";

	port {
		cif_mipi_in2: endpoint {
			remote-endpoint = <&mipi2_csi2_output>;
		};
	};
};

&rkcif_mipi_lvds2_sditf {
	status = "okay";

	port {
		mipi_lvds2_sditf: endpoint {
			remote-endpoint = <&isp0_vir0>;
		};
	};
};

&rkcif {
        status = "okay";
};

&rkcif_mmu {
	status = "okay";
};

&rkisp0 {
	status = "okay";
};

&isp0_mmu {
	status = "okay";
};

&rkisp0_vir0 {
	status = "okay";

	port {
		#address-cells = <1>;
		#size-cells = <0>;

		isp0_vir0: endpoint@0 {
			reg = <0>;
			remote-endpoint = <&mipi_lvds2_sditf>;
		};
	};
};