// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2020 Rockchip Electronics Co., Ltd. * */ /dts-v1/; //rk3566-evb1-ddr4-v10 //#include "rk3566-evb1-ddr4-v10.dtsi" #include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi" #include "../rk3568-linux.dtsi" /*************************camera***********************/ #include "rp-mipi-camera-gc2093-rk3566.dtsi" /***************************************************/ /*************************adc key***********************/ #include "rp-adc-key.dtsi" /***************************************************/ /*************************gmac***********************/ #include "rp-gmac1-m0-pro-rk3566.dtsi" /***************************************************/ /***************** SINGLE LCD (LCD + HDMI) ****************/ #include "rp-box-rk3566-lcd-gpio.dtsi" /* HDMI only */ //#include "rp-lcd-hdmi.dtsi" /* MIPI DSI0 */ //#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi" #include "rp-lcd-mipi0-7-720-1280.dtsi" //#include "rp-lcd-mipi0-8-800-1280-v3.dtsi" //#include "rp-lcd-mipi0-8-1200-1920.dtsi" //#include "rp-lcd-mipi0-10-800-1280-v3.dtsi" //#include "rp-lcd-mipi0-10-1200-1920.dtsi" /** LVDS */ //#include "rp-lcd-lvds-7-1024-600-v2.dtsi" //#include "rp-lcd-lvds-10-1280-800.dtsi" /* EDP */ //#include "rp-lcd-edp-13-1920-1080.dtsi" //#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi" / { model = "rp-box-rk3566"; compatible = "rpdzkj,rp-box-rk3566", "rockchip,rk3566"; fan_gpio_control { compatible = "fan_gpio_control"; gpio-pin = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; thermal-zone = "soc-thermal"; threshold-temp = <60000>; //60C running-time = <10000>; //10s status = "okay"; }; rp_power{ status = "okay"; compatible = "rp_power"; rp_not_deep_sleep = <1>; //#define GPIO_FUNCTION_OUTPUT 0 //#define GPIO_FUNCTION_INPUT 1 //#define GPIO_FUNCTION_IRQ 2 //#define GPIO_FUNCTION_FLASH 3 //#define GPIO_FUNCTION_OUTPUT_CTRL 4 /** * gpioxxx { // the node name will display on /proc/rp_power, you can define any character string * gpio_num = <>; // gpio you want ot control * gpio_function = <>; // function of current gpio, refer to above define. * }; */ /******* sytem power en pin, donnot change it only if you know what you are doing */ pwr_5v_3v3 { //vdd 3.3v enable gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; pwr_4g { //vdd_3G 3.3v enable gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; led { //system led gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; gpio_function = <3>; }; usb_host_pwr { //usb 2.0 3.0 power gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; usb_pwr { //usb and otg power gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; hub_rst { //usb hub reset gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; spk_en { //SPK ENABLE gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; spk_mute { //SPK MUTE, hish active, nomal low gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; gpio_function = <4>; }; otg_mode { //OTG SWITCH, high is mean otg_id to 0, foece host mode gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; gpio_function = <0>; }; }; rp_gpio{ status = "okay"; compatible = "rp_gpio"; /***** gpio, add you want to control as blow */ gpio4a0 { gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio4a1 { gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio4a2 { gpio_num = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio4a3 { gpio_num = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio1b2 { gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio3c1 { gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio1b0 { gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio0c4 { gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio1a4 { gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio2b4 { gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; }; fiq-debugger { compatible = "rockchip,fiq-debugger"; rockchip,serial-id = <2>; rockchip,wake-irq = <0>; /* If enable uart uses irq instead of fiq */ rockchip,irq-mode-enable = <1>; rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; }; &pmu_io_domains { status = "okay"; pmuio2-supply = <&vcc3v3_pmu>; vccio1-supply = <&vccio_acodec>; vccio3-supply = <&vccio_sd>; vccio4-supply = <&vcc_3v3>; vccio5-supply = <&vcc_3v3>; vccio6-supply = <&vcc_1v8>; vccio7-supply = <&vcc_3v3>; }; &i2c1 { status = "okay"; }; &i2c4 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c4m1_xfer>; rtc@51 { status = "okay"; compatible = "rtc,hym8563"; reg = <0x51>; }; }; &i2c5 { status = "disabled"; }; &uart3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart3m0_xfer>; }; &uart6 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart6m0_xfer>; }; &uart7 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart7m0_xfer>; }; &uart9 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart9m0_xfer>; }; &spi1 { status = "okay"; /* rewrite pinctrl, for cs1 used to be gpio */ pinctrl-0 = <&spi1m0_cs0 &spi1m0_pins>; pinctrl-1 = <&spi1m0_cs0 &spi1m0_pins_hs>; spi1_dev@0 { compatible = "rockchip,spidev"; reg = <0>; spi-max-frequency = <12000000>; spi-lsb-first; }; }; &spi2 { status = "okay"; /* rewrite pinctrl, for cs1 used to be gpio */ pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>; pinctrl-1 = <&spi2m0_cs0 &spi2m0_pins_hs>; spi2_dev@0 { compatible = "rockchip,spidev"; reg = <0>; spi-max-frequency = <12000000>; spi-lsb-first; }; }; &spi3 { status = "okay"; pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins>; pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>; spi3_dev@0 { compatible = "rockchip,spidev"; reg = <0>; spi-max-frequency = <12000000>; spi-lsb-first; }; }; &dmc { status = "disabled"; }; &dfi { status = "disabled"; }; &gmac1 { tx_delay = <0x42>; rx_delay = <0x2d>; }; &sdmmc2 { max-frequency = <150000000>; supports-sdio; bus-width = <4>; disable-wp; cap-sd-highspeed; cap-sdio-irq; keep-power-in-suspend; mmc-pwrseq = <&sdio_pwrseq>; non-removable; pinctrl-names = "default"; pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; sd-uhs-sdr104; status = "okay"; }; &uart1 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart1m1_xfer &uart1m1_ctsn>; }; &wireless_bluetooth { uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; pinctrl-names = "default", "rts_gpio"; pinctrl-0 = <&uart1m1_rtsn>; pinctrl-1 = <&uart1_gpios>; BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; status = "okay"; }; &wireless_wlan { pinctrl-names = "default"; pinctrl-0 = <&wifi_host_wake_irq>; WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; }; &rk_headset { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&hp_det>; headset_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; }; &pinctrl { headphone { hp_det: hp-det { rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_down>; }; }; wireless-wlan { wifi_host_wake_irq: wifi-host-wake-irq { rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>; }; }; wireless-bluetooth { uart1_gpios: uart1-gpios { rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; }; }; };