// SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* * Copyright (c) 2020 Rockchip Electronics Co., Ltd. */ //rk3566-evb1-ddr4-v10 #include "rk3566-evb1-ddr4-v10.dtsi" #include "../rk3568-linux.dtsi" #include "rp-mipi-camera-gc2093-rk3566.dtsi" /****************** SINGLE LCD ***************/ #include "rp-rk3566-single-lcd-gpio.dtsi" /* HDMI */ //#include "rp-lcd-hdmi.dtsi" /* MIPI DSI0 */ //#include "rp-lcd-mipi0-5-720-1280.dtsi" //#include "rp-lcd-mipi0-5.5-1080-1920.dtsi" //#include "rp-lcd-mipi0-5.5-720-1280.dtsi" //#include "rp-lcd-mipi0-5.5-720-1280-v2.dtsi" #include "rp-lcd-mipi0-7-1024-600.dtsi" //#include "rp-lcd-mipi0-7-1200-1920.dtsi" //#include "rp-lcd-mipi0-8-800-1280.dtsi" //#include "rp-lcd-mipi0-8-800-1280-v2.dtsi" //#include "rp-lcd-mipi0-8-800-1280-v3.dtsi" //#include "rp-lcd-mipi0-8-1200-1920.dtsi" //#include "rp-lcd-mipi0-10-800-1280.dtsi" //#include "rp-lcd-mipi0-10-800-1280-v2.dtsi" //#include "rp-lcd-mipi0-10-1920-1200.dtsi" /* LVDS */ //#include "rp-lcd-lvds-10-1024-600.dtsi" /* EDP */ //#include "rp-lcd-edp-13-1920-1080.dtsi" //#include "rp-lcd-edp-13.3-15.6-1920-1080.dtsi" / { model = "rp-rk3566"; compatible = "rpdzkj,rp-rk3566", "rockchip,rk3566"; fan_gpio_control { compatible = "fan_gpio_control"; gpio-pin = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; temperature-device = "soc-thermal"; temp-on = <60000>; time = <10000>; status = "okay"; }; rp_power{ status = "okay"; compatible = "rp_power"; rp_not_deep_sleep = <1>; //#define GPIO_FUNCTION_OUTPUT 0 //#define GPIO_FUNCTION_INPUT 1 //#define GPIO_FUNCTION_IRQ 2 //#define GPIO_FUNCTION_FLASH 3 //#define GPIO_FUNCTION_OUTPUT_CTRL 4 /******* SYSTEM POWER **********/ pwer_5v_3v3 { //vdd 3.3v 5v enable gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; led { //system led gpio_num = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; usb_pwr { //usb host and otg power gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; hub_rst { //usb hub reset gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; spk_en { //SPK ENABLE gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; gpio_function = <4>; }; spk_mute { //SPK MUTE, hish active, nomal low gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; gpio_function = <4>; }; otg_mode { //OTG SWITCH, high is mean otg_id to 0, foece host mode gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; gpio_function = <0>; }; //fan { //fan en // gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; // gpio_function = <4>; //}; }; rp_gpio{ status = "okay"; compatible = "rp_gpio"; /***** gpio ********/ gpio4a0 { gpio_num = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio4a1 { gpio_num = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio4a2 { gpio_num = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio4a3 { gpio_num = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio1b2 { gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio3c1 { gpio_num = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio1b0 { gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio0c4 { gpio_num = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio1a4 { gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio0c5 { gpio_num = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; gpio2b4 { gpio_num = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; gpio_function = <0>; }; }; fiq-debugger { compatible = "rockchip,fiq-debugger"; rockchip,serial-id = <2>; rockchip,wake-irq = <0>; /* If enable uart uses irq instead of fiq */ rockchip,irq-mode-enable = <1>; rockchip,baudrate = <115200>; /* Only 115200 and 1500000 */ interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; }; &pmu_io_domains { status = "okay"; pmuio2-supply = <&vcc3v3_pmu>; vccio1-supply = <&vccio_acodec>; vccio3-supply = <&vccio_sd>; vccio4-supply = <&vcc_3v3>; vccio5-supply = <&vcc_3v3>; vccio6-supply = <&vcc_1v8>; vccio7-supply = <&vcc_3v3>; }; &i2c5 { status = "disabled"; }; &i2c0 { status = "okay"; vdd_cpu: tcs4525@1c { compatible = "tcs,tcs452x"; reg = <0x1c>; vin-supply = <&vcc5v0_sys>; regulator-compatible = "fan53555-reg"; regulator-name = "vdd_cpu"; regulator-min-microvolt = <712500>; regulator-max-microvolt = <1390000>; regulator-ramp-delay = <2300>; fcs,suspend-voltage-selector = <1>; regulator-boot-on; regulator-always-on; regulator-state-mem { regulator-off-in-suspend; }; }; }; &gmac1 { tx_delay = <0x3a>; rx_delay = <0x2a>; }; &i2c4 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c4m1_xfer>; rtc@51 { status = "okay"; compatible = "rtc,hym8563"; reg = <0x51>; }; }; &uart3 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart3m0_xfer>; }; &uart6 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart6m0_xfer>; }; &uart7 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart7m0_xfer>; }; &uart9 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&uart9m0_xfer>; }; &spi1 { status = "okay"; /* rewrite pinctrl, for cs1 used to be gpio */ pinctrl-0 = <&spi1m0_cs0 &spi1m0_pins>; pinctrl-1 = <&spi1m0_cs0 &spi1m0_pins_hs>; spi1_dev@0 { compatible = "rockchip,spidev"; reg = <0>; spi-max-frequency = <12000000>; spi-lsb-first; }; }; &spi2 { status = "okay"; /* rewrite pinctrl, for cs1 used to be gpio */ pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>; pinctrl-1 = <&spi2m0_cs0 &spi2m0_pins_hs>; spi2_dev@0 { compatible = "rockchip,spidev"; reg = <0>; spi-max-frequency = <12000000>; spi-lsb-first; }; }; &spi3 { status = "okay"; spi3_dev@0 { compatible = "rockchip,spidev"; reg = <0>; spi-max-frequency = <12000000>; spi-lsb-first; }; }; /****** rp3566 camera configuration adjustment ******/ &spi3 { /* rewrite pinctrl for cs1 used to be camera clk */ pinctrl-0 = <&spi3m0_cs0 &spi3m0_pins>; pinctrl-1 = <&spi3m0_cs0 &spi3m0_pins_hs>; }; /***************************************************/ &dmc { status = "disabled"; }; &dfi { status = "disabled"; };