#include "rp-lcd-hdmi.dtsi" #define RP_SINGLE_LCD &dsi0 { status = "okay"; // rockchip,lane-rate = <480>; dsi0_panel: panel@0 { status = "okay"; compatible = "simple-panel-dsi"; reg = <0>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; dsi,format = ; dsi,lanes = <4>; reset-delay-ms = <20>; init-delay-ms = <20>; enable-delay-ms = <120>; prepare-delay-ms = <120>; /** * power-supply = <>; * reset-gpios = <>; * * lcd reset pin and power supply * please refer to ***-lcd-gpio.dtsi * that included in main dts. */ panel-init-sequence = [ 39 00 04 B9 F1 12 83 39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37 39 00 02 B8 26 39 00 04 BF 02 10 00 39 00 0B B3 07 0B 1E 1E 03 FF 00 00 00 00 39 00 0A C0 73 73 50 50 00 00 08 70 00 39 00 02 BC 46 39 00 02 CC 0B 39 00 02 B4 80 39 00 04 B2 C8 12 A0 39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 80 C0 10 39 00 0D C1 53 00 32 32 77 F1 FF FF CC CC 77 77 39 00 03 B5 09 09 39 00 03 B6 B7 B7 39 00 40 E9 C2 10 0A 00 00 81 80 12 30 00 37 86 81 80 37 18 00 05 00 00 00 00 00 05 00 00 00 00 F8 BA 46 02 08 28 88 88 88 88 88 F8 BA 57 13 18 38 88 88 88 88 88 00 00 00 03 00 00 00 00 00 00 00 00 00 39 00 3E EA 07 12 01 01 02 3C 00 00 00 00 00 00 8F BA 31 75 38 18 88 88 88 88 88 8F BA 20 64 28 08 88 88 88 88 88 23 10 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 39 00 23 E0 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19 05 ff 01 11 ////Sleep Out 05 32 01 29 ///Display On ]; panel-exit-sequence = [ 05 00 01 28 05 78 01 10 ]; disp_timings0: display-timings { native-mode = <&dsi0_timing0>; dsi0_timing0: timing0 { clock-frequency = <60000000>; hactive = <720>; vactive = <1280>; hback-porch = <40>; hfront-porch = <40>; vback-porch = <11>; vfront-porch = <16>; hsync-len = <10>; vsync-len = <3>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi: endpoint { remote-endpoint = <&dsi_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi_out_panel: endpoint { remote-endpoint = <&panel_in_dsi>; }; }; }; }; &dsi0_in_vp0 { status = "disabled"; }; &dsi0_in_vp1 { status = "okay"; }; &video_phy0 { status = "okay"; }; &route_dsi0 { status = "okay"; connect = <&vp1_out_dsi0>; }; >9xx { status = "okay"; compatible = "goodix,gt9xx"; reg = <0x5d>; gtp_resolution_x = <720>; gtp_resolution_y = <1280>; gtp_int_tarigger = <1>; gtp_change_x2y = <0>; gtp_overturn_x = <0>; gtp_overturn_y = <0>; gtp_send_cfg = <1>; gtp_touch_wakeup = <1>; /** * goodix_rst_gpio = <>; * goodix_irq_gpio = <>; * * touch panel interrupt and reset pin * please refer to ***-lcd-gpio.dtsi * that included in main dts. */ goodix,cfg-group0 = [ 46 D0 02 00 05 05 35 01 01 08 1E 0F 5A 3C 03 05 00 00 00 00 11 11 00 19 1B 1E 14 89 29 0A 41 43 D3 07 00 00 00 9A 02 11 00 01 05 00 00 00 00 09 11 00 00 36 4A 94 45 00 00 00 00 00 94 37 00 8B 3B 00 83 3F 00 7C 43 00 76 47 00 76 10 30 48 00 F0 4A 3A FF FF 27 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 08 0A 0C 0E 10 12 14 16 18 1A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0E 0C 0A 08 06 05 04 02 00 1D 1E 1F 20 22 24 28 29 2A 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 84 01]; };