/ { vcc3v3_lcd_n: vcc3v3-lcd0-n { compatible = "regulator-fixed"; regulator-name = "vcc3v3_lcd0_n"; regulator-boot-on; enable-active-high; gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; vin-supply = <&vcc_1v8_s3>; }; backlight: backlight { compatible = "pwm-backlight"; pwms = <&pwm1 0 25000 0>; status = "okay"; brightness-levels = < 0 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 32 33 33 34 34 35 35 36 36 37 37 38 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 >; default-brightness-level = <200>; }; }; &pwm1 { status = "okay"; pinctrl-0 = <&pwm1m1_pins>; }; &dsi0 { status = "okay"; rockchip,lane-rate = <480000>; dsi0_panel: panel@0 { status = "okay"; compatible = "simple-panel-dsi"; reg = <0>; power-supply = <&vcc3v3_lcd_n>; reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>; pinctrl-names = "default"; pinctrl-0 = <&lcd_rst_gpio>; backlight = <&backlight>; init-delay-ms = <60>; reset-delay-ms = <60>; enable-delay-ms = <60>; prepare-delay-ms = <60>; unprepare-delay-ms = <60>; disable-delay-ms = <60>; dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; dsi,format = ; dsi,lanes = <4>; panel-init-sequence = [ 39 00 04 FF 98 81 03 //=========_1===========// 39 00 02 01 00 39 00 02 02 00 39 00 02 03 53 39 00 02 04 13 39 00 02 05 00 39 00 02 06 04 39 00 02 07 00 39 00 02 08 00 39 00 02 09 22 39 00 02 0a 22 39 00 02 0b 00 39 00 02 0c 01 39 00 02 0d 00 39 00 02 0e 00 39 00 02 0f 23 39 00 02 10 23 39 00 02 11 00 39 00 02 12 00 39 00 02 13 00 39 00 02 14 00 39 00 02 15 00 39 00 02 16 00 39 00 02 17 00 39 00 02 18 00 39 00 02 19 00 39 00 02 1a 00 39 00 02 1b 00 39 00 02 1c 00 39 00 02 1d 00 39 00 02 1e 44 39 00 02 1f 80 39 00 02 20 02 39 00 02 21 03 39 00 02 22 00 39 00 02 23 00 39 00 02 24 00 39 00 02 25 00 39 00 02 26 00 39 00 02 27 00 39 00 02 28 33 39 00 02 29 03 39 00 02 2a 00 39 00 02 2b 00 39 00 02 2c 00 39 00 02 2d 00 39 00 02 2e 00 39 00 02 2f 00 39 00 02 30 00 39 00 02 31 00 39 00 02 32 00 39 00 02 33 00 39 00 02 34 04 39 00 02 35 00 39 00 02 36 00 39 00 02 37 00 39 00 02 38 3C 39 00 02 39 00 39 00 02 3a 40 39 00 02 3b 40 39 00 02 3c 00 39 00 02 3d 00 39 00 02 3e 00 39 00 02 3f 00 39 00 02 40 00 39 00 02 41 00 39 00 02 42 00 39 00 02 43 00 39 00 02 44 00 //=========_2===========// 39 00 02 50 01 39 00 02 51 23 39 00 02 52 45 39 00 02 53 67 39 00 02 54 89 39 00 02 55 ab 39 00 02 56 01 39 00 02 57 23 39 00 02 58 45 39 00 02 59 67 39 00 02 5a 89 39 00 02 5b ab 39 00 02 5c cd 39 00 02 5d ef //=========_3===========// 39 00 02 5e 11 39 00 02 5f 01 39 00 02 60 00 39 00 02 61 15 39 00 02 62 14 39 00 02 63 0C 39 00 02 64 0D 39 00 02 65 0E 39 00 02 66 0F 39 00 02 67 06 39 00 02 68 02 39 00 02 69 02 39 00 02 6a 02 39 00 02 6b 02 39 00 02 6c 02 39 00 02 6d 02 39 00 02 6e 08 39 00 02 6f 02 39 00 02 70 02 39 00 02 71 02 39 00 02 72 02 39 00 02 73 02 39 00 02 74 02 39 00 02 75 01 39 00 02 76 00 39 00 02 77 15 39 00 02 78 14 39 00 02 79 0C 39 00 02 7a 0D 39 00 02 7b 0E 39 00 02 7c 0F 39 00 02 7D 08 39 00 02 7E 02 39 00 02 7F 02 39 00 02 80 02 39 00 02 81 02 39 00 02 82 02 39 00 02 83 02 39 00 02 84 06 39 00 02 85 02 39 00 02 86 02 39 00 02 87 02 39 00 02 88 02 39 00 02 89 02 39 00 02 8A 02 //CMD_Page 39 00 04 FF 98 81 04 39 00 02 6C 15 39 00 02 6E 3B 39 00 02 6F 73 39 00 02 3A 24 39 00 02 8D 14 39 00 02 87 BA 39 00 02 26 76 39 00 02 B2 D1 39 00 02 B5 27 39 00 02 31 75 39 00 02 30 03 39 00 02 3B 98 39 00 02 35 1f 39 00 02 33 14 39 00 02 7A 0F 39 00 02 38 02 39 00 02 39 00 //CMD_Page 39 00 04 FF 98 81 01 39 00 02 22 0A 39 00 02 31 0A 39 00 02 35 07 39 00 02 52 00 39 00 02 53 5A 39 00 02 54 00 39 00 02 55 59 39 00 02 50 83 39 00 02 51 80 39 00 02 60 20 39 00 02 61 01 39 00 02 62 07 39 00 02 63 00 //GammaP 39 00 02 A0 08 39 00 02 A1 0F 39 00 02 A2 15 39 00 02 A3 0E 39 00 02 A4 0D 39 00 02 A5 1B 39 00 02 A6 0F 39 00 02 A7 14 39 00 02 A8 33 39 00 02 A9 17 39 00 02 AA 23 39 00 02 AB 3F 39 00 02 AC 22 39 00 02 AD 24 39 00 02 AE 59 39 00 02 AF 2B 39 00 02 B0 2E 39 00 02 B1 4C 39 00 02 B2 5C 39 00 02 B3 33 //GammaN 39 00 02 C0 08 39 00 02 C1 0F 39 00 02 C2 15 39 00 02 C3 0E 39 00 02 C4 0D 39 00 02 C5 1B 39 00 02 C6 0F 39 00 02 C7 14 39 00 02 C8 33 39 00 02 C9 17 39 00 02 CA 23 39 00 02 CB 3F 39 00 02 CC 22 39 00 02 CD 24 39 00 02 CE 59 39 00 02 CF 2B 39 00 02 D0 2E 39 00 02 D1 4C 39 00 02 D2 5C 39 00 02 D3 33 //CMD_Page 39 00 04 FF 98 81 00 05 78 01 11 //sleep out 05 00 01 29 //display on 05 00 01 35 //TE on ]; panel-exit-sequence = [ 05 78 01 28 05 78 01 10 ]; disp_timings0: display-timings { native-mode = <&dsi0_timing0>; dsi0_timing0: timing0 { clock-frequency = <82000000>; hactive = <800>; vactive = <1280>; hback-porch = <100>; hfront-porch = <100>; vback-porch = <30>; vfront-porch = <20>; hsync-len = <30>; vsync-len = <2>; hsync-active = <0>; vsync-active = <0>; de-active = <0>; pixelclk-active = <0>; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@0 { reg = <0>; panel_in_dsi: endpoint { remote-endpoint = <&dsi_out_panel>; }; }; }; }; ports { #address-cells = <1>; #size-cells = <0>; port@1 { reg = <1>; dsi_out_panel: endpoint { remote-endpoint = <&panel_in_dsi>; }; }; }; }; &dsi0_in_vp2 { status = "disabled"; }; &dsi0_in_vp3 { status = "okay"; }; &mipi_dcphy0 { status = "okay"; }; &route_dsi0 { status = "okay"; connect = <&vp3_out_dsi0>; }; &pinctrl { lcd { lcd_rst_gpio: lcd-rst-gpio { rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; }; }; goodix { goodix_irq: goodix-irq { rockchip,pins = <3 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; }; }; }; &i2c6 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c6m0_xfer>; goodix_ts@5d { status = "okay"; compatible = "goodix,gt9xx"; reg = <0x5d>; goodix_rst_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; goodix_irq_gpio = <&gpio3 RK_PD0 IRQ_TYPE_LEVEL_LOW>; pinctrl-names = "default"; pinctrl-0 = <&goodix_irq>; gtp_resolution_x = <800>; gtp_resolution_y = <1280>; gtp_int_tarigger = <1>; gtp_change_x2y = <0>; gtp_overturn_x = <0>; gtp_overturn_y = <0>; gtp_send_cfg = <1>; gtp_touch_back = <1>; gtp_touch_wakeup = <1>; goodix,cfg-group2 = [ 41 20 03 00 05 0A 35 00 01 06 23 08 37 2D 03 05 00 00 00 00 00 00 04 17 19 1D 14 90 30 AA 53 55 0C 08 00 00 00 01 03 1D 00 00 00 00 00 00 00 00 00 00 00 3C 78 94 D0 42 00 08 00 04 8E 40 00 85 4A 00 7F 55 00 7B 61 00 7A 70 00 7B 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 19 18 17 16 15 14 11 10 0F 0E 0D 0C 09 08 07 06 05 04 01 00 00 00 00 00 00 00 00 00 00 00 00 02 04 06 07 08 0A 0C 0D 0E 0F 10 11 12 13 14 2A 29 28 27 26 25 24 23 22 21 20 1F 1E 1C 1B 19 00 00 00 00 00 00 00 00 00 00 17 01 ]; }; };