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4 Commits

Author SHA1 Message Date
zhangpeng
d2ec2b532e 调试PWM成功 2025-05-26 18:51:51 +08:00
zhangpeng
3bbdf81bc5 串口、网口、USB3.0、HDMI调试成功 2025-05-26 18:18:57 +08:00
zhangpeng
92bc223ace 禁用CAN2m1对NPU I2C的占用 2025-04-29 11:39:13 +08:00
zhangpeng
f716b853db 增加SPI3 2025-04-28 11:56:22 +08:00
7 changed files with 289 additions and 1298 deletions

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@ -33,25 +33,12 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

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@ -29,22 +29,9 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rd-rk3588-lcd-gpio.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-pcie2gmac-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie3.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-5g.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-audio-rt5640.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-wifi-bt-ap6275p-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dcphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-camera-dphy1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi

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@ -3,28 +3,29 @@
#include "rp-rk3588-board.dtsi"
#include "rp-tp-i2c6-gt911.dtsi"
#include "rd-rk3588-lcd-gpio.dtsi"
// #include "rd-rk3588-lcd-gpio.dtsi"
#include "rpdzkj_config.dtsi"
/* usb */
#include "rp-usb-typec-rk3588.dtsi"
// #include "rp-usb-typec-rk3588.dtsi"
#include "rp-usb-host.dtsi"
/* ethernet */
#include "rp-eth-pcie2gmac-rk3588.dtsi"
// #include "rp-eth-pcie2gmac-rk3588.dtsi"
#include "rp-eth-gmac0.dtsi"
#include "rp-eth-gmac1.dtsi"
/* pcie */
#include "rp-pcie-power-rk3588.dtsi"
#include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
#include "rp-pcie-5g.dtsi"
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
// #include "rp-pcie-5g.dtsi"
/* audio */
#include "rp-audio-rt5640.dtsi"
// #include "rp-audio-rt5640.dtsi"
/* wifi/bt */
#include "rp-wifi-bt-ap6275p-rk3588.dtsi"
// #include "rp-wifi-bt-ap6275p-rk3588.dtsi"
/* hdmi rx */
// #include "rp-hdmirx.dtsi"
@ -33,9 +34,9 @@
/***********all camera config********/
//#include "rp-camera-dcphy0.dtsi"
#include "rp-camera-dcphy1.dtsi"
#include "rp-camera-dphy0.dtsi"
#include "rp-camera-dphy1.dtsi"
// #include "rp-camera-dcphy1.dtsi"
// #include "rp-camera-dphy0.dtsi"
// #include "rp-camera-dphy1.dtsi"
//#include "rp-camera-dcphy0-ov13855.dtsi"
//#include "rp-camera-dcphy1-ov13855.dtsi"
@ -59,10 +60,10 @@
//#include "rp-camera-dphy0-imx415.dtsi"
/******************************************/
//#include "rp-lcd-hdmi0.dtsi" //batch ignore
//#include "rp-lcd-hdmi1.dtsi" //batch ignore
// #include "rp-lcd-hdmi0.dtsi" //batch ignore
#include "rp-lcd-hdmi1.dtsi" //batch ignore
//#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore
#include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
// #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
/* lcd */
// #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
@ -114,7 +115,7 @@
thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C
running-time = <10000>; //10s
status = "okay";
status = "disabled";
};
rp_power{
@ -133,24 +134,24 @@
// gpio_function = <4>;
//};
led {
gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
// led {
// gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
// gpio_function = <3>;
// };
usb-host-power {
gpio_num = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
usb-hub-reset {
gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
// usb-hub-reset {
// gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
};
rp_gpio{
status = "okay";
status = "disabled";
compatible = "rp_gpio";
gpio3c7 {
@ -160,49 +161,91 @@
};
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m0_xfer>;
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
};
&can0 {
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
&i2c4 {
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
@ -221,9 +264,8 @@
};
&sdmmc {
status = "okay";
status = "disabled";
};
&fiq_debugger {
@ -242,3 +284,19 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
&hdptxphy_hdmi_clk1 {
status = "okay";
};
&pwm0 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m2_pins>; // 选择 PWM1 的引脚复用
#pwm-cells = <3>;
};
&pwm13 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm13m2_pins>; // 选择 PWM1 的引脚复用和UART1 M1引脚冲突了
#pwm-cells = <3>;
};

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@ -9,9 +9,9 @@
&gmac0 {
// Use rgmii-rxid mode to disable rx delay inside Soc
phy-mode = "rgmii-rxid";
clock_in_out = "output";
clock_in_out = "input";
snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
snps,reset-gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
// Reset time is 20ms, 100ms for rtl8211f
snps,reset-delays-us = <0 20000 100000>;
@ -21,7 +21,9 @@
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
&gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
tx_delay = <0x44>;
// rx_delay = <0x4f>;

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@ -39,10 +39,27 @@
&usbhost3_0 {
status = "disabled";
status = "okay";
};
&usbhost_dwc3_0 {
status = "disabled";
status = "okay";
};
&usbdrd_dwc3_0 {
extcon=<&u2phy0>;
status="okay";
};
&u2phy0 {
status = "okay";
};
&usbdrd_dwc3_1 {
extcon=<&u2phy1>;
status="okay";
};
&u2phy1 {
status = "okay";
};