2 Commits

Author SHA1 Message Date
zhangpeng
8d68461a3e 适配硬件——最终版 2025-05-26 14:41:06 +08:00
zhangpeng
7c5f178fe2 基于硬件修改设备树 2025-05-14 13:56:07 +08:00
7 changed files with 339 additions and 326 deletions

View File

@@ -32,13 +32,15 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

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@@ -28,10 +28,12 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi

View File

@@ -14517,20 +14517,7 @@
/delete-node/ &backlight;
# 4 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi" 1
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m0_xfer>;
goodix_ts:goodix_ts@5d {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
};
};
# 6 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi" 1
@@ -14557,7 +14544,145 @@
# 9 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi" 1
/ {
vbus5v0_typec: vbus5v0-typec {
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio1 2 0>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
};
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
usbc0: fusb302@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio0>;
interrupts = <27 8>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v0_typec>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_role_sw: endpoint@0 {
remote-endpoint = <&dwc3_0_role_switch>;
};
};
};
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
op-sink-microwatt = <1000000>;
sink-pdos =
<(((0) << 30) | ((1 << 26)) | ((((5000) / 50) & 0x3ff) << 10) | ((((1000) / 10) & 0x3ff) << 0))>;
source-pdos =
<(((0) << 30) | ((1 << 26)) | ((((5000) / 50) & 0x3ff) << 10) | ((((3000) / 10) & 0x3ff) << 0))>;
altmodes {
#address-cells = <1>;
#size-cells = <0>;
altmode@0 {
reg = <0>;
svid = <0xff01>;
vdo = <0xffffffff>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_orien_sw: endpoint {
remote-endpoint = <&usbdp_phy0_orientation_switch>;
};
};
port@1 {
reg = <1>;
dp_altmode_mux: endpoint {
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
};
};
};
};
};
};
&usbdp_phy0 {
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = <&gpio3 28 0>;
sbu2-dc-gpios = <&gpio3 29 0>;
port {
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_orientation_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_orien_sw>;
};
usbdp_phy0_dp_altmode_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&dp_altmode_mux>;
};
};
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
usb-role-switch;
port {
#address-cells = <1>;
#size-cells = <0>;
dwc3_0_role_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_role_sw>;
};
};
};
&pinctrl {
usb-typec {
usbc0_int: usbc0-int {
rockchip,pins = <0 27 0 &pcfg_pull_up>;
};
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 2 0 &pcfg_pull_none>;
};
};
};
# 12 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi" 1
&u2phy2 {
@@ -14600,69 +14725,16 @@
&usbhost3_0 {
status = "okay";
status = "disabled";
};
&usbhost_dwc3_0 {
status = "okay";
};
&usbdrd_dwc3_0 {
extcon=<&u2phy0>;
status="okay";
};
&u2phy0 {
status = "okay";
};
&usbdrd_dwc3_1 {
extcon=<&u2phy1>;
status="okay";
};
&u2phy1 {
status = "okay";
status = "disabled";
};
# 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi" 1
&mdio0 {
rgmii_phy0: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
&gmac0 {
phy-mode = "rgmii-rxid";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 20 1>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
tx_delay = <0x44>;
phy-handle = <&rgmii_phy0>;
status = "okay";
};
# 17 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1
&mdio1 {
@@ -14698,47 +14770,91 @@
phy-handle = <&rgmii_phy1>;
status = "okay";
};
# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi" 1
# 17 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 30 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi" 1
/ {
pcie20_avdd0v85: pcie20-avdd0v85 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
vin-supply = <&vdd_0v85_s0>;
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio4 5 0>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
cma {
compatible = "shared-dma-pool";
reusable;
reg = <0x0 (256 * 0x100000) 0x0 (128 * 0x100000)>;
linux,cma-default;
};
};
hdmiin-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,hdmiin";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
status = "okay";
simple-audio-card,cpu {
sound-dai = <&i2s7_8ch>;
};
dailink0_master: simple-audio-card,codec {
sound-dai = <&hdmiin_dc>;
};
};
hdmiin_dc: hdmiin-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
};
# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 64 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
&i2s7_8ch {
status = "okay";
};
&hdmirx_ctrler {
status = "okay";
hpd-trigger-level = <1>;
hdmirx-det-gpios = <&gpio1 29 1>;
pinctrl-0 = <&hdmim1_rx_cec &hdmim2_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda>;
pinctrl-names = "default";
};
# 31 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 1
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi" 1
&hdmi0 {
status = "okay";
};
&hdmi0_in_vp0 {
status = "okay";
};
&hdmi0_sound {
status = "okay";
};
&i2s5_8ch {
status = "okay";
};
&hdptxphy_hdmi0 {
status = "okay";
};
&route_hdmi0 {
status = "okay";
connect = <&vp0_out_hdmi0>;
};
# 2 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
&hdmi1 {
status = "okay";
@@ -14768,8 +14884,26 @@
status = "okay";
connect = <&vp1_out_hdmi1>;
};
# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 3 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi" 1
&dp0 {
status = "okay";
};
&dp0_in_vp2 {
status = "okay";
};
&dp0_sound{
status = "okay";
};
&spdif_tx2 {
status = "okay";
};
# 4 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 2
# 66 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 89 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
/ {
model = "dr4-rk3588";
@@ -14805,16 +14939,21 @@
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
# 142 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 136 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
led {
gpio_num = <&gpio4 6 0>;
gpio_function = <3>;
};
usb-host-power {
gpio_num = <&gpio2 17 0>;
gpio_function = <4>;
};
usb-hub-reset {
gpio_num = <&gpio3 10 0>;
gpio_function = <4>;
};
};
rp_gpio{
@@ -14828,89 +14967,49 @@
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m2_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m2_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m2_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
&can0 {
assigned-clocks = <&cru 112>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
};
&can1 {
assigned-clocks = <&cru 114>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
assigned-clocks = <&cru 114>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "disabled";
pinctrl-names = "default";
@@ -14931,8 +15030,9 @@
};
&sdmmc {
status = "disabled";
status = "okay";
};
&fiq_debugger {
@@ -14951,19 +15051,3 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
&hdptxphy_hdmi_clk1 {
status = "okay";
};
&pwm0 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m2_pins>;
#pwm-cells = <3>;
};
&pwm13 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm13m2_pins>;
#pwm-cells = <3>;
};

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@@ -2,22 +2,21 @@
//#include "../rk3588-evb4-lp4-v10-linux.dts"
#include "rp-rk3588-board.dtsi"
#include "rp-tp-i2c6-gt911.dtsi"
// #include "rp-tp-i2c6-gt911.dtsi"
// #include "rd-rk3588-lcd-gpio.dtsi"
#include "rpdzkj_config.dtsi"
/* usb */
// #include "rp-usb-typec-rk3588.dtsi"
#include "rp-usb-typec-rk3588.dtsi"
#include "rp-usb-host.dtsi"
/* ethernet */
// #include "rp-eth-pcie2gmac-rk3588.dtsi"
#include "rp-eth-gmac0.dtsi"
#include "rp-eth-gmac1.dtsi"
/* pcie */
#include "rp-pcie-power-rk3588.dtsi"
// #include "rp-pcie-power-rk3588.dtsi"
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
// #include "rp-pcie-5g.dtsi"
@@ -28,7 +27,7 @@
// #include "rp-wifi-bt-ap6275p-rk3588.dtsi"
/* hdmi rx */
// #include "rp-hdmirx.dtsi"
#include "rp-hdmirx.dtsi"
/* camera */
/***********all camera config********/
@@ -60,10 +59,10 @@
//#include "rp-camera-dphy0-imx415.dtsi"
/******************************************/
// #include "rp-lcd-hdmi0.dtsi" //batch ignore
#include "rp-lcd-hdmi1.dtsi" //batch ignore
//#include "rp-lcd-hdmi0.dtsi" //batch ignore
//#include "rp-lcd-hdmi1.dtsi" //batch ignore
//#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore
// #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
#include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
/* lcd */
// #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
@@ -134,20 +133,20 @@
// gpio_function = <4>;
//};
// led {
// gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
// gpio_function = <3>;
// };
led {
gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>;
};
usb-host-power {
gpio_num = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
// usb-hub-reset {
// gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
usb-hub-reset {
gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
@@ -161,89 +160,49 @@
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m2_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m2_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m2_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
&can0 {
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "disabled";
pinctrl-names = "default";
@@ -264,8 +223,9 @@
};
&sdmmc {
status = "disabled";
status = "okay";
};
&fiq_debugger {
@@ -284,19 +244,3 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
&hdptxphy_hdmi_clk1 {
status = "okay";
};
&pwm0 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m2_pins>; // 选择 PWM1 的引脚复用
#pwm-cells = <3>;
};
&pwm13 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm13m2_pins>; // 选择 PWM1 的引脚复用和UART1 M1引脚冲突了
#pwm-cells = <3>;
};

View File

@@ -9,9 +9,9 @@
&gmac0 {
// Use rgmii-rxid mode to disable rx delay inside Soc
phy-mode = "rgmii-rxid";
clock_in_out = "input";
clock_in_out = "output";
snps,reset-gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_LOW>;
snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
// Reset time is 20ms, 100ms for rtl8211f
snps,reset-delays-us = <0 20000 100000>;
@@ -21,9 +21,7 @@
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
&gmac0_rgmii_bus>;
tx_delay = <0x44>;
// rx_delay = <0x4f>;

View File

@@ -39,27 +39,10 @@
&usbhost3_0 {
status = "okay";
status = "disabled";
};
&usbhost_dwc3_0 {
status = "okay";
status = "disabled";
};
&usbdrd_dwc3_0 {
extcon=<&u2phy0>;
status="okay";
};
&u2phy0 {
status = "okay";
};
&usbdrd_dwc3_1 {
extcon=<&u2phy1>;
status="okay";
};
&u2phy1 {
status = "okay";
};