4 Commits

Author SHA1 Message Date
zhangpeng
d2ec2b532e 调试PWM成功 2025-05-26 18:51:51 +08:00
zhangpeng
3bbdf81bc5 串口、网口、USB3.0、HDMI调试成功 2025-05-26 18:18:57 +08:00
zhangpeng
92bc223ace 禁用CAN2m1对NPU I2C的占用 2025-04-29 11:39:13 +08:00
zhangpeng
f716b853db 增加SPI3 2025-04-28 11:56:22 +08:00
9 changed files with 272 additions and 315 deletions

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@@ -34,10 +34,10 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb) arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

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@@ -30,8 +30,8 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi

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@@ -14558,8 +14558,20 @@
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi" 1
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi" 1
&u2phy2_host { &u2phy2_host {
status = "okay"; status = "okay";
}; };
@@ -14568,7 +14580,6 @@
status = "okay"; status = "okay";
}; };
&usb_host0_ehci { &usb_host0_ehci {
status = "okay"; status = "okay";
}; };
@@ -14584,7 +14595,36 @@
&usb_host1_ohci { &usb_host1_ohci {
status = "okay"; status = "okay";
}; };
# 14 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
&usbhost3_0 {
status = "okay";
};
&usbhost_dwc3_0 {
status = "okay";
};
&usbdrd_dwc3_0 {
extcon=<&u2phy0>;
status="okay";
};
&u2phy0 {
status = "okay";
};
&usbdrd_dwc3_1 {
extcon=<&u2phy1>;
status="okay";
};
&u2phy1 {
status = "okay";
};
# 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
@@ -14622,7 +14662,7 @@
phy-handle = <&rgmii_phy0>; phy-handle = <&rgmii_phy0>;
status = "okay"; status = "okay";
}; };
# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 17 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1
&mdio1 { &mdio1 {
@@ -14658,74 +14698,47 @@
phy-handle = <&rgmii_phy1>; phy-handle = <&rgmii_phy1>;
status = "okay"; status = "okay";
}; };
# 19 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi" 1
/ { / {
pcie20_avdd0v85: pcie20-avdd0v85 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
vin-supply = <&vdd_0v85_s0>;
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
vcc3v3_pcie30: vcc3v3-pcie30 { vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30"; regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
enable-active-high; enable-active-high;
gpios = <&gpio3 19 0>; gpios = <&gpio4 5 0>;
startup-delay-us = <5000>; startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>; vin-supply = <&vcc12v_dcin>;
}; };
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
}; };
# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
&combphy2_psu { # 64 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
status = "okay";
};
&pcie2x1l0 {
phys = <&combphy1_ps 2>;
reset-gpios = <&gpio4 5 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu 2>;
reset-gpios = <&gpio4 2 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 17 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <0>;
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio4 8 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 14 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
# 22 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 68 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
&hdmi1 { &hdmi1 {
status = "okay"; status = "okay";
@@ -14755,8 +14768,8 @@
status = "okay"; status = "okay";
connect = <&vp1_out_hdmi1>; connect = <&vp1_out_hdmi1>;
}; };
# 69 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 94 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" # 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
/ { / {
model = "dr4-rk3588"; model = "dr4-rk3588";
@@ -14792,20 +14805,20 @@
status = "okay"; status = "okay";
compatible = "rp_power"; compatible = "rp_power";
rp_not_deep_sleep = <1>; rp_not_deep_sleep = <1>;
# 146 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" # 142 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
usb-host-power { usb-host-power {
gpio_num = <&gpio2 17 0>; gpio_num = <&gpio2 17 0>;
gpio_function = <4>; gpio_function = <4>;
}; };
usb-hub-reset {
gpio_num = <&gpio3 10 0>;
gpio_function = <4>;
};
}; };
rp_gpio{ rp_gpio{
status = "okay"; status = "disabled";
compatible = "rp_gpio"; compatible = "rp_gpio";
gpio3c7 { gpio3c7 {
@@ -14815,77 +14828,89 @@
}; };
}; };
&uart0 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 { &uart1 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>; pinctrl-0 = <&uart1m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart3 { &uart3 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>; pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart4 { &uart4 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>; pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart5 { &uart5 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>; pinctrl-0 = <&uart5m0_xfer>;
}; fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
&uart6 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
}; };
&uart7 { &uart7 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>; pinctrl-0 = <&uart7m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart8 { &uart8 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>; pinctrl-0 = <&uart8m0_xfer>;
}; fifo-depth =<4096>;
rx-fifo-depth =<2048>;
&uart9 { tx-fifo-depth =<2048>;
status = "disabled"; dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 {
assigned-clocks = <&cru 112>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
}; };
&can1 { &can1 {
assigned-clocks = <&cru 114>; assigned-clocks = <&cru 114>;
assigned-clock-rates = <200000000>; assigned-clock-rates = <200000000>;
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>; pinctrl-0 = <&can1m1_pins>;
}; };
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 { &i2c4 {
status = "disabled"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
@@ -14906,9 +14931,8 @@
}; };
&sdmmc { &sdmmc {
status = "okay"; status = "disabled";
}; };
&fiq_debugger { &fiq_debugger {
@@ -14927,3 +14951,19 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
&hdptxphy_hdmi_clk1 { &hdptxphy_hdmi_clk1 {
status = "okay"; status = "okay";
}; };
&pwm0 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m2_pins>;
#pwm-cells = <3>;
};
&pwm13 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm13m2_pins>;
#pwm-cells = <3>;
};

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@@ -9,8 +9,7 @@
/* usb */ /* usb */
// #include "rp-usb-typec-rk3588.dtsi" // #include "rp-usb-typec-rk3588.dtsi"
// #include "rp-usb-host.dtsi" #include "rp-usb-host.dtsi"
#include "zkzg-usb-host.dtsi"
/* ethernet */ /* ethernet */
// #include "rp-eth-pcie2gmac-rk3588.dtsi" // #include "rp-eth-pcie2gmac-rk3588.dtsi"
@@ -18,10 +17,7 @@
#include "rp-eth-gmac1.dtsi" #include "rp-eth-gmac1.dtsi"
/* pcie */ /* pcie */
#include "zkzg-pcie.dtsi" #include "rp-pcie-power-rk3588.dtsi"
/* pcie */
// #include "rp-pcie-power-rk3588.dtsi"
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function // #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
// #include "rp-pcie-5g.dtsi" // #include "rp-pcie-5g.dtsi"
@@ -148,14 +144,14 @@
gpio_function = <4>; gpio_function = <4>;
}; };
usb-hub-reset { // usb-hub-reset {
gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; // gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>; // gpio_function = <4>;
}; // };
}; };
rp_gpio{ rp_gpio{
status = "okay"; status = "disabled";
compatible = "rp_gpio"; compatible = "rp_gpio";
gpio3c7 { gpio3c7 {
@@ -165,77 +161,89 @@
}; };
}; };
&uart0 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 { &uart1 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>; pinctrl-0 = <&uart1m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart3 { &uart3 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>; pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart4 { &uart4 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>; pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart5 { &uart5 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>; pinctrl-0 = <&uart5m0_xfer>;
}; fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
&uart6 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
}; };
&uart7 { &uart7 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>; pinctrl-0 = <&uart7m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart8 { &uart8 {
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>; pinctrl-0 = <&uart8m0_xfer>;
}; fifo-depth =<4096>;
rx-fifo-depth =<2048>;
&uart9 { tx-fifo-depth =<2048>;
status = "disabled"; dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 {
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
}; };
&can1 { &can1 {
assigned-clocks = <&cru CLK_CAN1>; assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>; assigned-clock-rates = <200000000>;
status = "disabled"; status = "okay";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>; pinctrl-0 = <&can1m1_pins>;
}; };
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 { &i2c4 {
status = "disabled"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
@@ -256,9 +264,8 @@
}; };
&sdmmc { &sdmmc {
status = "okay"; status = "disabled";
}; };
&fiq_debugger { &fiq_debugger {
@@ -277,3 +284,19 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
&hdptxphy_hdmi_clk1 { &hdptxphy_hdmi_clk1 {
status = "okay"; status = "okay";
}; };
&pwm0 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm0m2_pins>; // 选择 PWM1 的引脚复用
#pwm-cells = <3>;
};
&pwm13 {
status = "okay";
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
pinctrl-names = "active";
pinctrl-0 = <&pwm13m2_pins>; // 选择 PWM1 的引脚复用和UART1 M1引脚冲突了
#pwm-cells = <3>;
};

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@@ -39,10 +39,27 @@
&usbhost3_0 { &usbhost3_0 {
status = "disabled"; status = "okay";
}; };
&usbhost_dwc3_0 { &usbhost_dwc3_0 {
status = "okay"; status = "okay";
}; };
&usbdrd_dwc3_0 {
extcon=<&u2phy0>;
status="okay";
};
&u2phy0 {
status = "okay";
};
&usbdrd_dwc3_1 {
extcon=<&u2phy1>;
status="okay";
};
&u2phy1 {
status = "okay";
};

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@@ -11,20 +11,6 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>; pinctrl-0 = <&typec5v_pwren>;
}; };
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
}; };
@@ -125,7 +111,7 @@
&usbdrd_dwc3_0 { &usbdrd_dwc3_0 {
dr_mode = "host"; dr_mode = "otg";
usb-role-switch; usb-role-switch;
port { port {
#address-cells = <1>; #address-cells = <1>;
@@ -137,24 +123,6 @@
}; };
}; };
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
};
// 使能USB3.1/SATA/PCIe Combo PHY
&combphy2_psu {
status = "okay";
};
// 配置USB3.1 HOST2 Controller
&usbhost3_0 {
status = "okay";
};
&usbhost_dwc3_0 {
dr_mode = "host";
status = "okay";
};
&pinctrl { &pinctrl {
usb-typec { usb-typec {
usbc0_int: usbc0-int { usbc0_int: usbc0-int {
@@ -166,9 +134,4 @@
}; };
}; };
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
}; };

View File

@@ -1,62 +0,0 @@
/ {
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&pcie2x1l0 {
phys = <&combphy1_ps PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_NANBNB>;
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};

View File

@@ -1,24 +0,0 @@
&u2phy2_host {
status = "okay";
};
&u2phy3_host {
status = "okay";
};
// USB2.0 HOST0/1 Controller
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};