7 Commits

Author SHA1 Message Date
zhangpeng
10980d7306 pcie 网卡插槽 2025-10-20 13:49:06 +08:00
zhangpeng
591fa0c3f9 只使用串口pcie 2025-10-16 17:00:39 +08:00
zhangpeng
77d62eaa60 禁用串口 2025-10-09 13:29:27 +08:00
zhangpeng
29b4af2f0d 配置USB 2025-10-09 13:15:30 +08:00
zhangpeng
c58ccf6f9c 配置PCIE 2025-10-09 13:05:58 +08:00
zhangpeng
af654bb685 usb3.0 2025-06-24 17:27:05 +08:00
zhangpeng
0ae4e1e318 已经全部测试完成 2025-04-28 13:38:54 +08:00
9 changed files with 293 additions and 291 deletions

View File

@@ -34,10 +34,10 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

View File

@@ -30,8 +30,8 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi

View File

@@ -14558,20 +14558,8 @@
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi" 1
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi" 1
&u2phy2_host {
status = "okay";
};
@@ -14580,6 +14568,7 @@
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
@@ -14595,18 +14584,7 @@
&usb_host1_ohci {
status = "okay";
};
&usbhost3_0 {
status = "disabled";
};
&usbhost_dwc3_0 {
status = "disabled";
};
# 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 14 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
@@ -14644,7 +14622,7 @@
phy-handle = <&rgmii_phy0>;
status = "okay";
};
# 17 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1
&mdio1 {
@@ -14680,47 +14658,74 @@
phy-handle = <&rgmii_phy1>;
status = "okay";
};
# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 19 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi" 1
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi" 1
/ {
pcie20_avdd0v85: pcie20-avdd0v85 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
vin-supply = <&vdd_0v85_s0>;
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio4 5 0>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 19 0>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
};
# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 64 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&pcie2x1l0 {
phys = <&combphy1_ps 2>;
reset-gpios = <&gpio4 5 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu 2>;
reset-gpios = <&gpio4 2 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 17 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <0>;
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio4 8 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 14 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
# 22 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 68 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
&hdmi1 {
status = "okay";
@@ -14750,8 +14755,8 @@
status = "okay";
connect = <&vp1_out_hdmi1>;
};
# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 69 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 94 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
/ {
model = "dr4-rk3588";
@@ -14787,20 +14792,20 @@
status = "okay";
compatible = "rp_power";
rp_not_deep_sleep = <1>;
# 142 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 146 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
usb-host-power {
gpio_num = <&gpio2 17 0>;
gpio_function = <4>;
};
usb-hub-reset {
gpio_num = <&gpio3 10 0>;
gpio_function = <4>;
};
};
rp_gpio{
status = "disabled";
status = "okay";
compatible = "rp_gpio";
gpio3c7 {
@@ -14811,142 +14816,76 @@
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 {
assigned-clocks = <&cru 112>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
assigned-clocks = <&cru 112>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
};
&can1 {
assigned-clocks = <&cru 114>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
assigned-clocks = <&cru 114>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
&can2 {
assigned-clocks = <&cru 116>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can2m1_pins>;
};
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "disabled";
pinctrl-names = "default";
@@ -14967,6 +14906,7 @@
};
&sdmmc {
status = "okay";
};

Binary file not shown.

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@@ -9,7 +9,8 @@
/* usb */
// #include "rp-usb-typec-rk3588.dtsi"
#include "rp-usb-host.dtsi"
// #include "rp-usb-host.dtsi"
#include "zkzg-usb-host.dtsi"
/* ethernet */
// #include "rp-eth-pcie2gmac-rk3588.dtsi"
@@ -17,7 +18,10 @@
#include "rp-eth-gmac1.dtsi"
/* pcie */
#include "rp-pcie-power-rk3588.dtsi"
#include "zkzg-pcie.dtsi"
/* pcie */
// #include "rp-pcie-power-rk3588.dtsi"
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
// #include "rp-pcie-5g.dtsi"
@@ -144,14 +148,14 @@
gpio_function = <4>;
};
// usb-hub-reset {
// gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>;
// };
usb-hub-reset {
gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
gpio_function = <4>;
};
};
rp_gpio{
status = "disabled";
status = "okay";
compatible = "rp_gpio";
gpio3c7 {
@@ -162,142 +166,76 @@
};
&uart0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart1m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
};
&uart6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
};
&uart7 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
};
&uart9 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 {
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>;
};
&can1 {
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>;
};
&can2 {
assigned-clocks = <&cru CLK_CAN2>;
assigned-clock-rates = <200000000>;
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&can2m1_pins>;
};
&spi3 {
status = "okay";
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
spi3_dev@0 {
compatible = "rockchip,spidev";
reg = <0>;
spi-max-frequency = <12000000>;
spi-lsb-first;
};
};
&i2c4 {
status = "disabled";
pinctrl-names = "default";
@@ -318,6 +256,7 @@
};
&sdmmc {
status = "okay";
};

View File

@@ -43,6 +43,6 @@
};
&usbhost_dwc3_0 {
status = "disabled";
status = "okay";
};

View File

@@ -11,6 +11,20 @@
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
};
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
};
@@ -111,7 +125,7 @@
&usbdrd_dwc3_0 {
dr_mode = "otg";
dr_mode = "host";
usb-role-switch;
port {
#address-cells = <1>;
@@ -123,6 +137,24 @@
};
};
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
};
// 使能USB3.1/SATA/PCIe Combo PHY
&combphy2_psu {
status = "okay";
};
// 配置USB3.1 HOST2 Controller
&usbhost3_0 {
status = "okay";
};
&usbhost_dwc3_0 {
dr_mode = "host";
status = "okay";
};
&pinctrl {
usb-typec {
usbc0_int: usbc0-int {
@@ -134,4 +166,9 @@
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

62
rk3588/zkzg-pcie.dtsi Executable file
View File

@@ -0,0 +1,62 @@
/ {
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&pcie2x1l0 {
phys = <&combphy1_ps PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_NANBNB>;
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};

24
rk3588/zkzg-usb-host.dtsi Executable file
View File

@@ -0,0 +1,24 @@
&u2phy2_host {
status = "okay";
};
&u2phy3_host {
status = "okay";
};
// USB2.0 HOST0/1 Controller
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};