更改gmac配置

rk356x/.dr4-rk3568.dtb.cmd

@@ -27,6 +27,7 @@ deps_arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dtb := \
   arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
   arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
   arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
+  arch/arm64/boot/dts/rockchip/rk356x/zkzg-pcie-rk3568.dtsi \
   arch/arm64/boot/dts/rockchip/rk356x/rp-gmac0-pro-rk3568.dtsi \
   arch/arm64/boot/dts/rockchip/rk356x/zkzg-can-rk3568.dtsi \
 

rk356x/.dr4-rk3568.dtb.d.pre.tmp

@@ -23,5 +23,6 @@ dr4-rk3568.o: arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts \
  arch/arm64/boot/dts/rockchip/rk356x/../rk3568-pinctrl.dtsi \
  arch/arm64/boot/dts/rockchip/rk356x/../rockchip-pinconf.dtsi \
  arch/arm64/boot/dts/rockchip/rk356x/../rk3568-linux.dtsi \
+ arch/arm64/boot/dts/rockchip/rk356x/zkzg-pcie-rk3568.dtsi \
  arch/arm64/boot/dts/rockchip/rk356x/rp-gmac0-pro-rk3568.dtsi \
  arch/arm64/boot/dts/rockchip/rk356x/zkzg-can-rk3568.dtsi

rk356x/.dr4-rk3568.dtb.dts.tmp

@@ -8836,7 +8836,19 @@ dsi1_panel: panel@0 {
  disable-win-move;
 };
 # 13 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts" 2
-# 25 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+
+
+# 1 "arch/arm64/boot/dts/rockchip/rk356x/zkzg-pcie-rk3568.dtsi" 1
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x2 {
+ compatible = "rockchip,rk3568-pcie-ep";
+ status = "okay";
+};
+# 16 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts" 2
+# 28 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
 # 1 "arch/arm64/boot/dts/rockchip/rk356x/rp-gmac0-pro-rk3568.dtsi" 1
 
 &gmac0 {
@@ -8875,7 +8887,7 @@ dsi1_panel: panel@0 {
         clocks = <&cru 183>;
     };
 };
-# 26 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts" 2
+# 29 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts" 2
 
 
 
@@ -8900,8 +8912,8 @@ dsi1_panel: panel@0 {
     pinctrl-0 = <&can1m1_pins>;
     status = "okay";
 };
-# 33 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts" 2
+# 36 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts" 2
-# 79 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+# 82 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
 /{
         model = "dr4-rk3568";
         compatible = "rpdzkj,dr4-rk3568", "rockchip,rk3568";
@@ -8922,7 +8934,7 @@ dsi1_panel: panel@0 {
 
                 pinctrl-name = "default";
                 pinctrl-0 = <&rp_power>;
-# 122 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+# 125 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
                 otg_mode {
                         gpio_num = <&gpio1 4 1>;
                         gpio_function = <0>;
@@ -8931,13 +8943,13 @@ dsi1_panel: panel@0 {
                         gpio_num = <&gpio0 5 0>;
                         gpio_function = <4>;
                 };
-# 170 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+# 173 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
         };
 
         rp_gpio{
                 status = "disabled";
                 compatible = "rp_gpio";
-# 183 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+# 186 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
                 gpio0a0 {
                         gpio_num = <&gpio0 0 1>;
                         gpio_function = <0>;
@@ -9042,26 +9054,26 @@ dsi1_panel: panel@0 {
 };
 
 &uart3 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart3m1_xfer>;
 };
 
 &uart4 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart4m0_xfer>;
 };
 
 &uart5 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart5m0_xfer>;
 };
 
 
 &uart6 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart6m1_xfer>;
 };
@@ -9093,6 +9105,20 @@ dsi1_panel: panel@0 {
     };
 };
 
+&spi1 {
+    status = "okay";
+
+    pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
+    pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins_hs>;
+
+    spi_dev@0 {
+        compatible = "rockchip,spidev";
+        reg = <0>;
+        spi-max-frequency = <12000000>;
+        spi-lsb-first;
+    };
+};
+
 &video_phy1 {
     status = "disabled";
 };
@@ -9114,7 +9140,7 @@ dsi1_panel: panel@0 {
 
     status = "disabled";
 };
-# 418 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+# 435 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
 &rk_headset {
     pinctrl-0 = <&hp_det>;
     headset_gpio = <&gpio2 27 0>;
@@ -9163,7 +9189,7 @@ dsi1_panel: panel@0 {
     BT,wake_host_irq = <&gpio0 28 0>;
     status = "disabled";
 };
-# 516 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+# 533 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
 &pinctrl {
     rp_pins {
         rp_power: rp-power {
@@ -9203,7 +9229,7 @@ dsi1_panel: panel@0 {
                 <3 2 0 &pcfg_pull_none>;
         };
     };
-# 570 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
+# 587 "arch/arm64/boot/dts/rockchip/rk356x/dr4-rk3568.dts"
 };
 
 

rk356x/dr4-rk3568.dts

@@ -11,6 +11,9 @@
 #include "rk3566-evb-rpdzkj-rk809-tcs4525.dtsi"
 #include "../rk3568-linux.dtsi"
 
+/**************************pcie***********************/
+#include "zkzg-pcie-rk3568.dtsi"
+
 /*************************camera***********************/
 // #include "rp-camera-mipi-gc2093-single-2lane.dtsi"
 /***************************************************/
@@ -284,26 +287,26 @@
 };
 
 &uart3 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart3m1_xfer>;
 };
 
 &uart4 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart4m0_xfer>;
 };
 
 &uart5 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart5m0_xfer>;
 };
 
 
 &uart6 {
-    status = "okay";
+    status = "disabled";
     pinctrl-names = "default";
     pinctrl-0 = <&uart6m1_xfer>;
 };
@@ -335,6 +338,20 @@
     };
 };
 
+&spi1 {
+    status = "okay";
+    /** redefine pins for cs1 used to be pwm5 */
+    pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>;
+    pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins_hs>;
+
+    spi_dev@0 {
+        compatible = "rockchip,spidev";
+        reg = <0>;
+        spi-max-frequency = <12000000>;
+        spi-lsb-first;
+    };
+};
+
 &video_phy1 {
     status = "disabled";
 };

rk356x/rp-gmac0-pro-rk3568.dtsi

@@ -1,30 +1,30 @@
 
 &gmac0 {
-    phy-mode = "rgmii";
+        phy-mode = "rgmii";
-    clock_in_out = "input";
+        clock_in_out = "input";
+        snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
+        snps,reset-active-low;
+        /* Reset time is 20ms, 100ms for rtl8211f */
+        snps,reset-delays-us = <0 20000 100000>;
 
-    snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
+        assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
-    snps,reset-active-low;
+        assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>;
-    /* Reset time is 20ms, 100ms for rtl8211f */
+        assigned-clock-rates = <0>, <125000000>;
-    snps,reset-delays-us = <0 20000 100000>;
 
-    assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>, <&cru CLK_MAC0_OUT>;
+        pinctrl-names = "default";
-    assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>, <&cru CLK_MAC0_2TOP>;
+        pinctrl-0 = <&gmac0_miim
-    assigned-clock-rates = <0>, <125000000>, <25000000>;
+                    &gmac0_tx_bus2
+                    &gmac0_rx_bus2
+                    &gmac0_rgmii_clk_level2
+                    &gmac0_rgmii_bus
+                    &gmac0_clkinout>;
 
-    pinctrl-names = "default";
-    pinctrl-0 = <&gmac0_miim
-             &gmac0_tx_bus2
-             &gmac0_rx_bus2
-             &gmac0_rgmii_clk
-             &gmac0_rgmii_bus
-            &eth0_pins
-            &gmac0_clkinout>;
 
-    tx_delay = <0x2d>;
+        tx_delay = <0x3c>;
-    rx_delay = <0x2c>;
+        rx_delay = <0x2f>;
-    phy-handle = <&rgmii_phy0>;
+
-    status = "okay";
+        phy-handle = <&rgmii_phy0>;
+        status = "okay";
 };
 
 
@@ -32,6 +32,5 @@
     rgmii_phy0: phy@0 {
         compatible = "ethernet-phy-ieee802.3-c22";
         reg = <0x0>;
-        clocks = <&cru CLK_MAC0_OUT>;
     };
 };

rk356x/zkzg-pcie-rk3568.dtsi

@@ -0,0 +1,8 @@
+&pcie30phy {
+	status = "okay";
+};
+
+&pcie3x2 {
+	compatible = "rockchip,rk3568-pcie-ep";
+	status = "okay";
+};