7 Commits

Author SHA1 Message Date
zhangpeng
10980d7306 pcie 网卡插槽 2025-10-20 13:49:06 +08:00
zhangpeng
591fa0c3f9 只使用串口pcie 2025-10-16 17:00:39 +08:00
zhangpeng
77d62eaa60 禁用串口 2025-10-09 13:29:27 +08:00
zhangpeng
29b4af2f0d 配置USB 2025-10-09 13:15:30 +08:00
zhangpeng
c58ccf6f9c 配置PCIE 2025-10-09 13:05:58 +08:00
zhangpeng
af654bb685 usb3.0 2025-06-24 17:27:05 +08:00
zhangpeng
0ae4e1e318 已经全部测试完成 2025-04-28 13:38:54 +08:00
10 changed files with 343 additions and 313 deletions

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@@ -32,15 +32,13 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \ scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb) arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

View File

@@ -28,12 +28,10 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \ scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi

View File

@@ -14517,7 +14517,20 @@
/delete-node/ &backlight; /delete-node/ &backlight;
# 4 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 4 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi" 1
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m0_xfer>;
goodix_ts:goodix_ts@5d {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
};
};
# 6 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi" 1
@@ -14544,159 +14557,9 @@
# 9 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 9 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-typec-rk3588.dtsi" 1
/ {
vbus5v0_typec: vbus5v0-typec {
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio1 2 0>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
};
};
&i2c4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>;
usbc0: fusb302@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio0>;
interrupts = <27 8>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v0_typec>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_role_sw: endpoint@0 {
remote-endpoint = <&dwc3_0_role_switch>;
};
};
};
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
op-sink-microwatt = <1000000>;
sink-pdos =
<(((0) << 30) | ((1 << 26)) | ((((5000) / 50) & 0x3ff) << 10) | ((((1000) / 10) & 0x3ff) << 0))>;
source-pdos =
<(((0) << 30) | ((1 << 26)) | ((((5000) / 50) & 0x3ff) << 10) | ((((3000) / 10) & 0x3ff) << 0))>;
altmodes {
#address-cells = <1>;
#size-cells = <0>;
altmode@0 {
reg = <0>;
svid = <0xff01>;
vdo = <0xffffffff>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_orien_sw: endpoint {
remote-endpoint = <&usbdp_phy0_orientation_switch>;
};
};
port@1 {
reg = <1>;
dp_altmode_mux: endpoint {
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
};
};
};
};
};
};
&usbdp_phy0 {
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = <&gpio3 28 0>;
sbu2-dc-gpios = <&gpio3 29 0>;
port {
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_orientation_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_orien_sw>;
};
usbdp_phy0_dp_altmode_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&dp_altmode_mux>;
};
};
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
usb-role-switch;
port {
#address-cells = <1>;
#size-cells = <0>;
dwc3_0_role_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_role_sw>;
};
};
};
&pinctrl {
usb-typec {
usbc0_int: usbc0-int {
rockchip,pins = <0 27 0 &pcfg_pull_up>;
};
typec5v_pwren: typec5v-pwren {
rockchip,pins = <1 2 0 &pcfg_pull_none>;
};
};
};
# 12 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi" 1
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi" 1
&u2phy2_host { &u2phy2_host {
status = "okay"; status = "okay";
}; };
@@ -14705,6 +14568,7 @@
status = "okay"; status = "okay";
}; };
&usb_host0_ehci { &usb_host0_ehci {
status = "okay"; status = "okay";
}; };
@@ -14720,21 +14584,45 @@
&usb_host1_ohci { &usb_host1_ohci {
status = "okay"; status = "okay";
}; };
# 14 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi" 1
&usbhost3_0 { &mdio0 {
status = "disabled"; rgmii_phy0: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
}; };
&usbhost_dwc3_0 { &gmac0 {
status = "disabled";
phy-mode = "rgmii-rxid";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 20 1>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
tx_delay = <0x44>;
phy-handle = <&rgmii_phy0>;
status = "okay";
}; };
# 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1
&mdio1 { &mdio1 {
@@ -14770,91 +14658,74 @@
phy-handle = <&rgmii_phy1>; phy-handle = <&rgmii_phy1>;
status = "okay"; status = "okay";
}; };
# 17 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 19 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 30 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-hdmirx.dtsi" 1
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi" 1
/ { / {
vcc3v3_pcie30: vcc3v3-pcie30 {
reserved-memory { compatible = "regulator-fixed";
#address-cells = <2>; regulator-name = "vcc3v3_pcie30";
#size-cells = <2>; regulator-min-microvolt = <3300000>;
ranges; regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 19 0>;
cma { startup-delay-us = <5000>;
compatible = "shared-dma-pool"; vin-supply = <&vcc12v_dcin>;
reusable;
reg = <0x0 (256 * 0x100000) 0x0 (128 * 0x100000)>;
linux,cma-default;
}; };
};
hdmiin-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,hdmiin";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
status = "okay";
simple-audio-card,cpu {
sound-dai = <&i2s7_8ch>;
};
dailink0_master: simple-audio-card,codec {
sound-dai = <&hdmiin_dc>;
};
};
hdmiin_dc: hdmiin-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
}; };
&i2s7_8ch { &combphy0_ps {
status = "okay"; status = "okay";
}; };
&combphy1_ps {
&hdmirx_ctrler {
status = "okay";
hpd-trigger-level = <1>;
hdmirx-det-gpios = <&gpio1 29 1>;
pinctrl-0 = <&hdmim1_rx_cec &hdmim2_rx_hpdin &hdmim1_rx_scl &hdmim1_rx_sda>;
pinctrl-names = "default";
};
# 31 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 1
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi" 1
&hdmi0 {
status = "okay"; status = "okay";
}; };
&hdmi0_in_vp0 { &combphy2_psu {
status = "okay"; status = "okay";
}; };
&hdmi0_sound { &pcie2x1l0 {
phys = <&combphy1_ps 2>;
reset-gpios = <&gpio4 5 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu 2>;
reset-gpios = <&gpio4 2 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 17 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <0>;
status = "okay"; status = "okay";
}; };
&i2s5_8ch { &pcie3x2 {
reset-gpios = <&gpio4 8 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "okay";
}; };
&hdptxphy_hdmi0 { &pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 14 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay"; status = "okay";
}; };
# 22 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
&route_hdmi0 { # 68 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
status = "okay";
connect = <&vp0_out_hdmi0>;
};
# 2 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
&hdmi1 { &hdmi1 {
status = "okay"; status = "okay";
@@ -14884,26 +14755,8 @@
status = "okay"; status = "okay";
connect = <&vp1_out_hdmi1>; connect = <&vp1_out_hdmi1>;
}; };
# 3 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 2 # 69 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi" 1 # 94 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
&dp0 {
status = "okay";
};
&dp0_in_vp2 {
status = "okay";
};
&dp0_sound{
status = "okay";
};
&spdif_tx2 {
status = "okay";
};
# 4 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 2
# 66 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 89 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
/ { / {
model = "dr4-rk3588"; model = "dr4-rk3588";
@@ -14939,12 +14792,7 @@
status = "okay"; status = "okay";
compatible = "rp_power"; compatible = "rp_power";
rp_not_deep_sleep = <1>; rp_not_deep_sleep = <1>;
# 136 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" # 146 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
led {
gpio_num = <&gpio4 6 0>;
gpio_function = <3>;
};
usb-host-power { usb-host-power {
gpio_num = <&gpio2 17 0>; gpio_num = <&gpio2 17 0>;
gpio_function = <4>; gpio_function = <4>;
@@ -14957,7 +14805,7 @@
}; };
rp_gpio{ rp_gpio{
status = "disabled"; status = "okay";
compatible = "rp_gpio"; compatible = "rp_gpio";
gpio3c7 { gpio3c7 {
@@ -14968,31 +14816,59 @@
}; };
&uart3 { &uart0 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart3m2_xfer>; pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart4 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
}; };
&uart6 { &uart6 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>; pinctrl-0 = <&uart6m2_xfer>;
}; };
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m2_xfer>;
};
&uart7 { &uart7 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart7m2_xfer>; pinctrl-0 = <&uart7m1_xfer>;
}; };
&uart8 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
};
&uart9 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 { &can0 {
assigned-clocks = <&cru 112>; assigned-clocks = <&cru 112>;

Binary file not shown.

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@@ -2,19 +2,24 @@
//#include "../rk3588-evb4-lp4-v10-linux.dts" //#include "../rk3588-evb4-lp4-v10-linux.dts"
#include "rp-rk3588-board.dtsi" #include "rp-rk3588-board.dtsi"
// #include "rp-tp-i2c6-gt911.dtsi" #include "rp-tp-i2c6-gt911.dtsi"
// #include "rd-rk3588-lcd-gpio.dtsi" // #include "rd-rk3588-lcd-gpio.dtsi"
#include "rpdzkj_config.dtsi" #include "rpdzkj_config.dtsi"
/* usb */ /* usb */
#include "rp-usb-typec-rk3588.dtsi" // #include "rp-usb-typec-rk3588.dtsi"
#include "rp-usb-host.dtsi" // #include "rp-usb-host.dtsi"
#include "zkzg-usb-host.dtsi"
/* ethernet */ /* ethernet */
// #include "rp-eth-pcie2gmac-rk3588.dtsi" // #include "rp-eth-pcie2gmac-rk3588.dtsi"
#include "rp-eth-gmac0.dtsi"
#include "rp-eth-gmac1.dtsi" #include "rp-eth-gmac1.dtsi"
/* pcie */
#include "zkzg-pcie.dtsi"
/* pcie */ /* pcie */
// #include "rp-pcie-power-rk3588.dtsi" // #include "rp-pcie-power-rk3588.dtsi"
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function // #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
@@ -27,7 +32,7 @@
// #include "rp-wifi-bt-ap6275p-rk3588.dtsi" // #include "rp-wifi-bt-ap6275p-rk3588.dtsi"
/* hdmi rx */ /* hdmi rx */
#include "rp-hdmirx.dtsi" // #include "rp-hdmirx.dtsi"
/* camera */ /* camera */
/***********all camera config********/ /***********all camera config********/
@@ -59,10 +64,10 @@
//#include "rp-camera-dphy0-imx415.dtsi" //#include "rp-camera-dphy0-imx415.dtsi"
/******************************************/ /******************************************/
//#include "rp-lcd-hdmi0.dtsi" //batch ignore // #include "rp-lcd-hdmi0.dtsi" //batch ignore
//#include "rp-lcd-hdmi1.dtsi" //batch ignore #include "rp-lcd-hdmi1.dtsi" //batch ignore
//#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore //#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore
#include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" // #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
/* lcd */ /* lcd */
// #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi" // #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
@@ -133,10 +138,10 @@
// gpio_function = <4>; // gpio_function = <4>;
//}; //};
led { // led {
gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; // gpio_num = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
gpio_function = <3>; // gpio_function = <3>;
}; // };
usb-host-power { usb-host-power {
gpio_num = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; gpio_num = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
@@ -150,7 +155,7 @@
}; };
rp_gpio{ rp_gpio{
status = "disabled"; status = "okay";
compatible = "rp_gpio"; compatible = "rp_gpio";
gpio3c7 { gpio3c7 {
@@ -161,31 +166,59 @@
}; };
&uart3 { &uart0 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart3m2_xfer>; pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart4 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
}; };
&uart6 { &uart6 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>; pinctrl-0 = <&uart6m2_xfer>;
}; };
&uart4 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart4m2_xfer>;
};
&uart7 { &uart7 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart7m2_xfer>; pinctrl-0 = <&uart7m1_xfer>;
}; };
&uart8 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>;
};
&uart9 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 { &can0 {
assigned-clocks = <&cru CLK_CAN0>; assigned-clocks = <&cru CLK_CAN0>;

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@@ -9,9 +9,9 @@
&gmac0 { &gmac0 {
// Use rgmii-rxid mode to disable rx delay inside Soc // Use rgmii-rxid mode to disable rx delay inside Soc
phy-mode = "rgmii-rxid"; phy-mode = "rgmii-rxid";
clock_in_out = "output"; clock_in_out = "input";
snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; snps,reset-gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_LOW>;
snps,reset-active-low; snps,reset-active-low;
// Reset time is 20ms, 100ms for rtl8211f // Reset time is 20ms, 100ms for rtl8211f
snps,reset-delays-us = <0 20000 100000>; snps,reset-delays-us = <0 20000 100000>;
@@ -21,7 +21,9 @@
&gmac0_tx_bus2 &gmac0_tx_bus2
&gmac0_rx_bus2 &gmac0_rx_bus2
&gmac0_rgmii_clk &gmac0_rgmii_clk
&gmac0_rgmii_bus>; &gmac0_rgmii_bus
&gmac0_clkinout
&eth0_pins>;
tx_delay = <0x44>; tx_delay = <0x44>;
// rx_delay = <0x4f>; // rx_delay = <0x4f>;

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@@ -43,6 +43,6 @@
}; };
&usbhost_dwc3_0 { &usbhost_dwc3_0 {
status = "disabled"; status = "okay";
}; };

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@@ -11,6 +11,20 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>; pinctrl-0 = <&typec5v_pwren>;
}; };
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
}; };
@@ -111,7 +125,7 @@
&usbdrd_dwc3_0 { &usbdrd_dwc3_0 {
dr_mode = "otg"; dr_mode = "host";
usb-role-switch; usb-role-switch;
port { port {
#address-cells = <1>; #address-cells = <1>;
@@ -123,6 +137,24 @@
}; };
}; };
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
};
// 使能USB3.1/SATA/PCIe Combo PHY
&combphy2_psu {
status = "okay";
};
// 配置USB3.1 HOST2 Controller
&usbhost3_0 {
status = "okay";
};
&usbhost_dwc3_0 {
dr_mode = "host";
status = "okay";
};
&pinctrl { &pinctrl {
usb-typec { usb-typec {
usbc0_int: usbc0-int { usbc0_int: usbc0-int {
@@ -134,4 +166,9 @@
}; };
}; };
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
}; };

62
rk3588/zkzg-pcie.dtsi Executable file
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@@ -0,0 +1,62 @@
/ {
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&pcie2x1l0 {
phys = <&combphy1_ps PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_NANBNB>;
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};

24
rk3588/zkzg-usb-host.dtsi Executable file
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@@ -0,0 +1,24 @@
&u2phy2_host {
status = "okay";
};
&u2phy3_host {
status = "okay";
};
// USB2.0 HOST0/1 Controller
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};