7 Commits

Author SHA1 Message Date
zhangpeng
10980d7306 pcie 网卡插槽 2025-10-20 13:49:06 +08:00
zhangpeng
591fa0c3f9 只使用串口pcie 2025-10-16 17:00:39 +08:00
zhangpeng
77d62eaa60 禁用串口 2025-10-09 13:29:27 +08:00
zhangpeng
29b4af2f0d 配置USB 2025-10-09 13:15:30 +08:00
zhangpeng
c58ccf6f9c 配置PCIE 2025-10-09 13:05:58 +08:00
zhangpeng
af654bb685 usb3.0 2025-06-24 17:27:05 +08:00
zhangpeng
0ae4e1e318 已经全部测试完成 2025-04-28 13:38:54 +08:00
10 changed files with 432 additions and 187 deletions

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@@ -32,11 +32,13 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \ scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb) arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)

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@@ -28,8 +28,10 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \ scripts/dtc/include-prefixes/dt-bindings/sensor-dev.h \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-rk806-single.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \ arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi

View File

@@ -14517,7 +14517,20 @@
/delete-node/ &backlight; /delete-node/ &backlight;
# 4 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 4 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi" 1
&i2c6 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c6m0_xfer>;
goodix_ts:goodix_ts@5d {
status = "okay";
compatible = "goodix,gt9xx";
reg = <0x5d>;
};
};
# 6 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi" 1
@@ -14545,20 +14558,8 @@
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi" 1
&u2phy2 {
status = "okay";
};
&u2phy3 {
status = "okay";
};
# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi" 1
&u2phy2_host { &u2phy2_host {
status = "okay"; status = "okay";
}; };
@@ -14567,6 +14568,7 @@
status = "okay"; status = "okay";
}; };
&usb_host0_ehci { &usb_host0_ehci {
status = "okay"; status = "okay";
}; };
@@ -14582,18 +14584,7 @@
&usb_host1_ohci { &usb_host1_ohci {
status = "okay"; status = "okay";
}; };
# 14 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
&usbhost3_0 {
status = "disabled";
};
&usbhost_dwc3_0 {
status = "disabled";
};
# 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
@@ -14622,8 +14613,8 @@
&gmac0_rx_bus2 &gmac0_rx_bus2
&gmac0_rgmii_clk &gmac0_rgmii_clk
&gmac0_rgmii_bus &gmac0_rgmii_bus
&gmac0_clkinout &gmac0_clkinout
&eth0_pins>; &eth0_pins>;
tx_delay = <0x44>; tx_delay = <0x44>;
@@ -14631,7 +14622,7 @@
phy-handle = <&rgmii_phy0>; phy-handle = <&rgmii_phy0>;
status = "okay"; status = "okay";
}; };
# 17 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1
&mdio1 { &mdio1 {
@@ -14667,47 +14658,105 @@
phy-handle = <&rgmii_phy1>; phy-handle = <&rgmii_phy1>;
status = "okay"; status = "okay";
}; };
# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2 # 19 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi" 1 # 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi" 1
/ { / {
pcie20_avdd0v85: pcie20-avdd0v85 { vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85"; regulator-name = "vcc3v3_pcie30";
regulator-boot-on; regulator-min-microvolt = <3300000>;
regulator-always-on; regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <850000>; enable-active-high;
regulator-max-microvolt = <850000>; gpios = <&gpio3 19 0>;
vin-supply = <&vdd_0v85_s0>; startup-delay-us = <5000>;
}; vin-supply = <&vcc12v_dcin>;
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio4 5 0>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
}; };
# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" &combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&pcie2x1l0 {
phys = <&combphy1_ps 2>;
reset-gpios = <&gpio4 5 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu 2>;
reset-gpios = <&gpio4 2 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 17 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <0>;
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio4 8 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 14 0>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
# 22 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 68 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
&hdmi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim2_tx1_scl &hdmim2_tx1_sda>;
};
&hdmi1_in_vp1 {
status = "okay";
};
&hdmi1_sound {
status = "okay";
};
&i2s6_8ch {
status = "okay";
};
&hdptxphy_hdmi1 {
status = "okay";
};
&route_hdmi1 {
status = "okay";
connect = <&vp1_out_hdmi1>;
};
# 69 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 94 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
/ { / {
model = "dr4-rk3588"; model = "dr4-rk3588";
@@ -14736,67 +14785,109 @@
thermal-zone = "soc-thermal"; thermal-zone = "soc-thermal";
threshold-temp = <60000>; threshold-temp = <60000>;
running-time = <10000>; running-time = <10000>;
status = "disable"; status = "disabled";
}; };
rp_power{ rp_power{
status = "okay"; status = "okay";
compatible = "rp_power"; compatible = "rp_power";
rp_not_deep_sleep = <1>; rp_not_deep_sleep = <1>;
# 142 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" # 146 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
usb-host-power { usb-host-power {
gpio_num = <&gpio2 17 0>; gpio_num = <&gpio2 17 0>;
gpio_function = <4>; gpio_function = <4>;
}; };
usb-hub-reset {
gpio_num = <&gpio3 10 0>;
gpio_function = <4>;
};
}; };
# 162 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
rp_gpio{
status = "okay";
compatible = "rp_gpio";
gpio3c7 {
gpio_num = <&gpio3 23 0>;
gpio_function = <0>;
};
};
};
&uart0 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart4 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
};
&uart6 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
}; };
&uart7 { &uart7 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>; pinctrl-0 = <&uart7m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart8 { &uart8 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>; pinctrl-0 = <&uart8m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart9 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 { &can0 {
assigned-clocks = <&cru 112>; assigned-clocks = <&cru 112>;
assigned-clock-rates = <200000000>; assigned-clock-rates = <200000000>;
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>; pinctrl-0 = <&can0m0_pins>;
}; };
&can1 { &can1 {
assigned-clocks = <&cru 114>; assigned-clocks = <&cru 114>;
assigned-clock-rates = <200000000>; assigned-clock-rates = <200000000>;
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>; pinctrl-0 = <&can1m1_pins>;
}; };
# 225 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
&i2c4 { &i2c4 {
status = "disable"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>; pinctrl-0 = <&i2c4m1_xfer>;
@@ -14817,9 +14908,22 @@
&sdmmc { &sdmmc {
status = "disabled"; status = "okay";
}; };
&fiq_debugger { &fiq_debugger {
rockchip,baudrate = <115200>; rockchip,baudrate = <115200>;
}; };
&display_subsystem {
clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
};
&hdptxphy_hdmi_clk0 {
status = "okay";
};
&hdptxphy_hdmi_clk1 {
status = "okay";
};

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@@ -2,14 +2,15 @@
//#include "../rk3588-evb4-lp4-v10-linux.dts" //#include "../rk3588-evb4-lp4-v10-linux.dts"
#include "rp-rk3588-board.dtsi" #include "rp-rk3588-board.dtsi"
// #include "rp-tp-i2c6-gt911.dtsi" #include "rp-tp-i2c6-gt911.dtsi"
// #include "rd-rk3588-lcd-gpio.dtsi" // #include "rd-rk3588-lcd-gpio.dtsi"
#include "rpdzkj_config.dtsi" #include "rpdzkj_config.dtsi"
/* usb */ /* usb */
// #include "rp-usb-typec-rk3588.dtsi" // #include "rp-usb-typec-rk3588.dtsi"
#include "rp-usb-host.dtsi" // #include "rp-usb-host.dtsi"
#include "zkzg-usb-host.dtsi"
/* ethernet */ /* ethernet */
// #include "rp-eth-pcie2gmac-rk3588.dtsi" // #include "rp-eth-pcie2gmac-rk3588.dtsi"
@@ -17,7 +18,10 @@
#include "rp-eth-gmac1.dtsi" #include "rp-eth-gmac1.dtsi"
/* pcie */ /* pcie */
#include "rp-pcie-power-rk3588.dtsi" #include "zkzg-pcie.dtsi"
/* pcie */
// #include "rp-pcie-power-rk3588.dtsi"
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function // #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
// #include "rp-pcie-5g.dtsi" // #include "rp-pcie-5g.dtsi"
@@ -60,8 +64,8 @@
//#include "rp-camera-dphy0-imx415.dtsi" //#include "rp-camera-dphy0-imx415.dtsi"
/******************************************/ /******************************************/
//#include "rp-lcd-hdmi0.dtsi" //batch ignore // #include "rp-lcd-hdmi0.dtsi" //batch ignore
//#include "rp-lcd-hdmi1.dtsi" //batch ignore #include "rp-lcd-hdmi1.dtsi" //batch ignore
//#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore //#include "rp-lcd-typec-dp0.dtsi" //usb edp0, must be enable rp-usb-typec.dtsi, batch ignore
// #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" // #include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
@@ -115,7 +119,7 @@
thermal-zone = "soc-thermal"; thermal-zone = "soc-thermal";
threshold-temp = <60000>; //60C threshold-temp = <60000>; //60C
running-time = <10000>; //10s running-time = <10000>; //10s
status = "disable"; status = "disabled";
}; };
rp_power{ rp_power{
@@ -144,86 +148,96 @@
gpio_function = <4>; gpio_function = <4>;
}; };
// usb-hub-reset { usb-hub-reset {
// gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>; gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
// gpio_function = <4>; gpio_function = <4>;
// }; };
}; };
// rp_gpio{ rp_gpio{
// status = "okay"; status = "okay";
// compatible = "rp_gpio"; compatible = "rp_gpio";
// gpio3c7 { gpio3c7 {
// gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>; gpio_num = <&gpio3 RK_PC7 GPIO_ACTIVE_HIGH>;
// gpio_function = <0>; gpio_function = <0>;
// }; };
// }; };
};
&uart0 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart0m0_xfer>;
};
&uart1 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart1m1_xfer>;
};
&uart3 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart3m0_xfer>;
};
&uart4 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart4m1_xfer>;
};
&uart5 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart5m0_xfer>;
};
&uart6 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart6m2_xfer>;
}; };
&uart7 { &uart7 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart7m1_xfer>; pinctrl-0 = <&uart7m1_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart8 { &uart8 {
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart8m0_xfer>; pinctrl-0 = <&uart8m0_xfer>;
fifo-depth =<4096>;
rx-fifo-depth =<2048>;
tx-fifo-depth =<2048>;
dma-names = "tx", "rx";
}; };
&uart9 {
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&uart9m2_xfer>;
};
&can0 { &can0 {
assigned-clocks = <&cru CLK_CAN0>; assigned-clocks = <&cru CLK_CAN0>;
assigned-clock-rates = <200000000>; assigned-clock-rates = <200000000>;
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&can0m0_pins>; pinctrl-0 = <&can0m0_pins>;
}; };
&can1 { &can1 {
assigned-clocks = <&cru CLK_CAN1>; assigned-clocks = <&cru CLK_CAN1>;
assigned-clock-rates = <200000000>; assigned-clock-rates = <200000000>;
status = "okay"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&can1m1_pins>; pinctrl-0 = <&can1m1_pins>;
}; };
// &can2 {
// assigned-clocks = <&cru CLK_CAN2>;
// assigned-clock-rates = <200000000>;
// status = "okay";
// pinctrl-names = "default";
// pinctrl-0 = <&can2m1_pins>;
// };
// &spi3 {
// // status = "disabled";
// status = "okay";
// max-freq = <48000000>;
// dev-port = <1>;
// pinctrl-0 = <&spi3m1_cs1 &spi3m1_pins>;
// spidev0: spidev@00 {
// status = "okay";
// compatible = "rockchip,spidev";
// reg = <0x00>;
// spi-max-frequency = <48000000>;
// };
// };
&i2c4 { &i2c4 {
status = "disable"; status = "disabled";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&i2c4m1_xfer>; pinctrl-0 = <&i2c4m1_xfer>;
@@ -244,22 +258,22 @@
&sdmmc { &sdmmc {
status = "disabled"; status = "okay";
}; };
&fiq_debugger { &fiq_debugger {
rockchip,baudrate = <115200>; rockchip,baudrate = <115200>;
}; };
// &display_subsystem { &display_subsystem {
// clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>; clocks = <&hdptxphy_hdmi_clk0>, <&hdptxphy_hdmi_clk1>;
// clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll"; clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
// }; };
// &hdptxphy_hdmi_clk0 { &hdptxphy_hdmi_clk0 {
// status = "okay"; status = "okay";
// }; };
// &hdptxphy_hdmi_clk1 { &hdptxphy_hdmi_clk1 {
// status = "okay"; status = "okay";
// }; };

View File

@@ -22,8 +22,8 @@
&gmac0_rx_bus2 &gmac0_rx_bus2
&gmac0_rgmii_clk &gmac0_rgmii_clk
&gmac0_rgmii_bus &gmac0_rgmii_bus
&gmac0_clkinout &gmac0_clkinout
&eth0_pins>; &eth0_pins>;
tx_delay = <0x44>; tx_delay = <0x44>;
// rx_delay = <0x4f>; // rx_delay = <0x4f>;

View File

@@ -43,6 +43,6 @@
}; };
&usbhost_dwc3_0 { &usbhost_dwc3_0 {
status = "disabled"; status = "okay";
}; };

View File

@@ -11,6 +11,20 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>; pinctrl-0 = <&typec5v_pwren>;
}; };
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
}; };
@@ -111,7 +125,7 @@
&usbdrd_dwc3_0 { &usbdrd_dwc3_0 {
dr_mode = "otg"; dr_mode = "host";
usb-role-switch; usb-role-switch;
port { port {
#address-cells = <1>; #address-cells = <1>;
@@ -123,6 +137,24 @@
}; };
}; };
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
};
// 使能USB3.1/SATA/PCIe Combo PHY
&combphy2_psu {
status = "okay";
};
// 配置USB3.1 HOST2 Controller
&usbhost3_0 {
status = "okay";
};
&usbhost_dwc3_0 {
dr_mode = "host";
status = "okay";
};
&pinctrl { &pinctrl {
usb-typec { usb-typec {
usbc0_int: usbc0-int { usbc0_int: usbc0-int {
@@ -134,4 +166,9 @@
}; };
}; };
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
}; };

62
rk3588/zkzg-pcie.dtsi Executable file
View File

@@ -0,0 +1,62 @@
/ {
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&pcie2x1l0 {
phys = <&combphy1_ps PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l1 {
phys = <&combphy2_psu PHY_TYPE_PCIE>;
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie2x1l2 {
reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_NANBNB>;
status = "okay";
};
&pcie3x2 {
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};
&pcie3x4 {
num-lanes = <2>;
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "okay";
};

24
rk3588/zkzg-usb-host.dtsi Executable file
View File

@@ -0,0 +1,24 @@
&u2phy2_host {
status = "okay";
};
&u2phy3_host {
status = "okay";
};
// USB2.0 HOST0/1 Controller
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};
&usb_host1_ehci {
status = "okay";
};
&usb_host1_ohci {
status = "okay";
};