Compare commits
1 Commits
Author | SHA1 | Date | |
---|---|---|---|
![]() |
18c4f8007c |
@ -52,7 +52,6 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi \
|
||||
|
||||
arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)
|
||||
|
||||
|
@ -47,5 +47,4 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi \
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi
|
||||
arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-typec-dp0.dtsi
|
||||
|
@ -15881,233 +15881,6 @@
|
||||
};
|
||||
# 4 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi" 2
|
||||
# 66 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
|
||||
|
||||
|
||||
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi" 1
|
||||
|
||||
&backlight_mipi {
|
||||
compatible = "pwm-backlight";
|
||||
|
||||
status = "okay";
|
||||
brightness-levels = <
|
||||
0 20 20 21 21 22 22 23
|
||||
23 24 24 25 25 26 26 27
|
||||
27 28 28 29 29 30 30 31
|
||||
31 32 32 33 33 34 34 35
|
||||
35 36 36 37 37 38 38 39
|
||||
40 41 42 43 44 45 46 47
|
||||
48 49 50 51 52 53 54 55
|
||||
56 57 58 59 60 61 62 63
|
||||
64 65 66 67 68 69 70 71
|
||||
72 73 74 75 76 77 78 79
|
||||
80 81 82 83 84 85 86 87
|
||||
88 89 90 91 92 93 94 95
|
||||
96 97 98 99 100 101 102 103
|
||||
104 105 106 107 108 109 110 111
|
||||
112 113 114 115 116 117 118 119
|
||||
120 121 122 123 124 125 126 127
|
||||
128 129 130 131 132 133 134 135
|
||||
136 137 138 139 140 141 142 143
|
||||
144 145 146 147 148 149 150 151
|
||||
152 153 154 155 156 157 158 159
|
||||
160 161 162 163 164 165 166 167
|
||||
168 169 170 171 172 173 174 175
|
||||
176 177 178 179 180 181 182 183
|
||||
184 185 186 187 188 189 190 191
|
||||
192 193 194 195 196 197 198 199
|
||||
200 201 202 203 204 205 206 207
|
||||
208 209 210 211 212 213 214 215
|
||||
216 217 218 219 220 221 222 223
|
||||
224 225 226 227 228 229 230 231
|
||||
232 233 234 235 236 237 238 239
|
||||
240 241 242 243 244 245 246 247
|
||||
248 249 250 251 252 253 254 255
|
||||
>;
|
||||
default-brightness-level = <200>;
|
||||
};
|
||||
|
||||
|
||||
&vcc3v3_lcd_n {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_lcd0_n";
|
||||
regulator-boot-on;
|
||||
enable-active-high;
|
||||
|
||||
vin-supply = <&vcc_1v8_s3>;
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
&dsi0 {
|
||||
status = "okay";
|
||||
|
||||
dsi0_panel: panel@0 {
|
||||
status = "okay";
|
||||
compatible = "simple-panel-dsi";
|
||||
reg = <0>;
|
||||
|
||||
power-supply = <&vcc3v3_lcd_n>;
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
backlight = <&backlight_mipi>;
|
||||
init-delay-ms = <60>;
|
||||
reset-delay-ms = <60>;
|
||||
enable-delay-ms = <60>;
|
||||
prepare-delay-ms = <60>;
|
||||
unprepare-delay-ms = <60>;
|
||||
disable-delay-ms = <60>;
|
||||
dsi,flags = <((1 << 0) | (1 << 1) |
|
||||
(1 << 11) | (1 << 9))>;
|
||||
dsi,format = <0>;
|
||||
dsi,lanes = <4>;
|
||||
|
||||
panel-init-sequence = [
|
||||
39 00 04 B9 F1 12 83
|
||||
|
||||
39 00 1C BA 33 81 05 F9 0E 0E 20 00 00 00 00 00 00 00 44 25 00 91 0A 00 00 02 4F D1 00 00 37
|
||||
|
||||
39 00 02 B8 26
|
||||
|
||||
39 00 04 BF 02 10 00
|
||||
|
||||
39 00 0B B3 07 0B 1E 1E 03 FF 00 00 00 00
|
||||
|
||||
39 00 0A C0 73 73 50 50 00 00 08 70 00
|
||||
|
||||
39 00 02 BC 46
|
||||
|
||||
39 00 02 CC 0B
|
||||
|
||||
39 00 02 B4 80
|
||||
|
||||
39 00 04 B2 C8 12 A0
|
||||
|
||||
39 00 0F E3 07 07 0B 0B 03 0B 00 00 00 00 FF 80 C0 10
|
||||
|
||||
39 00 0D C1 53 00 32 32 77 F1 FF FF CC CC 77 77
|
||||
|
||||
39 00 03 B5 09 09
|
||||
|
||||
39 00 03 B6 B7 B7
|
||||
|
||||
39 00 40 E9 C2 10 0A 00 00 81 80 12 30 00 37 86 81 80 37 18 00 05 00 00 00 00 00 05 00 00 00 00 F8 BA 46 02 08 28 88 88 88 88 88 F8 BA 57 13 18 38 88 88 88 88 88 00 00 00 03 00 00 00 00 00 00 00 00 00
|
||||
|
||||
39 00 3E EA 07 12 01 01 02 3C 00 00 00 00 00 00 8F BA 31 75 38 18 88 88 88 88 88 8F BA 20 64 28 08 88 88 88 88 88 23 10 00 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|
||||
|
||||
39 00 23 E0 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19 00 02 04 1A 23 3F 2C 28 05 09 0B 10 11 10 12 12 19
|
||||
|
||||
05 ff 01 11
|
||||
|
||||
05 32 01 29
|
||||
];
|
||||
|
||||
panel-exit-sequence = [
|
||||
05 78 01 28
|
||||
05 78 01 10
|
||||
];
|
||||
|
||||
disp_timings0: display-timings {
|
||||
native-mode = <&dsi0_timing0>;
|
||||
dsi0_timing0: timing0 {
|
||||
clock-frequency = <60000000>;
|
||||
hactive = <720>;
|
||||
vactive = <1280>;
|
||||
hback-porch = <40>;
|
||||
hfront-porch = <40>;
|
||||
vback-porch = <11>;
|
||||
vfront-porch = <16>;
|
||||
hsync-len = <10>;
|
||||
vsync-len = <3>;
|
||||
hsync-active = <0>;
|
||||
vsync-active = <0>;
|
||||
de-active = <0>;
|
||||
pixelclk-active = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
panel_in_dsi: endpoint {
|
||||
remote-endpoint = <&dsi_out_panel>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dsi_out_panel: endpoint {
|
||||
remote-endpoint = <&panel_in_dsi>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
|
||||
&dsi0_in_vp2 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&dsi0_in_vp3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&mipi_dcphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&route_dsi0 {
|
||||
status = "okay";
|
||||
connect = <&vp3_out_dsi0>;
|
||||
};
|
||||
|
||||
|
||||
&goodix_ts {
|
||||
gtp_resolution_x = <720>;
|
||||
gtp_resolution_y = <1280>;
|
||||
gtp_int_tarigger = <1>;
|
||||
gtp_change_x2y = <0>;
|
||||
gtp_overturn_x = <0>;
|
||||
gtp_overturn_y = <0>;
|
||||
gtp_send_cfg = <1>;
|
||||
gtp_touch_back = <1>;
|
||||
gtp_touch_wakeup = <1>;
|
||||
|
||||
goodix,cfg-group0 = [
|
||||
4D D0 02 00 05 05 35 00 01 08 32
|
||||
08 5A 3C 03 05 00 00 00 00 00 00
|
||||
00 18 1A 1E 14 89 29 0A 55 57 B5
|
||||
06 00 00 00 41 22 10 00 01 00 0F
|
||||
00 2A 00 00 19 50 32 3C 78 94 D5
|
||||
02 08 00 00 04 A2 40 00 8F 4A 00
|
||||
80 55 00 73 61 00 67 70 00 67 00
|
||||
00 00 00 00 00 00 00 00 00 00 00
|
||||
00 00 00 00 00 00 00 00 00 00 00
|
||||
00 00 00 00 00 00 00 00 00 00 00
|
||||
00 00 02 04 06 08 0A 0C 0E 10 12
|
||||
14 FF FF FF FF FF FF FF FF FF FF
|
||||
FF FF FF FF FF FF FF FF FF FF 22
|
||||
21 20 1F 1E 1D 1C 18 16 00 02 04
|
||||
06 08 0A 0F 10 12 FF FF FF FF FF
|
||||
FF FF FF FF FF FF FF FF FF FF FF
|
||||
FF FF FF FF FF FF FF FF 8D 01
|
||||
];
|
||||
};
|
||||
# 69 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
|
||||
# 89 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
|
||||
/ {
|
||||
model = "dr4-rk3588";
|
||||
|
Binary file not shown.
@ -27,7 +27,7 @@
|
||||
#include "rp-wifi-bt-ap6275p-rk3588.dtsi"
|
||||
|
||||
/* hdmi rx */
|
||||
#include "rp-hdmirx.dtsi"
|
||||
// #include "rp-hdmirx.dtsi"
|
||||
|
||||
/* camera */
|
||||
/***********all camera config********/
|
||||
@ -65,7 +65,7 @@
|
||||
#include "rp-lcd-multi-hdmi0-hdmi1-dp0.dtsi"
|
||||
|
||||
/* lcd */
|
||||
#include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
|
||||
// #include "rp-lcd-mipi0-5-720-1280-v2-boxTP.dtsi"
|
||||
//#include "rp-lcd-mipi0-7-720-1280.dtsi"
|
||||
//#include "rp-lcd-mipi0-8-800-1280-v3.dtsi"
|
||||
//#include "rp-lcd-mipi0-8-1200-1920.dtsi"
|
||||
|
Loading…
Reference in New Issue
Block a user