Compare commits
7 Commits
| Author | SHA1 | Date | |
|---|---|---|---|
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10980d7306 | ||
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591fa0c3f9 | ||
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77d62eaa60 | ||
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29b4af2f0d | ||
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c58ccf6f9c | ||
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af654bb685 | ||
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0ae4e1e318 |
@@ -34,10 +34,10 @@ deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb := \
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arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb: $(deps_arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dtb)
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@@ -30,8 +30,8 @@ dr4-rk3588.o: arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts \
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arch/arm64/boot/dts/rockchip/rk3588/../rk3588-linux.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-tp-i2c6-gt911.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rpdzkj_config.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac0.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi \
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arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi
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@@ -14558,20 +14558,8 @@
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-usb-host.dtsi" 1
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&u2phy2 {
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status = "okay";
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};
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&u2phy3 {
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status = "okay";
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};
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-usb-host.dtsi" 1
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&u2phy2_host {
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status = "okay";
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};
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@@ -14580,6 +14568,7 @@
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status = "okay";
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};
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&usb_host0_ehci {
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status = "okay";
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};
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@@ -14595,36 +14584,7 @@
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&usb_host1_ohci {
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status = "okay";
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};
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&usbhost3_0 {
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status = "okay";
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};
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&usbhost_dwc3_0 {
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status = "okay";
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};
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&usbdrd_dwc3_0 {
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extcon=<&u2phy0>;
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status="okay";
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};
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&u2phy0 {
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status = "okay";
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};
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&usbdrd_dwc3_1 {
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extcon=<&u2phy1>;
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status="okay";
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};
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&u2phy1 {
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status = "okay";
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};
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# 13 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 14 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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@@ -14662,7 +14622,7 @@
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phy-handle = <&rgmii_phy0>;
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status = "okay";
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};
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# 17 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-eth-gmac1.dtsi" 1
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&mdio1 {
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@@ -14698,47 +14658,74 @@
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phy-handle = <&rgmii_phy1>;
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status = "okay";
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};
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# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 19 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi" 1
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg-pcie.dtsi" 1
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/ {
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pcie20_avdd0v85: pcie20-avdd0v85 {
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compatible = "regulator-fixed";
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regulator-name = "pcie20_avdd0v85";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <850000>;
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regulator-max-microvolt = <850000>;
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vin-supply = <&vdd_0v85_s0>;
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};
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pcie20_avdd1v8: pcie20-avdd1v8 {
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compatible = "regulator-fixed";
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regulator-name = "pcie20_avdd1v8";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&avcc_1v8_s0>;
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};
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vcc3v3_pcie30: vcc3v3-pcie30 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie30";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio4 5 0>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc12v_dcin>;
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};
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vcc3v3_pcie30: vcc3v3-pcie30 {
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compatible = "regulator-fixed";
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regulator-name = "vcc3v3_pcie30";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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enable-active-high;
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gpios = <&gpio3 19 0>;
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startup-delay-us = <5000>;
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vin-supply = <&vcc12v_dcin>;
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};
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};
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# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 64 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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&combphy0_ps {
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status = "okay";
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};
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&combphy1_ps {
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status = "okay";
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};
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&combphy2_psu {
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status = "okay";
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};
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&pcie2x1l0 {
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phys = <&combphy1_ps 2>;
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reset-gpios = <&gpio4 5 0>;
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vpcie3v3-supply = <&vcc3v3_pcie30>;
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status = "disabled";
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};
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&pcie2x1l1 {
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phys = <&combphy2_psu 2>;
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reset-gpios = <&gpio4 2 0>;
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vpcie3v3-supply = <&vcc3v3_pcie30>;
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status = "disabled";
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};
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&pcie2x1l2 {
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reset-gpios = <&gpio4 17 0>;
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vpcie3v3-supply = <&vcc3v3_pcie30>;
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status = "disabled";
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};
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&pcie30phy {
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rockchip,pcie30-phymode = <0>;
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status = "okay";
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};
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&pcie3x2 {
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reset-gpios = <&gpio4 8 0>;
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vpcie3v3-supply = <&vcc3v3_pcie30>;
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status = "okay";
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};
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&pcie3x4 {
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num-lanes = <2>;
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reset-gpios = <&gpio4 14 0>;
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vpcie3v3-supply = <&vcc3v3_pcie30>;
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status = "okay";
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};
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# 22 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 68 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
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&hdmi1 {
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status = "okay";
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@@ -14768,8 +14755,8 @@
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status = "okay";
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connect = <&vp1_out_hdmi1>;
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};
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# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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# 69 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
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# 94 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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/ {
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model = "dr4-rk3588";
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@@ -14805,20 +14792,20 @@
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status = "okay";
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compatible = "rp_power";
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rp_not_deep_sleep = <1>;
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# 142 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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# 146 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
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usb-host-power {
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gpio_num = <&gpio2 17 0>;
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gpio_function = <4>;
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};
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||||
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||||
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usb-hub-reset {
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gpio_num = <&gpio3 10 0>;
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gpio_function = <4>;
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};
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};
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rp_gpio{
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status = "disabled";
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status = "okay";
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compatible = "rp_gpio";
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gpio3c7 {
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@@ -14828,89 +14815,77 @@
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||||
};
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||||
};
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&uart0 {
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&uart0m0_xfer>;
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};
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&uart1 {
|
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status = "okay";
|
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m1_xfer>;
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fifo-depth =<4096>;
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rx-fifo-depth =<2048>;
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tx-fifo-depth =<2048>;
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dma-names = "tx", "rx";
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status = "disabled";
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pinctrl-names = "default";
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pinctrl-0 = <&uart1m1_xfer>;
|
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};
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||||
&uart3 {
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status = "okay";
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pinctrl-names = "default";
|
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pinctrl-0 = <&uart3m0_xfer>;
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fifo-depth =<4096>;
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rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
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dma-names = "tx", "rx";
|
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status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3m0_xfer>;
|
||||
};
|
||||
|
||||
&uart4 {
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status = "okay";
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&uart4m1_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4m1_xfer>;
|
||||
};
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||||
|
||||
&uart5 {
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status = "okay";
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&uart5m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5m0_xfer>;
|
||||
};
|
||||
|
||||
&uart6 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart6m2_xfer>;
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7m1_xfer>;
|
||||
};
|
||||
|
||||
&uart8 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart8m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart8m0_xfer>;
|
||||
};
|
||||
|
||||
&uart9 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart9m2_xfer>;
|
||||
};
|
||||
|
||||
&can0 {
|
||||
assigned-clocks = <&cru 112>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0m0_pins>;
|
||||
};
|
||||
|
||||
&can1 {
|
||||
assigned-clocks = <&cru 114>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can1m1_pins>;
|
||||
assigned-clocks = <&cru 114>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can1m1_pins>;
|
||||
};
|
||||
|
||||
&spi3 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
|
||||
|
||||
spi3_dev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <12000000>;
|
||||
spi-lsb-first;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&i2c4 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
@@ -14931,8 +14906,9 @@
|
||||
|
||||
};
|
||||
|
||||
|
||||
&sdmmc {
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
@@ -14951,19 +14927,3 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
|
||||
&hdptxphy_hdmi_clk1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
status = "okay";
|
||||
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm0m2_pins>;
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
|
||||
&pwm13 {
|
||||
status = "okay";
|
||||
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm13m2_pins>;
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
|
||||
Binary file not shown.
@@ -9,7 +9,8 @@
|
||||
|
||||
/* usb */
|
||||
// #include "rp-usb-typec-rk3588.dtsi"
|
||||
#include "rp-usb-host.dtsi"
|
||||
// #include "rp-usb-host.dtsi"
|
||||
#include "zkzg-usb-host.dtsi"
|
||||
|
||||
/* ethernet */
|
||||
// #include "rp-eth-pcie2gmac-rk3588.dtsi"
|
||||
@@ -17,7 +18,10 @@
|
||||
#include "rp-eth-gmac1.dtsi"
|
||||
|
||||
/* pcie */
|
||||
#include "rp-pcie-power-rk3588.dtsi"
|
||||
#include "zkzg-pcie.dtsi"
|
||||
|
||||
/* pcie */
|
||||
// #include "rp-pcie-power-rk3588.dtsi"
|
||||
// #include "rp-pcie3.dtsi" //need comment when use board of make it youself,and remove the pcie function
|
||||
// #include "rp-pcie-5g.dtsi"
|
||||
|
||||
@@ -144,14 +148,14 @@
|
||||
gpio_function = <4>;
|
||||
};
|
||||
|
||||
// usb-hub-reset {
|
||||
// gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
// gpio_function = <4>;
|
||||
// };
|
||||
usb-hub-reset {
|
||||
gpio_num = <&gpio3 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
gpio_function = <4>;
|
||||
};
|
||||
};
|
||||
|
||||
rp_gpio{
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
compatible = "rp_gpio";
|
||||
|
||||
gpio3c7 {
|
||||
@@ -161,89 +165,77 @@
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&uart0 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0m0_xfer>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3m0_xfer>;
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4m1_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4m1_xfer>;
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5m0_xfer>;
|
||||
};
|
||||
|
||||
&uart6 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart6m2_xfer>;
|
||||
};
|
||||
|
||||
&uart7 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart7m1_xfer>;
|
||||
};
|
||||
|
||||
&uart8 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart8m0_xfer>;
|
||||
fifo-depth =<4096>;
|
||||
rx-fifo-depth =<2048>;
|
||||
tx-fifo-depth =<2048>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart8m0_xfer>;
|
||||
};
|
||||
|
||||
&uart9 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart9m2_xfer>;
|
||||
};
|
||||
|
||||
&can0 {
|
||||
assigned-clocks = <&cru CLK_CAN0>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can0m0_pins>;
|
||||
};
|
||||
|
||||
&can1 {
|
||||
assigned-clocks = <&cru CLK_CAN1>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can1m1_pins>;
|
||||
assigned-clocks = <&cru CLK_CAN1>;
|
||||
assigned-clock-rates = <200000000>;
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&can1m1_pins>;
|
||||
};
|
||||
|
||||
&spi3 {
|
||||
status = "okay";
|
||||
pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>;
|
||||
|
||||
spi3_dev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <12000000>;
|
||||
spi-lsb-first;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
&i2c4 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
@@ -264,8 +256,9 @@
|
||||
|
||||
};
|
||||
|
||||
|
||||
&sdmmc {
|
||||
status = "disabled";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fiq_debugger {
|
||||
@@ -284,19 +277,3 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll";
|
||||
&hdptxphy_hdmi_clk1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm0 {
|
||||
status = "okay";
|
||||
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm0m2_pins>; // 选择 PWM1 的引脚复用
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
|
||||
&pwm13 {
|
||||
status = "okay";
|
||||
compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm13m2_pins>; // 选择 PWM1 的引脚复用和UART1 M1引脚冲突了
|
||||
#pwm-cells = <3>;
|
||||
};
|
||||
@@ -39,27 +39,10 @@
|
||||
|
||||
|
||||
&usbhost3_0 {
|
||||
status = "okay";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usbhost_dwc3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_0 {
|
||||
extcon=<&u2phy0>;
|
||||
status="okay";
|
||||
};
|
||||
|
||||
&u2phy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbdrd_dwc3_1 {
|
||||
extcon=<&u2phy1>;
|
||||
status="okay";
|
||||
};
|
||||
|
||||
&u2phy1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
@@ -11,6 +11,20 @@
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&typec5v_pwren>;
|
||||
};
|
||||
|
||||
vcc5v0_host: vcc5v0-host {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc5v0_host";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vin-supply = <&vcc5v0_usb>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&vcc5v0_host_en>;
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -111,7 +125,7 @@
|
||||
|
||||
|
||||
&usbdrd_dwc3_0 {
|
||||
dr_mode = "otg";
|
||||
dr_mode = "host";
|
||||
usb-role-switch;
|
||||
port {
|
||||
#address-cells = <1>;
|
||||
@@ -123,6 +137,24 @@
|
||||
};
|
||||
};
|
||||
|
||||
&u2phy1_otg {
|
||||
phy-supply = <&vcc5v0_host>;
|
||||
};
|
||||
|
||||
// 使能USB3.1/SATA/PCIe Combo PHY
|
||||
&combphy2_psu {
|
||||
status = "okay";
|
||||
};
|
||||
// 配置USB3.1 HOST2 Controller
|
||||
&usbhost3_0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usbhost_dwc3_0 {
|
||||
dr_mode = "host";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
usb-typec {
|
||||
usbc0_int: usbc0-int {
|
||||
@@ -134,4 +166,9 @@
|
||||
};
|
||||
|
||||
};
|
||||
usb {
|
||||
vcc5v0_host_en: vcc5v0-host-en {
|
||||
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
62
rk3588/zkzg-pcie.dtsi
Executable file
62
rk3588/zkzg-pcie.dtsi
Executable file
@@ -0,0 +1,62 @@
|
||||
/ {
|
||||
vcc3v3_pcie30: vcc3v3-pcie30 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vcc3v3_pcie30";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <5000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
};
|
||||
|
||||
&combphy0_ps {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy1_ps {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&combphy2_psu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie2x1l0 {
|
||||
phys = <&combphy1_ps PHY_TYPE_PCIE>;
|
||||
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie2x1l1 {
|
||||
phys = <&combphy2_psu PHY_TYPE_PCIE>;
|
||||
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie2x1l2 {
|
||||
reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&pcie30phy {
|
||||
rockchip,pcie30-phymode = <PHY_MODE_PCIE_NANBNB>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x2 {
|
||||
reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pcie3x4 {
|
||||
num-lanes = <2>;
|
||||
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
|
||||
vpcie3v3-supply = <&vcc3v3_pcie30>;
|
||||
status = "okay";
|
||||
};
|
||||
24
rk3588/zkzg-usb-host.dtsi
Executable file
24
rk3588/zkzg-usb-host.dtsi
Executable file
@@ -0,0 +1,24 @@
|
||||
&u2phy2_host {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&u2phy3_host {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
// USB2.0 HOST0/1 Controller
|
||||
&usb_host0_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host0_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ehci {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb_host1_ohci {
|
||||
status = "okay";
|
||||
};
|
||||
Reference in New Issue
Block a user