zhangpeng/rockchip
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

注释pcie

Browse Source
This commit is contained in:
zhangpeng
2025-10-14 20:05:47 +08:00
parent b8465f59f4
commit aa4a8c801a
5 changed files with 8 additions and 82 deletions
Download Patch File Download Diff File Expand all files Collapse all files

82
rk3588/.dr4-rk3588.dtb.dts.tmp
View File

@@ -1,6 +1,6 @@
# 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "<built-in>"
# 1 "<command-line>"
# 0 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 0 "<built-in>"
# 0 "<command-line>"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
@@ -10674,7 +10674,7 @@
};
};
};
# 6887 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2
# 6888 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2
# 8 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588.dtsi" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588-vccio3-pinctrl.dtsi" 1
@@ -14642,7 +14642,7 @@
phy-mode = "rgmii-rxid";
clock_in_out = "input";
snps,reset-gpio = <&gpio2 20 1>;
snps,reset-gpio = <&gpio3 15 1>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
@@ -14678,7 +14678,7 @@
phy-mode = "rgmii-rxid";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 15 1>;
snps,reset-gpio = <&gpio2 20 1>;
snps,reset-active-low;
snps,reset-delays-us = <0 20000 100000>;
@@ -14699,76 +14699,6 @@
status = "okay";
};
# 18 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-pcie-power-rk3588.dtsi" 1
/ {
pcie20_avdd0v85: pcie20-avdd0v85 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
vin-supply = <&vdd_0v85_s0>;
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio4 5 0>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
};
# 21 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 64 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
# 1 "arch/arm64/boot/dts/rockchip/rk3588/rp-lcd-hdmi1.dtsi" 1
&hdmi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&hdmim2_tx1_cec &hdmim0_tx1_hpd &hdmim2_tx1_scl &hdmim2_tx1_sda>;
};
&hdmi1_in_vp1 {
status = "okay";
};
&hdmi1_sound {
status = "okay";
};
&i2s6_8ch {
status = "okay";
};
&hdptxphy_hdmi1 {
status = "okay";
};
&route_hdmi1 {
status = "okay";
connect = <&vp1_out_hdmi1>;
};
# 65 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" 2
# 90 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts"
/ {
model = "dr4-rk3588";