From 5bdca9e9679638f461a4be339ea0699d7c286806 Mon Sep 17 00:00:00 2001 From: zhangpeng Date: Sat, 11 Oct 2025 20:18:57 +0800 Subject: [PATCH] =?UTF-8?q?=E9=85=8D=E7=BD=AEuart=E3=80=81i2c=E3=80=81pwm?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- rk3588/.dr4-rk3588.dtb.dts.tmp | 60 +++++++++++++++++++++++++++------ rk3588/dr4-rk3588.dtb | Bin 264089 -> 264157 bytes rk3588/dr4-rk3588.dts | 52 ++++++++++++++++++++++++---- 3 files changed, 94 insertions(+), 18 deletions(-) diff --git a/rk3588/.dr4-rk3588.dtb.dts.tmp b/rk3588/.dr4-rk3588.dtb.dts.tmp index 121845c..1bca97e 100644 --- a/rk3588/.dr4-rk3588.dtb.dts.tmp +++ b/rk3588/.dr4-rk3588.dtb.dts.tmp @@ -1,6 +1,6 @@ -# 0 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" -# 0 "" -# 0 "" +# 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" +# 1 "" +# 1 "" # 1 "arch/arm64/boot/dts/rockchip/rk3588/dr4-rk3588.dts" @@ -10674,7 +10674,7 @@ }; }; }; -# 6888 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2 +# 6887 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588s.dtsi" 2 # 8 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588.dtsi" 2 # 1 "arch/arm64/boot/dts/rockchip/rk3588/../rk3588-vccio3-pinctrl.dtsi" 1 @@ -14829,7 +14829,7 @@ }; &uart1 { - status = "okay"; + status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&uart1m1_xfer>; fifo-depth =<4096>; @@ -14870,6 +14870,16 @@ }; +&uart6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart6m1_xfer>; + fifo-depth =<4096>; + rx-fifo-depth =<2048>; + tx-fifo-depth =<2048>; + dma-names = "tx", "rx"; +}; + &uart7 { status = "okay"; pinctrl-names = "default"; @@ -14881,7 +14891,7 @@ }; &uart8 { - status = "okay"; + status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&uart8m0_xfer>; fifo-depth =<4096>; @@ -14893,13 +14903,13 @@ &can1 { assigned-clocks = <&cru 114>; assigned-clock-rates = <200000000>; - status = "okay"; + status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&can1m1_pins>; }; &spi3 { - status = "okay"; + status = "disabled"; pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>; spi3_dev@0 { @@ -14952,11 +14962,27 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll"; status = "okay"; }; -&pwm0 { +&pwm14 { status = "okay"; compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; pinctrl-names = "active"; - pinctrl-0 = <&pwm0m2_pins>; + pinctrl-0 = <&pwm14m1_pins>; + #pwm-cells = <3>; +}; + +&pwm15 { + status = "okay"; + compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm15m1_pins>; + #pwm-cells = <3>; +}; + +&pwm11 { + status = "okay"; + compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm11m1_pins>; #pwm-cells = <3>; }; @@ -14964,6 +14990,18 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll"; status = "okay"; compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; pinctrl-names = "active"; - pinctrl-0 = <&pwm13m2_pins>; + pinctrl-0 = <&pwm13m1_pins>; #pwm-cells = <3>; }; + +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1m2_xfer>; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2m3_xfer>; +}; diff --git a/rk3588/dr4-rk3588.dtb b/rk3588/dr4-rk3588.dtb index ca5915a7977c8edbb40b60c27196f69eefa8553a..7060718f081c8551044396a227ec2091a2668ff3 100644 GIT binary patch delta 285 zcmbQ)FL1YCK;Q!Jzqbr5>~|R$7%Ui=w=_%?5NGt*s4@T41mz(L-_i=}n9Z+ZUf^Y+#(cyS6VZz)n#HRp01I}WItU!6DV1l$z;gHJa_wwOs0Jt(^nNS2~005 zVltVY24rpDRm8M{k%=*5dP)hC6BF}}=_^W@f~MP*0u^zU0u}u#0kZr`nL4IRl>u4L UKw{T`vh7-BOxv}}nDZwB0I6ze>i_@% delta 274 zcmccHFEF!TK;Q!Jzqbr5>@yh{7%Ui=x7bV+5NBlBs4@T4^xeITGMk^D;<-7wy-;L3 z_Yy`Kw(0(%j0)SGS221hPX4}BX8Y>Xj17#_zn^DJ*xrAZ@eAAJ?ez-VA75cy!2}U} zf1Pm;=k)lyKuyOVGV(BknbY4tVf+ITWPirU9y)!UH531IS!*Vz>HOAAeA9ESnH;Cb z0mZiOwPsqYJAG9qP`Wac$%t|8^fj4Gc1#S#+uvj|?c; fifo-depth =<4096>; @@ -203,6 +203,16 @@ }; +&uart6 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart6m1_xfer>; + fifo-depth =<4096>; + rx-fifo-depth =<2048>; + tx-fifo-depth =<2048>; + dma-names = "tx", "rx"; +}; + &uart7 { status = "okay"; pinctrl-names = "default"; @@ -214,7 +224,7 @@ }; &uart8 { - status = "okay"; + status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&uart8m0_xfer>; fifo-depth =<4096>; @@ -226,13 +236,13 @@ &can1 { assigned-clocks = <&cru CLK_CAN1>; assigned-clock-rates = <200000000>; - status = "okay"; + status = "disabled"; pinctrl-names = "default"; pinctrl-0 = <&can1m1_pins>; }; &spi3 { - status = "okay"; + status = "disabled"; pinctrl-0 = <&spi3m1_pins &spi3m1_cs1>; spi3_dev@0 { @@ -285,11 +295,27 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll"; status = "okay"; }; -&pwm0 { +&pwm14 { status = "okay"; compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; pinctrl-names = "active"; - pinctrl-0 = <&pwm0m2_pins>; // 选择 PWM1 的引脚复用 + pinctrl-0 = <&pwm14m1_pins>; // 选择 PWM1 的引脚复用 + #pwm-cells = <3>; +}; + +&pwm15 { + status = "okay"; + compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm15m1_pins>; // 选择 PWM1 的引脚复用 + #pwm-cells = <3>; +}; + +&pwm11 { + status = "okay"; + compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm11m1_pins>; #pwm-cells = <3>; }; @@ -297,6 +323,18 @@ clock-names = "hdmi0_phy_pll", "hdmi1_phy_pll"; status = "okay"; compatible = "rockchip,rk3588-pwm", "rockchip,rk3328-pwm"; pinctrl-names = "active"; - pinctrl-0 = <&pwm13m2_pins>; // 选择 PWM1 的引脚复用和UART1 M1引脚冲突了 + pinctrl-0 = <&pwm13m1_pins>; #pwm-cells = <3>; +}; + +&i2c1 { + status = "okay"; // 启用 I2C1 总线 + pinctrl-names = "default"; // 引脚控制状态名称 + pinctrl-0 = <&i2c1m2_xfer>; // 使用 i2c1m2_xfer 引脚配置 +}; + +&i2c2 { + status = "okay"; // 启用 I2C2 总线 + pinctrl-names = "default"; // 引脚控制状态名称 + pinctrl-0 = <&i2c2m3_xfer>; // 使用 i2c2m3_xfer 引脚配置 }; \ No newline at end of file