diff --git a/rk3588/.dr4-rk3588.dtb.dts.tmp b/rk3588/.dr4-rk3588.dtb.dts.tmp index 24b3344..ef83e2e 100644 --- a/rk3588/.dr4-rk3588.dtb.dts.tmp +++ b/rk3588/.dr4-rk3588.dtb.dts.tmp @@ -14551,17 +14551,51 @@ # 1 "arch/arm64/boot/dts/rockchip/rk3588/zkzg_mipi.dtsi" 1 + + + + +&csi2_dcphy0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipidcphy0_in_ucam0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mvcam_out4>; + data-lanes = <1 2 3 4>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + csidcphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi0_csi2_input>; + }; + }; + }; +}; + &i2c7 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&i2c7m0_xfer>; - - mvcam: mvcam@1a { - compatible = "veye,mvcam"; + mvcam_4: mvcam@3b{ status = "okay"; - reg = <0x3b>; - clocks = <&cru 256>; + compatible = "veye,mvcam"; + reg = <0x3b>; + clocks = <&cru 257>; clock-names = "xvclk"; power-domains = <&power 27>; pinctrl-names = "default"; @@ -14569,112 +14603,85 @@ rockchip,grf = <&sys_grf>; reset-gpios = <&gpio1 3 0>; pwdn-gpios = <&gpio1 5 0>; - rockchip,camera-module-index = <2>; - rockchip,camera-module-facing = "front"; - rockchip,camera-module-name = "CMK-OT2022-PX1"; - rockchip,camera-module-lens-name = "IR0147-50IRC-8M-F20"; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "NC"; + rockchip,camera-module-lens-name = "NC"; port { - mvcam_out0: endpoint { - remote-endpoint = <&mipi_in_ucam2>; + mvcam_out4: endpoint { + remote-endpoint = <&mipidcphy0_in_ucam0>; data-lanes = <1 2 3 4>; }; }; }; + }; -&csi2_dphy0_hw { +&mipi_dcphy0 { status = "okay"; }; -&csi2_dphy0 { +&mipi0_csi2 { status = "okay"; + ports { #address-cells = <1>; #size-cells = <0>; + port@0 { reg = <0>; #address-cells = <1>; #size-cells = <0>; - mipi_in_ucam2: endpoint@1 { + + mipi0_csi2_input: endpoint@1 { reg = <1>; - remote-endpoint = <&mvcam_out0>; - data-lanes = <1 2 3 4>; + remote-endpoint = <&csidcphy0_out>; }; }; + port@1 { reg = <1>; #address-cells = <1>; #size-cells = <0>; - csidphy0_out: endpoint@0 { + + mipi0_csi2_output: endpoint@0 { reg = <0>; - remote-endpoint = <&mipi2_csi2_input>; + remote-endpoint = <&cif_mipi_in0>; }; }; }; }; -&mipi2_csi2 { +&rkcif_mipi_lvds { status = "okay"; - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - #address-cells = <1>; - #size-cells = <0>; - mipi2_csi2_input: endpoint@1 { - reg = <1>; - remote-endpoint = <&csidphy0_out>; - }; - }; - port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - mipi2_csi2_output: endpoint@0 { - reg = <0>; - remote-endpoint = <&cif_mipi_in2>; - }; - }; - }; -}; - -&rkcif_mipi_lvds2 { - status = "okay"; port { - cif_mipi_in2: endpoint { - remote-endpoint = <&mipi2_csi2_output>; + cif_mipi_in0: endpoint { + remote-endpoint = <&mipi0_csi2_output>; }; }; }; -&rkcif_mipi_lvds2_sditf { - status = "okay"; +&rkcif_mipi_lvds_sditf { + status = "disabled"; + port { - mipi2_lvds_sditf: endpoint { - remote-endpoint = <&isp1_vir1>; + mipi_lvds_sditf: endpoint { + remote-endpoint = <&isp1_in1>; }; }; }; -&rkisp1 { - status = "okay"; -}; +&rkisp1_vir0 { + status = "disabled"; -&isp1_mmu { - status = "okay"; -}; - -&rkisp1_vir1 { - status = "okay"; port { #address-cells = <1>; #size-cells = <0>; - isp1_vir1: endpoint@0 { + isp1_in1: endpoint@0 { reg = <0>; - remote-endpoint = <&mipi2_lvds_sditf>; + remote-endpoint = <&mipi_lvds_sditf>; }; }; }; diff --git a/rk3588/dr4-rk3588.dtb b/rk3588/dr4-rk3588.dtb index 42016d6..494563c 100644 Binary files a/rk3588/dr4-rk3588.dtb and b/rk3588/dr4-rk3588.dtb differ diff --git a/rk3588/zkzg_mipi.dtsi b/rk3588/zkzg_mipi.dtsi index a5733d4..0e3295e 100644 --- a/rk3588/zkzg_mipi.dtsi +++ b/rk3588/zkzg_mipi.dtsi @@ -1,21 +1,9 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Copyright (c) 2022 www.veye.cc + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. * */ -/ { - vcc_mipidcphy0: vcc-mipidcphy0-regulator { - status = "disabled"; - compatible = "regulator-fixed"; - gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&mipidcphy0_pwr>; - regulator-name = "vcc_mipidcphy0"; - enable-active-high; - }; -}; - &csi2_dcphy0 { status = "okay"; @@ -27,12 +15,13 @@ #address-cells = <1>; #size-cells = <0>; - mipidcphy0_in_ucam0: endpoint@1 { - reg = <1>; - remote-endpoint = <&mvcam_out0>; + mipidcphy0_in_ucam0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mvcam_out4>; data-lanes = <1 2 3 4>; }; }; + port@1 { reg = <1>; #address-cells = <1>; @@ -46,42 +35,39 @@ }; }; -&csi2_dcphy0_hw { +&i2c7 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c7m0_xfer>; + + mvcam_4: mvcam@3b{ + status = "okay"; + compatible = "veye,mvcam"; + reg = <0x3b>; + clocks = <&cru CLK_MIPI_CAMARAOUT_M2>; + clock-names = "xvclk"; + power-domains = <&power RK3588_PD_VI>; + pinctrl-names = "default"; + pinctrl-0 = <&mipim0_camera2_clk>; + rockchip,grf = <&sys_grf>; + reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; + pwdn-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "NC"; + rockchip,camera-module-lens-name = "NC"; + port { + mvcam_out4: endpoint { + remote-endpoint = <&mipidcphy0_in_ucam0>; + data-lanes = <1 2 3 4>; + }; + }; + }; + }; -&i2c7 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&i2c7m0_xfer>; - - mvcam: mvcam@3b{ - compatible = "veye,mvcam"; - reg = <0x3b>; - clocks = <&cru CLK_MIPI_CAMARAOUT_M2>; - clock-names = "xvclk"; - pinctrl-names = "default"; - pinctrl-0 = <&mipim0_camera2_clk>; - power-domains = <&power RK3588_PD_VI>; - - //power-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_HIGH>; - pwdn-gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>; - - //avdd-supply = <&vcc_mipidcphy0>; - //firefly,clkout-enabled-index = <0>; - rockchip,camera-module-index = <0>; - rockchip,camera-module-facing = "back"; - rockchip,camera-module-name = "NC"; - rockchip,camera-module-lens-name = "NC"; - port { - mvcam_out0: endpoint { - remote-endpoint = <&mipidcphy0_in_ucam0>; - data-lanes = <1 2 3 4>; - }; - }; - }; - +&mipi_dcphy0 { + status = "okay"; }; &mipi0_csi2 { @@ -109,70 +95,42 @@ mipi0_csi2_output: endpoint@0 { reg = <0>; - remote-endpoint = <&cif_mipi0_in0>; + remote-endpoint = <&cif_mipi_in0>; }; }; }; }; -&pinctrl { - cam { - mipidcphy0_pwr: mipidcphy0-pwr { - rockchip,pins = - /* camera power en */ - <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&rkcif { +&rkcif_mipi_lvds { status = "okay"; -// memory-region = <&cif_reserved>; -}; - -&rkcif_mipi_lvds2 { - status = "okay"; - //firefly,yuv_camera; port { - cif_mipi0_in0: endpoint { + cif_mipi_in0: endpoint { remote-endpoint = <&mipi0_csi2_output>; }; }; }; -&rkcif_mipi_lvds2_sditf { +&rkcif_mipi_lvds_sditf { status = "disabled"; port { - mipi_lvds2_sditf: endpoint { - remote-endpoint = <&isp0_vir0>; + mipi_lvds_sditf: endpoint { + remote-endpoint = <&isp1_in1>; }; }; }; -&rkcif_mmu { - status = "okay"; -}; - -&rkisp0 { - status = "disabled"; -}; - -&isp0_mmu { - status = "disabled"; -}; - -&rkisp0_vir0 { +&rkisp1_vir0 { status = "disabled"; port { #address-cells = <1>; #size-cells = <0>; - isp0_vir0: endpoint@0 { + isp1_in1: endpoint@0 { reg = <0>; - remote-endpoint = <&mipi_lvds2_sditf>; + remote-endpoint = <&mipi_lvds_sditf>; }; }; };