187 lines
4.7 KiB
Plaintext
187 lines
4.7 KiB
Plaintext
![]() |
&i2c5 {
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status = "okay";
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dw9763_1: dw9763_1@c {
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compatible = "dongwoon,dw9763";
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status = "okay";
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reg = <0x0c>;
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rockchip,vcm-max-current = <120>;
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rockchip,vcm-start-current = <20>;
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rockchip,vcm-rated-current = <90>;
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rockchip,vcm-step-mode = <3>;
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rockchip,vcm-t-src = <0x20>;
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rockchip,vcm-t-div = <1>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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};
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ov13855_1: ov13855_1@36 {
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compatible = "ovti,ov13855";
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status = "okay";
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reg = <0x36>;
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clocks = <&cru CLK_CAM2_OUT2IO>;
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clock-names = "xvclk";
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pinctrl-names = "default";
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pinctrl-0 = <&cam_clk2_out>;
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pwdn-gpios = <&nca9555_gpio IO_11 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&nca9555_gpio IO_10 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "KYT-10203-v1";
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rockchip,camera-module-lens-name = "default";
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lens-focus = <&dw9763_1>;
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port {
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ov13855_out1: endpoint {
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remote-endpoint = <&mipi_in_ov13855_1>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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gc8034_1: gc8034_1@37 {
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compatible = "galaxycore,gc8034";
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status = "okay";
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reg = <0x37>;
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clocks = <&cru CLK_CAM2_OUT2IO>;
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clock-names = "xvclk";
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pinctrl-names = "default";
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pinctrl-0 = <&cam_clk2_out>;
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pwdn-gpios = <&nca9555_gpio IO_11 GPIO_ACTIVE_LOW>;
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reset-gpios = <&nca9555_gpio IO_10 GPIO_ACTIVE_LOW>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "RK-CMK-8M-2-v1";
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rockchip,camera-module-lens-name = "CK8401";
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port {
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gc8034_out1: endpoint {
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remote-endpoint = <&mipi_in_gc8034_1>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&csi2_dphy1_hw {
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status = "okay";
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};
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&csi2_dphy3 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_gc8034_1: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&gc8034_out1>;
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data-lanes = <1 2 3 4>;
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};
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mipi_in_ov13855_1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ov13855_out1>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidcphy2_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi2_csi2_input>;
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};
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};
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};
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};
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&mipi2_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csidcphy2_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi2_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in2>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds2 {
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status = "okay";
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port {
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cif_mipi_in2: endpoint {
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remote-endpoint = <&mipi2_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds2_sditf {
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status = "okay";
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port {
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mipi_lvds2_sditf: endpoint {
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remote-endpoint = <&isp_vir2>;
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};
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};
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};
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&rkcif_mmu {
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status = "okay";
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_mmu {
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status = "okay";
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};
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&rkisp_vir2 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp_vir2: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds2_sditf>;
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};
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};
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};
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