195 lines
3.8 KiB
Plaintext
195 lines
3.8 KiB
Plaintext
![]() |
/**
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* mipi csi to xs9922b config
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*/
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#define RP_CAMERA_XS9922B
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&i2c3 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3m1_xfer>;
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xs9922_1: xs9922_1@30 {
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compatible = "xs9922";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru CLK_MIPI_CAMARAOUT_M2>;
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clock-names = "xvclk";
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power-domains = <&power RK3588_PD_VI>;
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pinctrl-names = "default";
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pinctrl-0 = <&xs9922_pwr_1>;
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reset-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
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// power-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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//avdd-supply = <&vcc_avdd>;
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//dovdd-supply = <&vcc_dovdd>;
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//dvdd-supply = <&vcc_dvdd>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "default";
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rockchip,camera-module-lens-name = "default";
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rockchip,default_rect= <1280 720>;
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port {
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xs9922_out1: endpoint {
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remote-endpoint = <&mipi_in_ucam1>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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#ifndef RP_DOUBLE_XS9922B //rd-rk3588s-ahd share the same power-gpio
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&xs9922_1 {
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power-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
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};
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&pinctrl {
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xs9922_1 {
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xs9922_pwr_1: camera-pwr-1 {
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rockchip,pins =
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<4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>,
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<4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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#else
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&pinctrl {
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xs9922_1 {
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xs9922_pwr_1: camera-pwr-1 {
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rockchip,pins =
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<4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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};
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#endif
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&mipi_dcphy1 {
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status = "okay";
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};
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// CIF
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&csi2_dcphy1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in_ucam1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&xs9922_out1>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidcphy1_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi1_csi2_input>;
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};
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};
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};
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};
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&mipi1_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_input: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&csidcphy1_out>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_output: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&cif_mipi_in1>;
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};
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};
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};
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};
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&rkcif_mipi_lvds1 {
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status = "okay";
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port {
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cif_mipi_in1: endpoint {
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remote-endpoint = <&mipi1_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds1_sditf {
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status = "okay";
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port {
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mipi_lvds1_sditf: endpoint {
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remote-endpoint = <&isp1_vir0>;
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mmu {
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status = "okay";
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};
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&rkisp1 {
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status = "okay";
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};
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&isp1_mmu {
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status = "okay";
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};
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&rkisp1_vir0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp1_vir0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_lvds1_sditf>;
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};
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};
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};
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