102 lines
2.5 KiB
Plaintext
102 lines
2.5 KiB
Plaintext
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&i2c5 {
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clock-frequency = <400000>;
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status = "okay";
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pinctrl-0 = <&i2c5m0_xfer>;
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rk628_csi_v4l2: rk628_csi_v4l2@50 {
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status = "okay";
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reg = <0x50>;
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compatible = "rockchip,rk628-csi-v4l2";
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pinctrl-names = "default";
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pinctrl-0 = <&refclk_pins>;
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assigned-clocks = <&pmucru CLK_WIFI>;
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assigned-clock-rates = <24000000>;
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clocks = <&pmucru CLK_WIFI>;
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clock-names = "soc_24M";
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interrupt-parent = <&gpio2>;
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interrupts = <RK_PD7 IRQ_TYPE_LEVEL_HIGH>;
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enable-gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
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reset-gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>;
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//hdcp-enable = <1>;
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scaler-en = <1>;
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/*
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* If the hpd output level is inverted on the circuit,
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* the following configuration needs to be enabled.
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*/
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/* hpd-output-inverted; */
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plugin-det-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_HIGH>;
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//power-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "RK628-CSI";
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rockchip,camera-module-lens-name = "NC";
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port {
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hdmiin_out0: endpoint {
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remote-endpoint = <&mipi_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&hdmiin_out0>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csidphy0_out: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&isp0_in>;
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};
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};
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_mmu {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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isp0_in: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&csidphy0_out>;
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};
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};
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};
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